From: Francisco Jerez <currojerez@riseup.net>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH v3 2/2] drm/i915/tgl: MOCS table update
Date: Tue, 12 Nov 2019 15:20:03 -0800 [thread overview]
Message-ID: <877e44znq4.fsf@riseup.net> (raw)
In-Reply-To: <20191112224757.25116-2-matthew.d.roper@intel.com>
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Matt Roper <matthew.d.roper@intel.com> writes:
> The bspec was just updated with a minor correction to entry 61 (it
> shouldn't have had the SCF bit set).
>
> v2:
> - Add a MOCS_ENTRY_UNUSED() and use it to declare the
> explicitly-reserved MOCS entries. (Lucas)
> - Move the warning suppression from the Makefile to a #pragma that only
> affects the TGL table. (Lucas)
>
> v3:
> - Entries 16 and 17 are identical to ICL now, so no need to explicitly
> adjust them (or mess with compiler warning overrides).
>
> Bspec: 45101
> Fixes: 2ddf992179c4 ("drm/i915/tgl: Define MOCS entries for Tigerlake")
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Francisco Jerez <francisco.jerez.plata@intel.com>
> Cc: Jon Bloomfield <jon.bloomfield@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 06e2adbf27be..2b977991b785 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -263,7 +263,7 @@ static const struct drm_i915_mocs_entry tigerlake_mocs_table[] = {
> L3_1_UC),
> /* HW Special Case (Displayable) */
> MOCS_ENTRY(61,
> - LE_1_UC | LE_TC_1_LLC | LE_SCF(1),
> + LE_1_UC | LE_TC_1_LLC,
> L3_3_WB),
> };
>
> --
> 2.21.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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_______________________________________________
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Francisco Jerez <currojerez@riseup.net>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/tgl: MOCS table update
Date: Tue, 12 Nov 2019 15:20:03 -0800 [thread overview]
Message-ID: <877e44znq4.fsf@riseup.net> (raw)
Message-ID: <20191112232003.6_Pcpzky5KG1CnVnxRGlrngLfCOARyb_LinFAPbdkp8@z> (raw)
In-Reply-To: <20191112224757.25116-2-matthew.d.roper@intel.com>
[-- Attachment #1.1.1: Type: text/plain, Size: 1745 bytes --]
Matt Roper <matthew.d.roper@intel.com> writes:
> The bspec was just updated with a minor correction to entry 61 (it
> shouldn't have had the SCF bit set).
>
> v2:
> - Add a MOCS_ENTRY_UNUSED() and use it to declare the
> explicitly-reserved MOCS entries. (Lucas)
> - Move the warning suppression from the Makefile to a #pragma that only
> affects the TGL table. (Lucas)
>
> v3:
> - Entries 16 and 17 are identical to ICL now, so no need to explicitly
> adjust them (or mess with compiler warning overrides).
>
> Bspec: 45101
> Fixes: 2ddf992179c4 ("drm/i915/tgl: Define MOCS entries for Tigerlake")
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Francisco Jerez <francisco.jerez.plata@intel.com>
> Cc: Jon Bloomfield <jon.bloomfield@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 06e2adbf27be..2b977991b785 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -263,7 +263,7 @@ static const struct drm_i915_mocs_entry tigerlake_mocs_table[] = {
> L3_1_UC),
> /* HW Special Case (Displayable) */
> MOCS_ENTRY(61,
> - LE_1_UC | LE_TC_1_LLC | LE_SCF(1),
> + LE_1_UC | LE_TC_1_LLC,
> L3_3_WB),
> };
>
> --
> 2.21.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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_______________________________________________
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-12 23:19 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 22:47 [PATCH v3 1/2] Revert "drm/i915/ehl: Update MOCS table for EHL" Matt Roper
2019-11-12 22:47 ` [Intel-gfx] " Matt Roper
2019-11-12 22:47 ` [PATCH v3 2/2] drm/i915/tgl: MOCS table update Matt Roper
2019-11-12 22:47 ` [Intel-gfx] " Matt Roper
2019-11-12 23:20 ` Francisco Jerez [this message]
2019-11-12 23:20 ` Francisco Jerez
2019-11-13 1:09 ` Lucas De Marchi
2019-11-13 1:09 ` [Intel-gfx] " Lucas De Marchi
2019-11-13 12:58 ` Lis, Tomasz
2019-11-13 12:58 ` [Intel-gfx] " Lis, Tomasz
2019-11-12 23:15 ` [PATCH v3 1/2] Revert "drm/i915/ehl: Update MOCS table for EHL" Francisco Jerez
2019-11-12 23:15 ` [Intel-gfx] " Francisco Jerez
2019-11-13 0:32 ` ✓ Fi.CI.BAT: success for series starting with [v3,1/2] " Patchwork
2019-11-13 0:32 ` [Intel-gfx] " Patchwork
2019-11-13 11:49 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-11-13 11:49 ` [Intel-gfx] " Patchwork
2019-11-13 16:39 ` Matt Roper
2019-11-13 16:39 ` [Intel-gfx] " Matt Roper
2019-11-13 16:51 ` [PATCH i-g-t] i915/gem_mocs_settings: Update TGL MOCS table Matt Roper
2019-11-13 16:51 ` [Intel-gfx] " Matt Roper
2019-11-13 21:25 ` Lucas De Marchi
2019-11-13 21:25 ` [Intel-gfx] " Lucas De Marchi
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