Re: [PATCH 05/19] drm/i915: pass dev_priv explicitly to EDP_PSR_AUX_CTL

[Jani Nikula <jani.nikula@intel.com>]

On Tue, 30 Apr 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Tue, Apr 30, 2024 at 01:09:59PM +0300, Jani Nikula wrote:
>> Avoid the implicit dev_priv local variable use, and pass dev_priv
>> explicitly to the EDP_PSR_AUX_CTL register macro.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Two things crossing my mind at this point:
>
> 1. perhaps we should have grouped by impacted file and all these psr cases
>    together?
> 2. then perhaps while doing the whole file we could already do a
>    s/dev_priv/i915 on those impacted functions..
>
> but well, it crossed my mind, but I'm actually happy with this easy
> review and perhaps a last full sed s/dev_priv/i915.

I'm actually not going for s/dev_priv/i915/ at all! The next step is
going to be passing struct intel_display * to the register macros. It'll
just work, because all they use is

#define DISPLAY_INFO(i915)		(__to_intel_display(i915)->info.__device_info)

which handles either.

And going for struct intel_display * is just slightly more involved than
the pure rename.

> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Thanks for the reviews!

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/display/intel_psr.c      | 2 +-
>>  drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
>>  2 files changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
>> index 0b1f7e62470e..daeb1b65a2e5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>> @@ -323,7 +323,7 @@ static i915_reg_t psr_aux_ctl_reg(struct drm_i915_private *dev_priv,
>>  				  enum transcoder cpu_transcoder)
>>  {
>>  	if (DISPLAY_VER(dev_priv) >= 8)
>> -		return EDP_PSR_AUX_CTL(cpu_transcoder);
>> +		return EDP_PSR_AUX_CTL(dev_priv, cpu_transcoder);
>>  	else
>>  		return HSW_SRD_AUX_CTL;
>>  }
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
>> index 5fd4f875ade0..a4f785bcf605 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
>> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
>> @@ -86,7 +86,7 @@
>>  #define HSW_SRD_AUX_CTL				_MMIO(0x64810)
>>  #define _SRD_AUX_CTL_A				0x60810
>>  #define _SRD_AUX_CTL_EDP			0x6f810
>> -#define EDP_PSR_AUX_CTL(tran)			_MMIO_TRANS2(dev_priv, tran, _SRD_AUX_CTL_A)
>> +#define EDP_PSR_AUX_CTL(dev_priv, tran)			_MMIO_TRANS2(dev_priv, tran, _SRD_AUX_CTL_A)
>>  #define   EDP_PSR_AUX_CTL_TIME_OUT_MASK		DP_AUX_CH_CTL_TIME_OUT_MASK
>>  #define   EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK	DP_AUX_CH_CTL_MESSAGE_SIZE_MASK
>>  #define   EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK	DP_AUX_CH_CTL_PRECHARGE_2US_MASK
>> -- 
>> 2.39.2
>> 

-- 
Jani Nikula, Intel