Re: [PATCH 16/19] drm/i915: pass dev_priv explicitly to ALPM_CTL

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Tue, Apr 30, 2024 at 01:10:10PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the ALPM_CTL register macro.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c      | 4 ++--
>  drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 37b85b721ddf..fad24b1e5ae2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1812,7 +1812,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
>  
>  	alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines);
>  
> -	intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
> +	intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
>  }
>  
>  static void intel_psr_enable_source(struct intel_dp *intel_dp,
> @@ -2112,7 +2112,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
>  
>  	/* Panel Replay on eDP is always using ALPM aux less. */
>  	if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
> -		intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
> +		intel_de_rmw(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder),
>  			     ALPM_CTL_ALPM_ENABLE |
>  			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 4ccbb651016f..4d950b22d4f1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -297,7 +297,7 @@
>  						  _SEL_FETCH_PLANE_BASE_1_A)
>  
>  #define _ALPM_CTL_A	0x60950
> -#define ALPM_CTL(tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
> +#define ALPM_CTL(dev_priv, tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
>  #define  ALPM_CTL_ALPM_ENABLE				REG_BIT(31)
>  #define  ALPM_CTL_ALPM_AUX_LESS_ENABLE			REG_BIT(30)
>  #define  ALPM_CTL_LOBF_ENABLE				REG_BIT(29)
> -- 
> 2.39.2
>