[PATCH 0/4] drm/i915: More display power conversions

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* [PATCH 0/4] drm/i915: More display power conversions
@ 2025-02-11  0:01 Ville Syrjala
  2025-02-11  0:01 ` [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build Ville Syrjala
                   ` (6 more replies)
  0 siblings, 7 replies; 13+ messages in thread
From: Ville Syrjala @ 2025-02-11  0:01 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Apparently I screwed up the i915->display conversion a bit
so here's a fix, and an attempt at eliminating the specific
footgun hat got me. I also noticed that not much more i915
left in intel_display_power.h so I decided to finish it off.

Ville Syrjälä (4):
  drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build
  drm/i915: Continue intel_display_power struct intel_display conversion
  drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked()
  drm/i915: Get rid of the _unchecked() runime pm stuff

 drivers/gpu/drm/i915/display/g4x_dp.c         |  2 +-
 drivers/gpu/drm/i915/display/g4x_hdmi.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      | 10 ++--
 drivers/gpu/drm/i915/display/intel_display.c  |  6 +--
 .../drm/i915/display/intel_display_debugfs.c  |  3 +-
 .../drm/i915/display/intel_display_power.c    | 54 ++++---------------
 .../drm/i915/display/intel_display_power.h    | 45 +++-------------
 .../i915/display/intel_display_power_well.c   |  3 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 12 ++---
 drivers/gpu/drm/i915/display/skl_watermark.c  | 16 +++---
 drivers/gpu/drm/i915/display/skl_watermark.h  |  3 +-
 drivers/gpu/drm/i915/gvt/aperture_gm.c        |  7 +--
 drivers/gpu/drm/i915/gvt/debugfs.c            |  5 +-
 drivers/gpu/drm/i915/gvt/gtt.c                |  6 ++-
 drivers/gpu/drm/i915/gvt/gvt.h                |  9 ++--
 drivers/gpu/drm/i915/gvt/handlers.c           | 23 +++++---
 drivers/gpu/drm/i915/gvt/sched_policy.c       |  5 +-
 drivers/gpu/drm/i915/intel_gvt.c              |  3 --
 drivers/gpu/drm/i915/intel_runtime_pm.c       | 19 -------
 drivers/gpu/drm/i915/intel_runtime_pm.h       |  9 ----
 20 files changed, 80 insertions(+), 162 deletions(-)

-- 
2.45.3


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
@ 2025-02-11  0:01 ` Ville Syrjala
  2025-02-11  9:32   ` Jani Nikula
  2025-02-11  0:01 ` [PATCH 2/4] drm/i915: Continue intel_display_power struct intel_display conversion Ville Syrjala
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Ville Syrjala @ 2025-02-11  0:01 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Looks like I missed one of myriad CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n
special cases when converting the intel_display_power_{get,put}()
code to use struct intel_display. Only noticed after the fact
when building a EXPERT=n kernel :/

Fixes: 5dcfda5cfa42 ("drm/i915: Convert intel_display_power_{get,put}*() to intel_display")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index b5d67b6c73cf..1e4e113999fb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -217,7 +217,7 @@ intel_display_power_put_async_delay(struct intel_display *display,
 	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
 }
 #else
-void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
+void intel_display_power_put_unchecked(struct intel_display *display,
 				       enum intel_display_power_domain domain);
 
 static inline void
-- 
2.45.3


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH 2/4] drm/i915: Continue intel_display_power struct intel_display conversion
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
  2025-02-11  0:01 ` [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build Ville Syrjala
@ 2025-02-11  0:01 ` Ville Syrjala
  2025-02-11  9:35   ` Jani Nikula
  2025-02-11  0:01 ` [PATCH 3/4] drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked() Ville Syrjala
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Ville Syrjala @ 2025-02-11  0:01 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Convert the remaining intel_display_power.h interfaces to
take struct intel_display instead of struct drm_i915_private.
intel_display_power.c still has some internal uses due to
i915->runtime_pm.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c         |  2 +-
 drivers/gpu/drm/i915/display/g4x_hdmi.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      | 10 +++----
 drivers/gpu/drm/i915/display/intel_display.c  |  6 ++--
 .../drm/i915/display/intel_display_debugfs.c  |  3 +-
 .../drm/i915/display/intel_display_power.c    | 30 +++++++------------
 .../drm/i915/display/intel_display_power.h    | 15 +++++-----
 .../i915/display/intel_display_power_well.c   |  3 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 12 ++++----
 drivers/gpu/drm/i915/display/skl_watermark.c  | 16 +++++-----
 drivers/gpu/drm/i915/display/skl_watermark.h  |  3 +-
 11 files changed, 46 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 7eb5b4915f2c..d3b5ead188ba 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1389,7 +1389,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
 	dig_port->max_lanes = 4;
 
 	intel_encoder->type = INTEL_OUTPUT_DP;
-	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);
+	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
 	if (IS_CHERRYVIEW(dev_priv)) {
 		if (port == PORT_D)
 			intel_encoder->pipe_mask = BIT(PIPE_C);
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 7f13cf9b1a2e..9e1ca7767392 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -763,7 +763,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
 	intel_encoder->shutdown = intel_hdmi_encoder_shutdown;
 
 	intel_encoder->type = INTEL_OUTPUT_HDMI;
-	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);
+	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
 	intel_encoder->port = port;
 	if (IS_CHERRYVIEW(dev_priv)) {
 		if (port == PORT_D)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6e09dfcbaa7d..8e319399205a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -935,7 +935,7 @@ static enum intel_display_power_domain
 intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
 			       const struct intel_crtc_state *crtc_state)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_display *display = to_intel_display(dig_port);
 
 	/*
 	 * ICL+ HW requires corresponding AUX IOs to be powered up for PSR with
@@ -951,8 +951,8 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
 	 * extra wells.
 	 */
 	if (intel_psr_needs_aux_io_power(&dig_port->base, crtc_state))
-		return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
-	else if (DISPLAY_VER(i915) < 14 &&
+		return intel_display_power_aux_io_domain(display, dig_port->aux_ch);
+	else if (DISPLAY_VER(display) < 14 &&
 		 (intel_crtc_has_dp_encoder(crtc_state) ||
 		  intel_encoder_is_tc(&dig_port->base)))
 		return intel_aux_power_domain(dig_port);
@@ -5261,7 +5261,7 @@ void intel_ddi_init(struct intel_display *display,
 	encoder->get_power_domains = intel_ddi_get_power_domains;
 
 	encoder->type = INTEL_OUTPUT_DDI;
-	encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);
+	encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
 	encoder->port = port;
 	encoder->cloneable = 0;
 	encoder->pipe_mask = ~0;
@@ -5412,7 +5412,7 @@ void intel_ddi_init(struct intel_display *display,
 	}
 
 	drm_WARN_ON(&dev_priv->drm, port > PORT_I);
-	dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);
+	dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(display, port);
 
 	if (DISPLAY_VER(dev_priv) >= 11) {
 		if (intel_encoder_is_tc(encoder))
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9f8a8c94cf4c..2d7ac53bb924 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2112,12 +2112,12 @@ enum tc_port intel_encoder_to_tc(struct intel_encoder *encoder)
 enum intel_display_power_domain
 intel_aux_power_domain(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_display *display = to_intel_display(dig_port);
 
 	if (intel_tc_port_in_tbt_alt_mode(dig_port))
-		return intel_display_power_tbt_aux_domain(i915, dig_port->aux_ch);
+		return intel_display_power_tbt_aux_domain(display, dig_port->aux_ch);
 
-	return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+	return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
 }
 
 static void get_crtc_power_domains(struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 89e5eea90be8..09a8f667366d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -158,8 +158,9 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
 static int i915_power_domain_info(struct seq_file *m, void *unused)
 {
 	struct drm_i915_private *i915 = node_to_i915(m->private);
+	struct intel_display *display = &i915->display;
 
-	intel_display_power_debug(i915, m);
+	intel_display_power_debug(display, m);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index cfc5c0b4f907..d93f43d145a9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1056,10 +1056,9 @@ static void gen9_dbuf_slice_set(struct intel_display *display,
 		 slice, str_enable_disable(enable));
 }
 
-void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
+void gen9_dbuf_slices_update(struct intel_display *display,
 			     u8 req_slices)
 {
-	struct intel_display *display = &dev_priv->display;
 	struct i915_power_domains *power_domains = &display->power.domains;
 	u8 slice_mask = DISPLAY_INFO(display)->dbuf.slice_mask;
 	enum dbuf_slice slice;
@@ -1090,10 +1089,9 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
 
 static void gen9_dbuf_enable(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u8 slices_mask;
 
-	display->dbuf.enabled_slices = intel_enabled_dbuf_slices_mask(dev_priv);
+	display->dbuf.enabled_slices = intel_enabled_dbuf_slices_mask(display);
 
 	slices_mask = BIT(DBUF_S1) | display->dbuf.enabled_slices;
 
@@ -1104,14 +1102,12 @@ static void gen9_dbuf_enable(struct intel_display *display)
 	 * Just power up at least 1 slice, we will
 	 * figure out later which slices we have and what we need.
 	 */
-	gen9_dbuf_slices_update(dev_priv, slices_mask);
+	gen9_dbuf_slices_update(display, slices_mask);
 }
 
 static void gen9_dbuf_disable(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	gen9_dbuf_slices_update(dev_priv, 0);
+	gen9_dbuf_slices_update(display, 0);
 
 	if (DISPLAY_VER(display) >= 14)
 		intel_pmdemand_program_dbuf(display, 0);
@@ -2315,9 +2311,8 @@ void intel_display_power_resume(struct intel_display *display)
 	}
 }
 
-void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m)
+void intel_display_power_debug(struct intel_display *display, struct seq_file *m)
 {
-	struct intel_display *display = &i915->display;
 	struct i915_power_domains *power_domains = &display->power.domains;
 	int i;
 
@@ -2498,9 +2493,8 @@ intel_port_domains_for_port(struct intel_display *display, enum port port)
 }
 
 enum intel_display_power_domain
-intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port)
+intel_display_power_ddi_io_domain(struct intel_display *display, enum port port)
 {
-	struct intel_display *display = &i915->display;
 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_port(display, port);
 
 	if (drm_WARN_ON(display->drm, !domains || domains->ddi_io == POWER_DOMAIN_INVALID))
@@ -2510,9 +2504,8 @@ intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port)
 }
 
 enum intel_display_power_domain
-intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port port)
+intel_display_power_ddi_lanes_domain(struct intel_display *display, enum port port)
 {
-	struct intel_display *display = &i915->display;
 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_port(display, port);
 
 	if (drm_WARN_ON(display->drm, !domains || domains->ddi_lanes == POWER_DOMAIN_INVALID))
@@ -2537,9 +2530,8 @@ intel_port_domains_for_aux_ch(struct intel_display *display, enum aux_ch aux_ch)
 }
 
 enum intel_display_power_domain
-intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
+intel_display_power_aux_io_domain(struct intel_display *display, enum aux_ch aux_ch)
 {
-	struct intel_display *display = &i915->display;
 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(display, aux_ch);
 
 	if (drm_WARN_ON(display->drm, !domains || domains->aux_io == POWER_DOMAIN_INVALID))
@@ -2549,9 +2541,8 @@ intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux
 }
 
 enum intel_display_power_domain
-intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
+intel_display_power_legacy_aux_domain(struct intel_display *display, enum aux_ch aux_ch)
 {
-	struct intel_display *display = &i915->display;
 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(display, aux_ch);
 
 	if (drm_WARN_ON(display->drm, !domains || domains->aux_legacy_usbc == POWER_DOMAIN_INVALID))
@@ -2561,9 +2552,8 @@ intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch
 }
 
 enum intel_display_power_domain
-intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
+intel_display_power_tbt_aux_domain(struct intel_display *display, enum aux_ch aux_ch)
 {
-	struct intel_display *display = &i915->display;
 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(display, aux_ch);
 
 	if (drm_WARN_ON(display->drm, !domains || domains->aux_tbt == POWER_DOMAIN_INVALID))
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 1e4e113999fb..a3a5c1be8bab 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -13,7 +13,6 @@
 
 enum aux_ch;
 enum port;
-struct drm_i915_private;
 struct i915_power_well;
 struct intel_display;
 struct intel_encoder;
@@ -268,18 +267,18 @@ intel_display_power_put_all_in_set(struct intel_display *display,
 	intel_display_power_put_mask_in_set(display, power_domain_set, &power_domain_set->mask);
 }
 
-void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m);
+void intel_display_power_debug(struct intel_display *display, struct seq_file *m);
 
 enum intel_display_power_domain
-intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port port);
+intel_display_power_ddi_lanes_domain(struct intel_display *display, enum port port);
 enum intel_display_power_domain
-intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port);
+intel_display_power_ddi_io_domain(struct intel_display *display, enum port port);
 enum intel_display_power_domain
-intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
+intel_display_power_aux_io_domain(struct intel_display *display, enum aux_ch aux_ch);
 enum intel_display_power_domain
-intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
+intel_display_power_legacy_aux_domain(struct intel_display *display, enum aux_ch aux_ch);
 enum intel_display_power_domain
-intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
+intel_display_power_tbt_aux_domain(struct intel_display *display, enum aux_ch aux_ch);
 
 /*
  * FIXME: We should probably switch this to a 0-based scheme to be consistent
@@ -293,7 +292,7 @@ enum dbuf_slice {
 	I915_MAX_DBUF_SLICES
 };
 
-void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
+void gen9_dbuf_slices_update(struct intel_display *display,
 			     u8 req_slices);
 
 #define with_intel_display_power(display, domain, wf) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index f45a4f9ba23c..367f8e8d9e73 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -962,8 +962,7 @@ static bool gen9_dc_off_power_well_enabled(struct intel_display *display,
 
 static void gen9_assert_dbuf_enabled(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-	u8 hw_enabled_dbuf_slices = intel_enabled_dbuf_slices_mask(dev_priv);
+	u8 hw_enabled_dbuf_slices = intel_enabled_dbuf_slices_mask(display);
 	u8 enabled_dbuf_slices = display->dbuf.enabled_slices;
 
 	drm_WARN(display->drm,
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e9e9ee5d345a..b8d14ed8a56e 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -177,11 +177,11 @@ bool intel_tc_port_handles_hpd_glitches(struct intel_digital_port *dig_port)
  */
 bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_display *display = to_intel_display(dig_port);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
 
 	return tc_phy_cold_off_domain(tc) ==
-	       intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+	       intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
 }
 
 static intel_wakeref_t
@@ -478,11 +478,11 @@ static void tc_phy_load_fia_params(struct intel_tc_port *tc, bool modular_fia)
 static enum intel_display_power_domain
 icl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_display *display = to_intel_display(tc->dig_port);
 	struct intel_digital_port *dig_port = tc->dig_port;
 
 	if (tc->legacy_port)
-		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+		return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
 
 	return POWER_DOMAIN_TC_COLD_OFF;
 }
@@ -763,11 +763,11 @@ static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
 static enum intel_display_power_domain
 adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_display *display = to_intel_display(tc->dig_port);
 	struct intel_digital_port *dig_port = tc->dig_port;
 
 	if (tc->mode != TC_PORT_TBT_ALT)
-		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+		return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
 
 	return POWER_DOMAIN_TC_COLD_OFF;
 }
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 1c4510d520e8..9e97fc703903 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -52,13 +52,13 @@ struct skl_wm_params {
 	u32 dbuf_block_size;
 };
 
-u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *i915)
+u8 intel_enabled_dbuf_slices_mask(struct intel_display *display)
 {
 	u8 enabled_slices = 0;
 	enum dbuf_slice slice;
 
-	for_each_dbuf_slice(i915, slice) {
-		if (intel_de_read(i915, DBUF_CTL_S(slice)) & DBUF_POWER_STATE)
+	for_each_dbuf_slice(display, slice) {
+		if (intel_de_read(display, DBUF_CTL_S(slice)) & DBUF_POWER_STATE)
 			enabled_slices |= BIT(slice);
 	}
 
@@ -3701,7 +3701,7 @@ void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state)
 
 void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state);
 	const struct intel_dbuf_state *new_dbuf_state =
 		intel_atomic_get_new_dbuf_state(state);
 	const struct intel_dbuf_state *old_dbuf_state =
@@ -3719,12 +3719,12 @@ void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
 
 	WARN_ON(!new_dbuf_state->base.changed);
 
-	gen9_dbuf_slices_update(i915, new_slices);
+	gen9_dbuf_slices_update(display, new_slices);
 }
 
 void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state);
 	const struct intel_dbuf_state *new_dbuf_state =
 		intel_atomic_get_new_dbuf_state(state);
 	const struct intel_dbuf_state *old_dbuf_state =
@@ -3742,7 +3742,7 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
 
 	WARN_ON(!new_dbuf_state->base.changed);
 
-	gen9_dbuf_slices_update(i915, new_slices);
+	gen9_dbuf_slices_update(display, new_slices);
 }
 
 static void skl_mbus_sanitize(struct drm_i915_private *i915)
@@ -3875,7 +3875,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
 
 	skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y, hw->min_ddb, hw->interim_ddb);
 
-	hw_enabled_slices = intel_enabled_dbuf_slices_mask(i915);
+	hw_enabled_slices = intel_enabled_dbuf_slices_mask(display);
 
 	if (DISPLAY_VER(i915) >= 11 &&
 	    hw_enabled_slices != i915->display.dbuf.enabled_slices)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
index 8659f89427f2..2a93619256f8 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.h
+++ b/drivers/gpu/drm/i915/display/skl_watermark.h
@@ -16,13 +16,14 @@ struct drm_i915_private;
 struct intel_atomic_state;
 struct intel_bw_state;
 struct intel_crtc;
+struct intel_display;
 struct intel_crtc_state;
 struct intel_plane;
 struct intel_plane_state;
 struct skl_pipe_wm;
 struct skl_wm_level;
 
-u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *i915);
+u8 intel_enabled_dbuf_slices_mask(struct intel_display *display);
 
 void intel_sagv_pre_plane_update(struct intel_atomic_state *state);
 void intel_sagv_post_plane_update(struct intel_atomic_state *state);
-- 
2.45.3


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH 3/4] drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked()
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
  2025-02-11  0:01 ` [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build Ville Syrjala
  2025-02-11  0:01 ` [PATCH 2/4] drm/i915: Continue intel_display_power struct intel_display conversion Ville Syrjala
@ 2025-02-11  0:01 ` Ville Syrjala
  2025-02-11  9:38   ` Jani Nikula
  2025-02-11  0:01 ` [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff Ville Syrjala
                   ` (3 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Ville Syrjala @ 2025-02-11  0:01 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_runtime_pm_put_unchecked() is not meant to be used
outside the runtime pm implementation, so don't.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/gvt/aperture_gm.c  |  7 ++++---
 drivers/gpu/drm/i915/gvt/debugfs.c      |  5 +++--
 drivers/gpu/drm/i915/gvt/gtt.c          |  6 ++++--
 drivers/gpu/drm/i915/gvt/gvt.h          |  9 +++++----
 drivers/gpu/drm/i915/gvt/handlers.c     | 23 +++++++++++++++--------
 drivers/gpu/drm/i915/gvt/sched_policy.c |  5 +++--
 6 files changed, 34 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index eedd1865bb98..62d14f82256f 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -46,6 +46,7 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
 	unsigned int flags;
 	u64 start, end, size;
 	struct drm_mm_node *node;
+	intel_wakeref_t wakeref;
 	int ret;
 
 	if (high_gm) {
@@ -63,12 +64,12 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
 	}
 
 	mutex_lock(&gt->ggtt->vm.mutex);
-	mmio_hw_access_pre(gt);
+	wakeref = mmio_hw_access_pre(gt);
 	ret = i915_gem_gtt_insert(&gt->ggtt->vm, NULL, node,
 				  size, I915_GTT_PAGE_SIZE,
 				  I915_COLOR_UNEVICTABLE,
 				  start, end, flags);
-	mmio_hw_access_post(gt);
+	mmio_hw_access_post(gt, wakeref);
 	mutex_unlock(&gt->ggtt->vm.mutex);
 	if (ret)
 		gvt_err("fail to alloc %s gm space from host\n",
@@ -226,7 +227,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
 		vgpu->fence.regs[i] = NULL;
 	}
 	mutex_unlock(&gvt->gt->ggtt->vm.mutex);
-	intel_runtime_pm_put_unchecked(uncore->rpm);
+	intel_runtime_pm_put(uncore->rpm, wakeref);
 	return -ENOSPC;
 }
 
diff --git a/drivers/gpu/drm/i915/gvt/debugfs.c b/drivers/gpu/drm/i915/gvt/debugfs.c
index baccbf1761b7..673534f061ef 100644
--- a/drivers/gpu/drm/i915/gvt/debugfs.c
+++ b/drivers/gpu/drm/i915/gvt/debugfs.c
@@ -91,16 +91,17 @@ static int vgpu_mmio_diff_show(struct seq_file *s, void *unused)
 		.diff = 0,
 	};
 	struct diff_mmio *node, *next;
+	intel_wakeref_t wakeref;
 
 	INIT_LIST_HEAD(&param.diff_mmio_list);
 
 	mutex_lock(&gvt->lock);
 	spin_lock_bh(&gvt->scheduler.mmio_context_lock);
 
-	mmio_hw_access_pre(gvt->gt);
+	wakeref = mmio_hw_access_pre(gvt->gt);
 	/* Recognize all the diff mmios to list. */
 	intel_gvt_for_each_tracked_mmio(gvt, mmio_diff_handler, &param);
-	mmio_hw_access_post(gvt->gt);
+	mmio_hw_access_post(gvt->gt, wakeref);
 
 	spin_unlock_bh(&gvt->scheduler.mmio_context_lock);
 	mutex_unlock(&gvt->lock);
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 2fa7ca19ba5d..ae9b0ded3651 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -220,9 +220,11 @@ static u64 read_pte64(struct i915_ggtt *ggtt, unsigned long index)
 
 static void ggtt_invalidate(struct intel_gt *gt)
 {
-	mmio_hw_access_pre(gt);
+	intel_wakeref_t wakeref;
+
+	wakeref = mmio_hw_access_pre(gt);
 	intel_uncore_write(gt->uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
-	mmio_hw_access_post(gt);
+	mmio_hw_access_post(gt, wakeref);
 }
 
 static void write_pte64(struct i915_ggtt *ggtt, unsigned long index, u64 pte)
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 01d890999f25..1d10c16e6465 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -570,14 +570,15 @@ enum {
 	GVT_FAILSAFE_GUEST_ERR,
 };
 
-static inline void mmio_hw_access_pre(struct intel_gt *gt)
+static inline intel_wakeref_t mmio_hw_access_pre(struct intel_gt *gt)
 {
-	intel_runtime_pm_get(gt->uncore->rpm);
+	return intel_runtime_pm_get(gt->uncore->rpm);
 }
 
-static inline void mmio_hw_access_post(struct intel_gt *gt)
+static inline void mmio_hw_access_post(struct intel_gt *gt,
+				       intel_wakeref_t wakeref)
 {
-	intel_runtime_pm_put_unchecked(gt->uncore->rpm);
+	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 4efee6797873..02f45929592e 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -264,6 +264,7 @@ static int fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
 {
 	struct intel_gvt *gvt = vgpu->gvt;
 	unsigned int fence_num = offset_to_fence_num(off);
+	intel_wakeref_t wakeref;
 	int ret;
 
 	ret = sanitize_fence_mmio_access(vgpu, fence_num, p_data, bytes);
@@ -271,10 +272,10 @@ static int fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
 		return ret;
 	write_vreg(vgpu, off, p_data, bytes);
 
-	mmio_hw_access_pre(gvt->gt);
+	wakeref = mmio_hw_access_pre(gvt->gt);
 	intel_vgpu_write_fence(vgpu, fence_num,
 			vgpu_vreg64(vgpu, fence_num_to_offset(fence_num)));
-	mmio_hw_access_post(gvt->gt);
+	mmio_hw_access_post(gvt->gt, wakeref);
 	return 0;
 }
 
@@ -1975,10 +1976,12 @@ static int mmio_read_from_hw(struct intel_vgpu *vgpu,
 	    vgpu == gvt->scheduler.engine_owner[engine->id] ||
 	    offset == i915_mmio_reg_offset(RING_TIMESTAMP(engine->mmio_base)) ||
 	    offset == i915_mmio_reg_offset(RING_TIMESTAMP_UDW(engine->mmio_base))) {
-		mmio_hw_access_pre(gvt->gt);
+		intel_wakeref_t wakeref;
+
+		wakeref = mmio_hw_access_pre(gvt->gt);
 		vgpu_vreg(vgpu, offset) =
 			intel_uncore_read(gvt->gt->uncore, _MMIO(offset));
-		mmio_hw_access_post(gvt->gt);
+		mmio_hw_access_post(gvt->gt, wakeref);
 	}
 
 	return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
@@ -3209,10 +3212,12 @@ void intel_gvt_restore_fence(struct intel_gvt *gvt)
 	int i, id;
 
 	idr_for_each_entry(&(gvt)->vgpu_idr, vgpu, id) {
-		mmio_hw_access_pre(gvt->gt);
+		intel_wakeref_t wakeref;
+
+		wakeref = mmio_hw_access_pre(gvt->gt);
 		for (i = 0; i < vgpu_fence_sz(vgpu); i++)
 			intel_vgpu_write_fence(vgpu, i, vgpu_vreg64(vgpu, fence_num_to_offset(i)));
-		mmio_hw_access_post(gvt->gt);
+		mmio_hw_access_post(gvt->gt, wakeref);
 	}
 }
 
@@ -3233,8 +3238,10 @@ void intel_gvt_restore_mmio(struct intel_gvt *gvt)
 	int id;
 
 	idr_for_each_entry(&(gvt)->vgpu_idr, vgpu, id) {
-		mmio_hw_access_pre(gvt->gt);
+		intel_wakeref_t wakeref;
+
+		wakeref = mmio_hw_access_pre(gvt->gt);
 		intel_gvt_for_each_tracked_mmio(gvt, mmio_pm_restore_handler, vgpu);
-		mmio_hw_access_post(gvt->gt);
+		mmio_hw_access_post(gvt->gt, wakeref);
 	}
 }
diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c
index c077fb4674f0..c75b393ab0b7 100644
--- a/drivers/gpu/drm/i915/gvt/sched_policy.c
+++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
@@ -448,6 +448,7 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
+	intel_wakeref_t wakeref;
 
 	if (!vgpu_data->active)
 		return;
@@ -466,7 +467,7 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
 		scheduler->current_vgpu = NULL;
 	}
 
-	intel_runtime_pm_get(&dev_priv->runtime_pm);
+	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
 	spin_lock_bh(&scheduler->mmio_context_lock);
 	for_each_engine(engine, vgpu->gvt->gt, id) {
 		if (scheduler->engine_owner[engine->id] == vgpu) {
@@ -475,6 +476,6 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
 		}
 	}
 	spin_unlock_bh(&scheduler->mmio_context_lock);
-	intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
+	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
 	mutex_unlock(&vgpu->gvt->sched_lock);
 }
-- 
2.45.3


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
                   ` (2 preceding siblings ...)
  2025-02-11  0:01 ` [PATCH 3/4] drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked() Ville Syrjala
@ 2025-02-11  0:01 ` Ville Syrjala
  2025-02-11  9:54   ` Jani Nikula
  2025-02-11  1:14 ` ✗ Fi.CI.SPARSE: warning for drm/i915: More display power conversions Patchwork
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Ville Syrjala @ 2025-02-11  0:01 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Seem to me that intel_runtime_pm.c already handles the
CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n case perfectly fine
internally, so I don't understand why it's being leaked into
all the callers as well. Get rid of all this the externally
visible _unchecked() stuff.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 24 ---------------
 .../drm/i915/display/intel_display_power.h    | 30 -------------------
 drivers/gpu/drm/i915/intel_gvt.c              |  3 --
 drivers/gpu/drm/i915/intel_runtime_pm.c       | 19 ------------
 drivers/gpu/drm/i915/intel_runtime_pm.h       |  9 ------
 5 files changed, 85 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index d93f43d145a9..20296ab450bf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -809,7 +809,6 @@ intel_display_power_flush_work_sync(struct intel_display *display)
 	drm_WARN_ON(display->drm, power_domains->async_put_wakeref);
 }
 
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 /**
  * intel_display_power_put - release a power domain reference
  * @display: display device instance
@@ -829,29 +828,6 @@ void intel_display_power_put(struct intel_display *display,
 	__intel_display_power_put(display, domain);
 	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
 }
-#else
-/**
- * intel_display_power_put_unchecked - release an unchecked power domain reference
- * @display: display device instance
- * @domain: power domain to reference
- *
- * This function drops the power domain reference obtained by
- * intel_display_power_get() and might power down the corresponding hardware
- * block right away if this is the last reference.
- *
- * This function is only for the power domain code's internal use to suppress wakeref
- * tracking when the corresponding debug kconfig option is disabled, should not
- * be used otherwise.
- */
-void intel_display_power_put_unchecked(struct intel_display *display,
-				       enum intel_display_power_domain domain)
-{
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	__intel_display_power_put(display, domain);
-	intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
-}
-#endif
 
 void
 intel_display_power_get_in_set(struct intel_display *display,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index a3a5c1be8bab..52b8a89b96eb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -195,7 +195,6 @@ void __intel_display_power_put_async(struct intel_display *display,
 				     intel_wakeref_t wakeref,
 				     int delay_ms);
 void intel_display_power_flush_work(struct intel_display *display);
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 void intel_display_power_put(struct intel_display *display,
 			     enum intel_display_power_domain domain,
 			     intel_wakeref_t wakeref);
@@ -215,35 +214,6 @@ intel_display_power_put_async_delay(struct intel_display *display,
 {
 	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
 }
-#else
-void intel_display_power_put_unchecked(struct intel_display *display,
-				       enum intel_display_power_domain domain);
-
-static inline void
-intel_display_power_put(struct intel_display *display,
-			enum intel_display_power_domain domain,
-			intel_wakeref_t wakeref)
-{
-	intel_display_power_put_unchecked(display, domain);
-}
-
-static inline void
-intel_display_power_put_async(struct intel_display *display,
-			      enum intel_display_power_domain domain,
-			      intel_wakeref_t wakeref)
-{
-	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, -1);
-}
-
-static inline void
-intel_display_power_put_async_delay(struct intel_display *display,
-				    enum intel_display_power_domain domain,
-				    intel_wakeref_t wakeref,
-				    int delay_ms)
-{
-	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, delay_ms);
-}
-#endif
 
 void
 intel_display_power_get_in_set(struct intel_display *display,
diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
index dae9dce7d1b3..164be5b8acb3 100644
--- a/drivers/gpu/drm/i915/intel_gvt.c
+++ b/drivers/gpu/drm/i915/intel_gvt.c
@@ -310,10 +310,7 @@ EXPORT_SYMBOL_NS_GPL(__intel_context_do_pin, "I915_GVT");
 EXPORT_SYMBOL_NS_GPL(__intel_context_do_unpin, "I915_GVT");
 EXPORT_SYMBOL_NS_GPL(intel_ring_begin, "I915_GVT");
 EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_get, "I915_GVT");
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put, "I915_GVT");
-#endif
-EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put_unchecked, "I915_GVT");
 EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_for_reg, "I915_GVT");
 EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_get, "I915_GVT");
 EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_put, "I915_GVT");
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8d9f4c410546..070bafb0a460 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -322,24 +322,6 @@ intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
 	__intel_runtime_pm_put(rpm, wref, false);
 }
 
-/**
- * intel_runtime_pm_put_unchecked - release an unchecked runtime pm reference
- * @rpm: the intel_runtime_pm structure
- *
- * This function drops the device-level runtime pm reference obtained by
- * intel_runtime_pm_get() and might power down the corresponding
- * hardware block right away if this is the last reference.
- *
- * This function exists only for historical reasons and should be avoided in
- * new code, as the correctness of its use cannot be checked. Always use
- * intel_runtime_pm_put() instead.
- */
-void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm)
-{
-	__intel_runtime_pm_put(rpm, INTEL_WAKEREF_DEF, true);
-}
-
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 /**
  * intel_runtime_pm_put - release a runtime pm reference
  * @rpm: the intel_runtime_pm structure
@@ -353,7 +335,6 @@ void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
 {
 	__intel_runtime_pm_put(rpm, wref, true);
 }
-#endif
 
 /**
  * intel_runtime_pm_enable - enable runtime pm
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h b/drivers/gpu/drm/i915/intel_runtime_pm.h
index 7428bd8fa67f..6eee55e3ff0b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.h
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
@@ -204,16 +204,7 @@ intel_wakeref_t intel_runtime_pm_get_raw(struct intel_runtime_pm *rpm);
 	for ((wf) = intel_runtime_pm_get_if_active(rpm); (wf); \
 	     intel_runtime_pm_put((rpm), (wf)), (wf) = NULL)
 
-void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm);
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
-#else
-static inline void
-intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
-{
-	intel_runtime_pm_put_unchecked(rpm);
-}
-#endif
 void intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
 
 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
-- 
2.45.3


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* ✗ Fi.CI.SPARSE: warning for drm/i915: More display power conversions
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
                   ` (3 preceding siblings ...)
  2025-02-11  0:01 ` [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff Ville Syrjala
@ 2025-02-11  1:14 ` Patchwork
  2025-02-11  3:07 ` ✓ i915.CI.BAT: success " Patchwork
  2025-02-11 10:41 ` ✗ i915.CI.Full: failure " Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2025-02-11  1:14 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: More display power conversions
URL   : https://patchwork.freedesktop.org/series/144636/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2



^ permalink raw reply	[flat|nested] 13+ messages in thread

* ✓ i915.CI.BAT: success for drm/i915: More display power conversions
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
                   ` (4 preceding siblings ...)
  2025-02-11  1:14 ` ✗ Fi.CI.SPARSE: warning for drm/i915: More display power conversions Patchwork
@ 2025-02-11  3:07 ` Patchwork
  2025-02-11 10:41 ` ✗ i915.CI.Full: failure " Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2025-02-11  3:07 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 5032 bytes --]

== Series Details ==

Series: drm/i915: More display power conversions
URL   : https://patchwork.freedesktop.org/series/144636/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_16104 -> Patchwork_144636v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/index.html

Participating hosts (45 -> 42)
------------------------------

  Missing    (3): bat-apl-1 fi-snb-2520m fi-pnv-d510 

Known issues
------------

  Here are the changes found in Patchwork_144636v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@load:
    - bat-mtlp-9:         [PASS][1] -> [DMESG-WARN][2] ([i915#13494])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-mtlp-9/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-mtlp-9/igt@i915_module_load@load.html

  * igt@i915_selftest@live:
    - bat-arlh-3:         [PASS][3] -> [DMESG-FAIL][4] ([i915#12061] / [i915#12435])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-arlh-3/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-arlh-3/igt@i915_selftest@live.html
    - bat-rplp-1:         [PASS][5] -> [ABORT][6] ([i915#9413]) +1 other test abort
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-rplp-1/igt@i915_selftest@live.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-rplp-1/igt@i915_selftest@live.html
    - bat-twl-2:          [PASS][7] -> [ABORT][8] ([i915#12919] / [i915#13503])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-twl-2/igt@i915_selftest@live.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-twl-2/igt@i915_selftest@live.html

  * igt@i915_selftest@live@gt_engines:
    - bat-twl-2:          [PASS][9] -> [ABORT][10] ([i915#12919])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-twl-2/igt@i915_selftest@live@gt_engines.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-twl-2/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [PASS][11] -> [DMESG-FAIL][12] ([i915#12061])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
    - bat-mtlp-6:         [PASS][13] -> [DMESG-FAIL][14] ([i915#12061]) +1 other test dmesg-fail
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
    - bat-adlp-11:        [PASS][15] -> [ABORT][16] ([i915#9413]) +1 other test abort
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-adlp-11/igt@i915_selftest@live@workarounds.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-adlp-11/igt@i915_selftest@live@workarounds.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         [PASS][17] -> [SKIP][18] ([i915#9197]) +3 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@workarounds:
    - bat-arls-5:         [DMESG-FAIL][19] ([i915#12061]) -> [PASS][20] +1 other test pass
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/bat-arls-5/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12435
  [i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919
  [i915#13494]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13494
  [i915#13503]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13503
  [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
  [i915#9413]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413


Build changes
-------------

  * Linux: CI_DRM_16104 -> Patchwork_144636v1

  CI-20190529: 20190529
  CI_DRM_16104: 2fc58ab10139895686001c7e1ee247f15226abc4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8228: 8228
  Patchwork_144636v1: 2fc58ab10139895686001c7e1ee247f15226abc4 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/index.html

[-- Attachment #2: Type: text/html, Size: 6140 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build
  2025-02-11  0:01 ` [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build Ville Syrjala
@ 2025-02-11  9:32   ` Jani Nikula
  0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2025-02-11  9:32 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx

On Tue, 11 Feb 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Looks like I missed one of myriad CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n
> special cases when converting the intel_display_power_{get,put}()
> code to use struct intel_display. Only noticed after the fact
> when building a EXPERT=n kernel :/
>
> Fixes: 5dcfda5cfa42 ("drm/i915: Convert intel_display_power_{get,put}*() to intel_display")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

I guess I was reviewing everything that was changed, and trusted the
unchanged stuff to the compiler.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index b5d67b6c73cf..1e4e113999fb 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -217,7 +217,7 @@ intel_display_power_put_async_delay(struct intel_display *display,
>  	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
>  }
>  #else
> -void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
> +void intel_display_power_put_unchecked(struct intel_display *display,
>  				       enum intel_display_power_domain domain);
>  
>  static inline void

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH 2/4] drm/i915: Continue intel_display_power struct intel_display conversion
  2025-02-11  0:01 ` [PATCH 2/4] drm/i915: Continue intel_display_power struct intel_display conversion Ville Syrjala
@ 2025-02-11  9:35   ` Jani Nikula
  0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2025-02-11  9:35 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx

On Tue, 11 Feb 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Convert the remaining intel_display_power.h interfaces to
> take struct intel_display instead of struct drm_i915_private.
> intel_display_power.c still has some internal uses due to
> i915->runtime_pm.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/g4x_dp.c         |  2 +-
>  drivers/gpu/drm/i915/display/g4x_hdmi.c       |  2 +-
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 10 +++----
>  drivers/gpu/drm/i915/display/intel_display.c  |  6 ++--
>  .../drm/i915/display/intel_display_debugfs.c  |  3 +-
>  .../drm/i915/display/intel_display_power.c    | 30 +++++++------------
>  .../drm/i915/display/intel_display_power.h    | 15 +++++-----
>  .../i915/display/intel_display_power_well.c   |  3 +-
>  drivers/gpu/drm/i915/display/intel_tc.c       | 12 ++++----
>  drivers/gpu/drm/i915/display/skl_watermark.c  | 16 +++++-----
>  drivers/gpu/drm/i915/display/skl_watermark.h  |  3 +-
>  11 files changed, 46 insertions(+), 56 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 7eb5b4915f2c..d3b5ead188ba 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -1389,7 +1389,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
>  	dig_port->max_lanes = 4;
>  
>  	intel_encoder->type = INTEL_OUTPUT_DP;
> -	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);
> +	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
>  	if (IS_CHERRYVIEW(dev_priv)) {
>  		if (port == PORT_D)
>  			intel_encoder->pipe_mask = BIT(PIPE_C);
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 7f13cf9b1a2e..9e1ca7767392 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -763,7 +763,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>  	intel_encoder->shutdown = intel_hdmi_encoder_shutdown;
>  
>  	intel_encoder->type = INTEL_OUTPUT_HDMI;
> -	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);
> +	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
>  	intel_encoder->port = port;
>  	if (IS_CHERRYVIEW(dev_priv)) {
>  		if (port == PORT_D)
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 6e09dfcbaa7d..8e319399205a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -935,7 +935,7 @@ static enum intel_display_power_domain
>  intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
>  			       const struct intel_crtc_state *crtc_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_display *display = to_intel_display(dig_port);
>  
>  	/*
>  	 * ICL+ HW requires corresponding AUX IOs to be powered up for PSR with
> @@ -951,8 +951,8 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
>  	 * extra wells.
>  	 */
>  	if (intel_psr_needs_aux_io_power(&dig_port->base, crtc_state))
> -		return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
> -	else if (DISPLAY_VER(i915) < 14 &&
> +		return intel_display_power_aux_io_domain(display, dig_port->aux_ch);
> +	else if (DISPLAY_VER(display) < 14 &&
>  		 (intel_crtc_has_dp_encoder(crtc_state) ||
>  		  intel_encoder_is_tc(&dig_port->base)))
>  		return intel_aux_power_domain(dig_port);
> @@ -5261,7 +5261,7 @@ void intel_ddi_init(struct intel_display *display,
>  	encoder->get_power_domains = intel_ddi_get_power_domains;
>  
>  	encoder->type = INTEL_OUTPUT_DDI;
> -	encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);
> +	encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
>  	encoder->port = port;
>  	encoder->cloneable = 0;
>  	encoder->pipe_mask = ~0;
> @@ -5412,7 +5412,7 @@ void intel_ddi_init(struct intel_display *display,
>  	}
>  
>  	drm_WARN_ON(&dev_priv->drm, port > PORT_I);
> -	dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);
> +	dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(display, port);
>  
>  	if (DISPLAY_VER(dev_priv) >= 11) {
>  		if (intel_encoder_is_tc(encoder))
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 9f8a8c94cf4c..2d7ac53bb924 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2112,12 +2112,12 @@ enum tc_port intel_encoder_to_tc(struct intel_encoder *encoder)
>  enum intel_display_power_domain
>  intel_aux_power_domain(struct intel_digital_port *dig_port)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_display *display = to_intel_display(dig_port);
>  
>  	if (intel_tc_port_in_tbt_alt_mode(dig_port))
> -		return intel_display_power_tbt_aux_domain(i915, dig_port->aux_ch);
> +		return intel_display_power_tbt_aux_domain(display, dig_port->aux_ch);
>  
> -	return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
> +	return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
>  }
>  
>  static void get_crtc_power_domains(struct intel_crtc_state *crtc_state,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 89e5eea90be8..09a8f667366d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -158,8 +158,9 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
>  static int i915_power_domain_info(struct seq_file *m, void *unused)
>  {
>  	struct drm_i915_private *i915 = node_to_i915(m->private);
> +	struct intel_display *display = &i915->display;
>  
> -	intel_display_power_debug(i915, m);
> +	intel_display_power_debug(display, m);
>  
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index cfc5c0b4f907..d93f43d145a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1056,10 +1056,9 @@ static void gen9_dbuf_slice_set(struct intel_display *display,
>  		 slice, str_enable_disable(enable));
>  }
>  
> -void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
> +void gen9_dbuf_slices_update(struct intel_display *display,
>  			     u8 req_slices)
>  {
> -	struct intel_display *display = &dev_priv->display;

The simplicity of these changes is exactly why I've preferred to add
that display variable instead of inlining &dev_priv->display!

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>  	struct i915_power_domains *power_domains = &display->power.domains;
>  	u8 slice_mask = DISPLAY_INFO(display)->dbuf.slice_mask;
>  	enum dbuf_slice slice;
> @@ -1090,10 +1089,9 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
>  
>  static void gen9_dbuf_enable(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u8 slices_mask;
>  
> -	display->dbuf.enabled_slices = intel_enabled_dbuf_slices_mask(dev_priv);
> +	display->dbuf.enabled_slices = intel_enabled_dbuf_slices_mask(display);
>  
>  	slices_mask = BIT(DBUF_S1) | display->dbuf.enabled_slices;
>  
> @@ -1104,14 +1102,12 @@ static void gen9_dbuf_enable(struct intel_display *display)
>  	 * Just power up at least 1 slice, we will
>  	 * figure out later which slices we have and what we need.
>  	 */
> -	gen9_dbuf_slices_update(dev_priv, slices_mask);
> +	gen9_dbuf_slices_update(display, slices_mask);
>  }
>  
>  static void gen9_dbuf_disable(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> -	gen9_dbuf_slices_update(dev_priv, 0);
> +	gen9_dbuf_slices_update(display, 0);
>  
>  	if (DISPLAY_VER(display) >= 14)
>  		intel_pmdemand_program_dbuf(display, 0);
> @@ -2315,9 +2311,8 @@ void intel_display_power_resume(struct intel_display *display)
>  	}
>  }
>  
> -void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m)
> +void intel_display_power_debug(struct intel_display *display, struct seq_file *m)
>  {
> -	struct intel_display *display = &i915->display;
>  	struct i915_power_domains *power_domains = &display->power.domains;
>  	int i;
>  
> @@ -2498,9 +2493,8 @@ intel_port_domains_for_port(struct intel_display *display, enum port port)
>  }
>  
>  enum intel_display_power_domain
> -intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port)
> +intel_display_power_ddi_io_domain(struct intel_display *display, enum port port)
>  {
> -	struct intel_display *display = &i915->display;
>  	const struct intel_ddi_port_domains *domains = intel_port_domains_for_port(display, port);
>  
>  	if (drm_WARN_ON(display->drm, !domains || domains->ddi_io == POWER_DOMAIN_INVALID))
> @@ -2510,9 +2504,8 @@ intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port)
>  }
>  
>  enum intel_display_power_domain
> -intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port port)
> +intel_display_power_ddi_lanes_domain(struct intel_display *display, enum port port)
>  {
> -	struct intel_display *display = &i915->display;
>  	const struct intel_ddi_port_domains *domains = intel_port_domains_for_port(display, port);
>  
>  	if (drm_WARN_ON(display->drm, !domains || domains->ddi_lanes == POWER_DOMAIN_INVALID))
> @@ -2537,9 +2530,8 @@ intel_port_domains_for_aux_ch(struct intel_display *display, enum aux_ch aux_ch)
>  }
>  
>  enum intel_display_power_domain
> -intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
> +intel_display_power_aux_io_domain(struct intel_display *display, enum aux_ch aux_ch)
>  {
> -	struct intel_display *display = &i915->display;
>  	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(display, aux_ch);
>  
>  	if (drm_WARN_ON(display->drm, !domains || domains->aux_io == POWER_DOMAIN_INVALID))
> @@ -2549,9 +2541,8 @@ intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux
>  }
>  
>  enum intel_display_power_domain
> -intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
> +intel_display_power_legacy_aux_domain(struct intel_display *display, enum aux_ch aux_ch)
>  {
> -	struct intel_display *display = &i915->display;
>  	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(display, aux_ch);
>  
>  	if (drm_WARN_ON(display->drm, !domains || domains->aux_legacy_usbc == POWER_DOMAIN_INVALID))
> @@ -2561,9 +2552,8 @@ intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch
>  }
>  
>  enum intel_display_power_domain
> -intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
> +intel_display_power_tbt_aux_domain(struct intel_display *display, enum aux_ch aux_ch)
>  {
> -	struct intel_display *display = &i915->display;
>  	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(display, aux_ch);
>  
>  	if (drm_WARN_ON(display->drm, !domains || domains->aux_tbt == POWER_DOMAIN_INVALID))
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index 1e4e113999fb..a3a5c1be8bab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -13,7 +13,6 @@
>  
>  enum aux_ch;
>  enum port;
> -struct drm_i915_private;
>  struct i915_power_well;
>  struct intel_display;
>  struct intel_encoder;
> @@ -268,18 +267,18 @@ intel_display_power_put_all_in_set(struct intel_display *display,
>  	intel_display_power_put_mask_in_set(display, power_domain_set, &power_domain_set->mask);
>  }
>  
> -void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m);
> +void intel_display_power_debug(struct intel_display *display, struct seq_file *m);
>  
>  enum intel_display_power_domain
> -intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port port);
> +intel_display_power_ddi_lanes_domain(struct intel_display *display, enum port port);
>  enum intel_display_power_domain
> -intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port);
> +intel_display_power_ddi_io_domain(struct intel_display *display, enum port port);
>  enum intel_display_power_domain
> -intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
> +intel_display_power_aux_io_domain(struct intel_display *display, enum aux_ch aux_ch);
>  enum intel_display_power_domain
> -intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
> +intel_display_power_legacy_aux_domain(struct intel_display *display, enum aux_ch aux_ch);
>  enum intel_display_power_domain
> -intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
> +intel_display_power_tbt_aux_domain(struct intel_display *display, enum aux_ch aux_ch);
>  
>  /*
>   * FIXME: We should probably switch this to a 0-based scheme to be consistent
> @@ -293,7 +292,7 @@ enum dbuf_slice {
>  	I915_MAX_DBUF_SLICES
>  };
>  
> -void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
> +void gen9_dbuf_slices_update(struct intel_display *display,
>  			     u8 req_slices);
>  
>  #define with_intel_display_power(display, domain, wf) \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index f45a4f9ba23c..367f8e8d9e73 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -962,8 +962,7 @@ static bool gen9_dc_off_power_well_enabled(struct intel_display *display,
>  
>  static void gen9_assert_dbuf_enabled(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -	u8 hw_enabled_dbuf_slices = intel_enabled_dbuf_slices_mask(dev_priv);
> +	u8 hw_enabled_dbuf_slices = intel_enabled_dbuf_slices_mask(display);
>  	u8 enabled_dbuf_slices = display->dbuf.enabled_slices;
>  
>  	drm_WARN(display->drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index e9e9ee5d345a..b8d14ed8a56e 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -177,11 +177,11 @@ bool intel_tc_port_handles_hpd_glitches(struct intel_digital_port *dig_port)
>   */
>  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_display *display = to_intel_display(dig_port);
>  	struct intel_tc_port *tc = to_tc_port(dig_port);
>  
>  	return tc_phy_cold_off_domain(tc) ==
> -	       intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
> +	       intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
>  }
>  
>  static intel_wakeref_t
> @@ -478,11 +478,11 @@ static void tc_phy_load_fia_params(struct intel_tc_port *tc, bool modular_fia)
>  static enum intel_display_power_domain
>  icl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_display *display = to_intel_display(tc->dig_port);
>  	struct intel_digital_port *dig_port = tc->dig_port;
>  
>  	if (tc->legacy_port)
> -		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
> +		return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
>  
>  	return POWER_DOMAIN_TC_COLD_OFF;
>  }
> @@ -763,11 +763,11 @@ static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
>  static enum intel_display_power_domain
>  adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_display *display = to_intel_display(tc->dig_port);
>  	struct intel_digital_port *dig_port = tc->dig_port;
>  
>  	if (tc->mode != TC_PORT_TBT_ALT)
> -		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
> +		return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
>  
>  	return POWER_DOMAIN_TC_COLD_OFF;
>  }
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 1c4510d520e8..9e97fc703903 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -52,13 +52,13 @@ struct skl_wm_params {
>  	u32 dbuf_block_size;
>  };
>  
> -u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *i915)
> +u8 intel_enabled_dbuf_slices_mask(struct intel_display *display)
>  {
>  	u8 enabled_slices = 0;
>  	enum dbuf_slice slice;
>  
> -	for_each_dbuf_slice(i915, slice) {
> -		if (intel_de_read(i915, DBUF_CTL_S(slice)) & DBUF_POWER_STATE)
> +	for_each_dbuf_slice(display, slice) {
> +		if (intel_de_read(display, DBUF_CTL_S(slice)) & DBUF_POWER_STATE)
>  			enabled_slices |= BIT(slice);
>  	}
>  
> @@ -3701,7 +3701,7 @@ void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state)
>  
>  void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	struct intel_display *display = to_intel_display(state);
>  	const struct intel_dbuf_state *new_dbuf_state =
>  		intel_atomic_get_new_dbuf_state(state);
>  	const struct intel_dbuf_state *old_dbuf_state =
> @@ -3719,12 +3719,12 @@ void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
>  
>  	WARN_ON(!new_dbuf_state->base.changed);
>  
> -	gen9_dbuf_slices_update(i915, new_slices);
> +	gen9_dbuf_slices_update(display, new_slices);
>  }
>  
>  void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	struct intel_display *display = to_intel_display(state);
>  	const struct intel_dbuf_state *new_dbuf_state =
>  		intel_atomic_get_new_dbuf_state(state);
>  	const struct intel_dbuf_state *old_dbuf_state =
> @@ -3742,7 +3742,7 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
>  
>  	WARN_ON(!new_dbuf_state->base.changed);
>  
> -	gen9_dbuf_slices_update(i915, new_slices);
> +	gen9_dbuf_slices_update(display, new_slices);
>  }
>  
>  static void skl_mbus_sanitize(struct drm_i915_private *i915)
> @@ -3875,7 +3875,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
>  
>  	skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y, hw->min_ddb, hw->interim_ddb);
>  
> -	hw_enabled_slices = intel_enabled_dbuf_slices_mask(i915);
> +	hw_enabled_slices = intel_enabled_dbuf_slices_mask(display);
>  
>  	if (DISPLAY_VER(i915) >= 11 &&
>  	    hw_enabled_slices != i915->display.dbuf.enabled_slices)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
> index 8659f89427f2..2a93619256f8 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.h
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.h
> @@ -16,13 +16,14 @@ struct drm_i915_private;
>  struct intel_atomic_state;
>  struct intel_bw_state;
>  struct intel_crtc;
> +struct intel_display;
>  struct intel_crtc_state;
>  struct intel_plane;
>  struct intel_plane_state;
>  struct skl_pipe_wm;
>  struct skl_wm_level;
>  
> -u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *i915);
> +u8 intel_enabled_dbuf_slices_mask(struct intel_display *display);
>  
>  void intel_sagv_pre_plane_update(struct intel_atomic_state *state);
>  void intel_sagv_post_plane_update(struct intel_atomic_state *state);

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH 3/4] drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked()
  2025-02-11  0:01 ` [PATCH 3/4] drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked() Ville Syrjala
@ 2025-02-11  9:38   ` Jani Nikula
  0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2025-02-11  9:38 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx

On Tue, 11 Feb 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_runtime_pm_put_unchecked() is not meant to be used
> outside the runtime pm implementation, so don't.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/gvt/aperture_gm.c  |  7 ++++---
>  drivers/gpu/drm/i915/gvt/debugfs.c      |  5 +++--
>  drivers/gpu/drm/i915/gvt/gtt.c          |  6 ++++--
>  drivers/gpu/drm/i915/gvt/gvt.h          |  9 +++++----
>  drivers/gpu/drm/i915/gvt/handlers.c     | 23 +++++++++++++++--------
>  drivers/gpu/drm/i915/gvt/sched_policy.c |  5 +++--
>  6 files changed, 34 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> index eedd1865bb98..62d14f82256f 100644
> --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> @@ -46,6 +46,7 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
>  	unsigned int flags;
>  	u64 start, end, size;
>  	struct drm_mm_node *node;
> +	intel_wakeref_t wakeref;
>  	int ret;
>  
>  	if (high_gm) {
> @@ -63,12 +64,12 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
>  	}
>  
>  	mutex_lock(&gt->ggtt->vm.mutex);
> -	mmio_hw_access_pre(gt);
> +	wakeref = mmio_hw_access_pre(gt);
>  	ret = i915_gem_gtt_insert(&gt->ggtt->vm, NULL, node,
>  				  size, I915_GTT_PAGE_SIZE,
>  				  I915_COLOR_UNEVICTABLE,
>  				  start, end, flags);
> -	mmio_hw_access_post(gt);
> +	mmio_hw_access_post(gt, wakeref);
>  	mutex_unlock(&gt->ggtt->vm.mutex);
>  	if (ret)
>  		gvt_err("fail to alloc %s gm space from host\n",
> @@ -226,7 +227,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
>  		vgpu->fence.regs[i] = NULL;
>  	}
>  	mutex_unlock(&gvt->gt->ggtt->vm.mutex);
> -	intel_runtime_pm_put_unchecked(uncore->rpm);
> +	intel_runtime_pm_put(uncore->rpm, wakeref);
>  	return -ENOSPC;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/gvt/debugfs.c b/drivers/gpu/drm/i915/gvt/debugfs.c
> index baccbf1761b7..673534f061ef 100644
> --- a/drivers/gpu/drm/i915/gvt/debugfs.c
> +++ b/drivers/gpu/drm/i915/gvt/debugfs.c
> @@ -91,16 +91,17 @@ static int vgpu_mmio_diff_show(struct seq_file *s, void *unused)
>  		.diff = 0,
>  	};
>  	struct diff_mmio *node, *next;
> +	intel_wakeref_t wakeref;
>  
>  	INIT_LIST_HEAD(&param.diff_mmio_list);
>  
>  	mutex_lock(&gvt->lock);
>  	spin_lock_bh(&gvt->scheduler.mmio_context_lock);
>  
> -	mmio_hw_access_pre(gvt->gt);
> +	wakeref = mmio_hw_access_pre(gvt->gt);
>  	/* Recognize all the diff mmios to list. */
>  	intel_gvt_for_each_tracked_mmio(gvt, mmio_diff_handler, &param);
> -	mmio_hw_access_post(gvt->gt);
> +	mmio_hw_access_post(gvt->gt, wakeref);
>  
>  	spin_unlock_bh(&gvt->scheduler.mmio_context_lock);
>  	mutex_unlock(&gvt->lock);
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index 2fa7ca19ba5d..ae9b0ded3651 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -220,9 +220,11 @@ static u64 read_pte64(struct i915_ggtt *ggtt, unsigned long index)
>  
>  static void ggtt_invalidate(struct intel_gt *gt)
>  {
> -	mmio_hw_access_pre(gt);
> +	intel_wakeref_t wakeref;
> +
> +	wakeref = mmio_hw_access_pre(gt);
>  	intel_uncore_write(gt->uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> -	mmio_hw_access_post(gt);
> +	mmio_hw_access_post(gt, wakeref);
>  }
>  
>  static void write_pte64(struct i915_ggtt *ggtt, unsigned long index, u64 pte)
> diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
> index 01d890999f25..1d10c16e6465 100644
> --- a/drivers/gpu/drm/i915/gvt/gvt.h
> +++ b/drivers/gpu/drm/i915/gvt/gvt.h
> @@ -570,14 +570,15 @@ enum {
>  	GVT_FAILSAFE_GUEST_ERR,
>  };
>  
> -static inline void mmio_hw_access_pre(struct intel_gt *gt)
> +static inline intel_wakeref_t mmio_hw_access_pre(struct intel_gt *gt)
>  {
> -	intel_runtime_pm_get(gt->uncore->rpm);
> +	return intel_runtime_pm_get(gt->uncore->rpm);
>  }
>  
> -static inline void mmio_hw_access_post(struct intel_gt *gt)
> +static inline void mmio_hw_access_post(struct intel_gt *gt,
> +				       intel_wakeref_t wakeref)
>  {
> -	intel_runtime_pm_put_unchecked(gt->uncore->rpm);
> +	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 4efee6797873..02f45929592e 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -264,6 +264,7 @@ static int fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
>  {
>  	struct intel_gvt *gvt = vgpu->gvt;
>  	unsigned int fence_num = offset_to_fence_num(off);
> +	intel_wakeref_t wakeref;
>  	int ret;
>  
>  	ret = sanitize_fence_mmio_access(vgpu, fence_num, p_data, bytes);
> @@ -271,10 +272,10 @@ static int fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
>  		return ret;
>  	write_vreg(vgpu, off, p_data, bytes);
>  
> -	mmio_hw_access_pre(gvt->gt);
> +	wakeref = mmio_hw_access_pre(gvt->gt);
>  	intel_vgpu_write_fence(vgpu, fence_num,
>  			vgpu_vreg64(vgpu, fence_num_to_offset(fence_num)));
> -	mmio_hw_access_post(gvt->gt);
> +	mmio_hw_access_post(gvt->gt, wakeref);
>  	return 0;
>  }
>  
> @@ -1975,10 +1976,12 @@ static int mmio_read_from_hw(struct intel_vgpu *vgpu,
>  	    vgpu == gvt->scheduler.engine_owner[engine->id] ||
>  	    offset == i915_mmio_reg_offset(RING_TIMESTAMP(engine->mmio_base)) ||
>  	    offset == i915_mmio_reg_offset(RING_TIMESTAMP_UDW(engine->mmio_base))) {
> -		mmio_hw_access_pre(gvt->gt);
> +		intel_wakeref_t wakeref;
> +
> +		wakeref = mmio_hw_access_pre(gvt->gt);
>  		vgpu_vreg(vgpu, offset) =
>  			intel_uncore_read(gvt->gt->uncore, _MMIO(offset));
> -		mmio_hw_access_post(gvt->gt);
> +		mmio_hw_access_post(gvt->gt, wakeref);
>  	}
>  
>  	return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
> @@ -3209,10 +3212,12 @@ void intel_gvt_restore_fence(struct intel_gvt *gvt)
>  	int i, id;
>  
>  	idr_for_each_entry(&(gvt)->vgpu_idr, vgpu, id) {
> -		mmio_hw_access_pre(gvt->gt);
> +		intel_wakeref_t wakeref;
> +
> +		wakeref = mmio_hw_access_pre(gvt->gt);
>  		for (i = 0; i < vgpu_fence_sz(vgpu); i++)
>  			intel_vgpu_write_fence(vgpu, i, vgpu_vreg64(vgpu, fence_num_to_offset(i)));
> -		mmio_hw_access_post(gvt->gt);
> +		mmio_hw_access_post(gvt->gt, wakeref);
>  	}
>  }
>  
> @@ -3233,8 +3238,10 @@ void intel_gvt_restore_mmio(struct intel_gvt *gvt)
>  	int id;
>  
>  	idr_for_each_entry(&(gvt)->vgpu_idr, vgpu, id) {
> -		mmio_hw_access_pre(gvt->gt);
> +		intel_wakeref_t wakeref;
> +
> +		wakeref = mmio_hw_access_pre(gvt->gt);
>  		intel_gvt_for_each_tracked_mmio(gvt, mmio_pm_restore_handler, vgpu);
> -		mmio_hw_access_post(gvt->gt);
> +		mmio_hw_access_post(gvt->gt, wakeref);
>  	}
>  }
> diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c
> index c077fb4674f0..c75b393ab0b7 100644
> --- a/drivers/gpu/drm/i915/gvt/sched_policy.c
> +++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
> @@ -448,6 +448,7 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
>  	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
>  	struct intel_engine_cs *engine;
>  	enum intel_engine_id id;
> +	intel_wakeref_t wakeref;
>  
>  	if (!vgpu_data->active)
>  		return;
> @@ -466,7 +467,7 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
>  		scheduler->current_vgpu = NULL;
>  	}
>  
> -	intel_runtime_pm_get(&dev_priv->runtime_pm);
> +	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>  	spin_lock_bh(&scheduler->mmio_context_lock);
>  	for_each_engine(engine, vgpu->gvt->gt, id) {
>  		if (scheduler->engine_owner[engine->id] == vgpu) {
> @@ -475,6 +476,6 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
>  		}
>  	}
>  	spin_unlock_bh(&scheduler->mmio_context_lock);
> -	intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
> +	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
>  	mutex_unlock(&vgpu->gvt->sched_lock);
>  }

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff
  2025-02-11  0:01 ` [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff Ville Syrjala
@ 2025-02-11  9:54   ` Jani Nikula
  2025-02-11 12:01     ` Imre Deak
  0 siblings, 1 reply; 13+ messages in thread
From: Jani Nikula @ 2025-02-11  9:54 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx; +Cc: imre.deak

On Tue, 11 Feb 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Seem to me that intel_runtime_pm.c already handles the
> CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n case perfectly fine
> internally, so I don't understand why it's being leaked into
> all the callers as well. Get rid of all this the externally
> visible _unchecked() stuff.

I think I've sent a similar patch in the past, and I think Imre
explained the rationale was that passing the wakeref around for
non-debug builds increases code size by 1k or something.

Yet this optimization makes the code harder to read.

I'm a bit divided on this one.

Cc: Imre


BR,
Jani.









>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/intel_display_power.c    | 24 ---------------
>  .../drm/i915/display/intel_display_power.h    | 30 -------------------
>  drivers/gpu/drm/i915/intel_gvt.c              |  3 --
>  drivers/gpu/drm/i915/intel_runtime_pm.c       | 19 ------------
>  drivers/gpu/drm/i915/intel_runtime_pm.h       |  9 ------
>  5 files changed, 85 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index d93f43d145a9..20296ab450bf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -809,7 +809,6 @@ intel_display_power_flush_work_sync(struct intel_display *display)
>  	drm_WARN_ON(display->drm, power_domains->async_put_wakeref);
>  }
>  
> -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  /**
>   * intel_display_power_put - release a power domain reference
>   * @display: display device instance
> @@ -829,29 +828,6 @@ void intel_display_power_put(struct intel_display *display,
>  	__intel_display_power_put(display, domain);
>  	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
>  }
> -#else
> -/**
> - * intel_display_power_put_unchecked - release an unchecked power domain reference
> - * @display: display device instance
> - * @domain: power domain to reference
> - *
> - * This function drops the power domain reference obtained by
> - * intel_display_power_get() and might power down the corresponding hardware
> - * block right away if this is the last reference.
> - *
> - * This function is only for the power domain code's internal use to suppress wakeref
> - * tracking when the corresponding debug kconfig option is disabled, should not
> - * be used otherwise.
> - */
> -void intel_display_power_put_unchecked(struct intel_display *display,
> -				       enum intel_display_power_domain domain)
> -{
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> -	__intel_display_power_put(display, domain);
> -	intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
> -}
> -#endif
>  
>  void
>  intel_display_power_get_in_set(struct intel_display *display,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index a3a5c1be8bab..52b8a89b96eb 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -195,7 +195,6 @@ void __intel_display_power_put_async(struct intel_display *display,
>  				     intel_wakeref_t wakeref,
>  				     int delay_ms);
>  void intel_display_power_flush_work(struct intel_display *display);
> -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  void intel_display_power_put(struct intel_display *display,
>  			     enum intel_display_power_domain domain,
>  			     intel_wakeref_t wakeref);
> @@ -215,35 +214,6 @@ intel_display_power_put_async_delay(struct intel_display *display,
>  {
>  	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
>  }
> -#else
> -void intel_display_power_put_unchecked(struct intel_display *display,
> -				       enum intel_display_power_domain domain);
> -
> -static inline void
> -intel_display_power_put(struct intel_display *display,
> -			enum intel_display_power_domain domain,
> -			intel_wakeref_t wakeref)
> -{
> -	intel_display_power_put_unchecked(display, domain);
> -}
> -
> -static inline void
> -intel_display_power_put_async(struct intel_display *display,
> -			      enum intel_display_power_domain domain,
> -			      intel_wakeref_t wakeref)
> -{
> -	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, -1);
> -}
> -
> -static inline void
> -intel_display_power_put_async_delay(struct intel_display *display,
> -				    enum intel_display_power_domain domain,
> -				    intel_wakeref_t wakeref,
> -				    int delay_ms)
> -{
> -	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, delay_ms);
> -}
> -#endif
>  
>  void
>  intel_display_power_get_in_set(struct intel_display *display,
> diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
> index dae9dce7d1b3..164be5b8acb3 100644
> --- a/drivers/gpu/drm/i915/intel_gvt.c
> +++ b/drivers/gpu/drm/i915/intel_gvt.c
> @@ -310,10 +310,7 @@ EXPORT_SYMBOL_NS_GPL(__intel_context_do_pin, "I915_GVT");
>  EXPORT_SYMBOL_NS_GPL(__intel_context_do_unpin, "I915_GVT");
>  EXPORT_SYMBOL_NS_GPL(intel_ring_begin, "I915_GVT");
>  EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_get, "I915_GVT");
> -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put, "I915_GVT");
> -#endif
> -EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put_unchecked, "I915_GVT");
>  EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_for_reg, "I915_GVT");
>  EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_get, "I915_GVT");
>  EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_put, "I915_GVT");
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 8d9f4c410546..070bafb0a460 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -322,24 +322,6 @@ intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
>  	__intel_runtime_pm_put(rpm, wref, false);
>  }
>  
> -/**
> - * intel_runtime_pm_put_unchecked - release an unchecked runtime pm reference
> - * @rpm: the intel_runtime_pm structure
> - *
> - * This function drops the device-level runtime pm reference obtained by
> - * intel_runtime_pm_get() and might power down the corresponding
> - * hardware block right away if this is the last reference.
> - *
> - * This function exists only for historical reasons and should be avoided in
> - * new code, as the correctness of its use cannot be checked. Always use
> - * intel_runtime_pm_put() instead.
> - */
> -void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm)
> -{
> -	__intel_runtime_pm_put(rpm, INTEL_WAKEREF_DEF, true);
> -}
> -
> -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  /**
>   * intel_runtime_pm_put - release a runtime pm reference
>   * @rpm: the intel_runtime_pm structure
> @@ -353,7 +335,6 @@ void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
>  {
>  	__intel_runtime_pm_put(rpm, wref, true);
>  }
> -#endif
>  
>  /**
>   * intel_runtime_pm_enable - enable runtime pm
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h b/drivers/gpu/drm/i915/intel_runtime_pm.h
> index 7428bd8fa67f..6eee55e3ff0b 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.h
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
> @@ -204,16 +204,7 @@ intel_wakeref_t intel_runtime_pm_get_raw(struct intel_runtime_pm *rpm);
>  	for ((wf) = intel_runtime_pm_get_if_active(rpm); (wf); \
>  	     intel_runtime_pm_put((rpm), (wf)), (wf) = NULL)
>  
> -void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm);
> -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
> -#else
> -static inline void
> -intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
> -{
> -	intel_runtime_pm_put_unchecked(rpm);
> -}
> -#endif
>  void intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
>  
>  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* ✗ i915.CI.Full: failure for drm/i915: More display power conversions
  2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
                   ` (5 preceding siblings ...)
  2025-02-11  3:07 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-02-11 10:41 ` Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2025-02-11 10:41 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 100267 bytes --]

== Series Details ==

Series: drm/i915: More display power conversions
URL   : https://patchwork.freedesktop.org/series/144636/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_16104_full -> Patchwork_144636v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_144636v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_144636v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_144636v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-glk:          NOTRUN -> [ABORT][1] +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk4/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-glk:          [PASS][2] -> [FAIL][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-glk9/igt@gem_tiled_swapping@non-threaded.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk2/igt@gem_tiled_swapping@non-threaded.html

  * igt@kms_cursor_legacy@torture-move:
    - shard-rkl:          [PASS][4] -> [DMESG-WARN][5] +1 other test dmesg-warn
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-rkl-5/igt@kms_cursor_legacy@torture-move.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-7/igt@kms_cursor_legacy@torture-move.html

  * igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-vga1:
    - shard-snb:          NOTRUN -> [INCOMPLETE][6] +1 other test incomplete
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-snb4/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-vga1.html

  
Known issues
------------

  Here are the changes found in Patchwork_144636v1_full that come from known issues:

### CI changes ###

#### Possible fixes ####

  * boot:
    - shard-dg1:          ([PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [FAIL][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) -> ([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-18/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-18/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-18/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-18/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-18/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-17/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-17/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-17/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-14/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-14/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-14/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-14/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-13/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-13/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-13/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-13/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-12/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-12/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-12/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-12/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-17/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-17/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-17/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-17/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-17/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/boot.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@crc32:
    - shard-rkl:          NOTRUN -> [SKIP][52] ([i915#6230])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@api_intel_bb@crc32.html
    - shard-dg1:          NOTRUN -> [SKIP][53] ([i915#6230])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@api_intel_bb@crc32.html

  * igt@api_intel_bb@object-reloc-keep-cache:
    - shard-rkl:          NOTRUN -> [SKIP][54] ([i915#8411])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@api_intel_bb@object-reloc-keep-cache.html
    - shard-dg1:          NOTRUN -> [SKIP][55] ([i915#8411])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@api_intel_bb@object-reloc-keep-cache.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#8411]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-dg1:          NOTRUN -> [SKIP][57] ([i915#11078])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@device_reset@cold-reset-bound.html
    - shard-rkl:          NOTRUN -> [SKIP][58] ([i915#11078])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@device_reset@cold-reset-bound.html

  * igt@drm_fdinfo@busy-idle@vcs1:
    - shard-dg1:          NOTRUN -> [SKIP][59] ([i915#8414]) +14 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@drm_fdinfo@busy-idle@vcs1.html

  * igt@drm_fdinfo@virtual-busy:
    - shard-dg2-9:        NOTRUN -> [SKIP][60] ([i915#8414])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@drm_fdinfo@virtual-busy.html

  * igt@gem_basic@multigpu-create-close:
    - shard-tglu-1:       NOTRUN -> [SKIP][61] ([i915#7697])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_basic@multigpu-create-close.html
    - shard-dg1:          NOTRUN -> [SKIP][62] ([i915#7697])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@gem_basic@multigpu-create-close.html

  * igt@gem_busy@semaphore:
    - shard-dg2:          NOTRUN -> [SKIP][63] ([i915#3936])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@gem_busy@semaphore.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][64] ([i915#9323]) +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-dg1:          NOTRUN -> [SKIP][65] ([i915#3555] / [i915#9323])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-dg1:          NOTRUN -> [SKIP][66] ([i915#9323])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
    - shard-tglu:         NOTRUN -> [SKIP][67] ([i915#9323])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-rkl:          NOTRUN -> [SKIP][68] ([i915#13008])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@gem_ccs@large-ctrl-surf-copy.html
    - shard-dg1:          NOTRUN -> [SKIP][69] ([i915#13008])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-dg2:          NOTRUN -> [SKIP][70] ([i915#7697])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@gem_close_race@multigpu-basic-threads.html
    - shard-mtlp:         NOTRUN -> [SKIP][71] ([i915#7697])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-tglu-1:       NOTRUN -> [SKIP][72] ([i915#6335])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_create@create-ext-cpu-access-sanity-check.html
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#6335])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_create@create-ext-set-pat:
    - shard-dg2-9:        NOTRUN -> [SKIP][74] ([i915#8562])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_persistence@file:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][75] ([i915#12964]) +13 other tests dmesg-warn
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@gem_ctx_persistence@file.html

  * igt@gem_ctx_persistence@heartbeat-many:
    - shard-dg1:          NOTRUN -> [SKIP][76] ([i915#8555])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_ctx_persistence@heartbeat-many.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          NOTRUN -> [SKIP][77] ([i915#280])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@gem_ctx_sseu@invalid-args.html
    - shard-dg1:          NOTRUN -> [SKIP][78] ([i915#280])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_ctx_sseu@invalid-args.html
    - shard-tglu:         NOTRUN -> [SKIP][79] ([i915#280])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_exec_balancer@bonded-dual:
    - shard-mtlp:         NOTRUN -> [SKIP][80] ([i915#4771])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_exec_balancer@bonded-dual.html

  * igt@gem_exec_balancer@invalid-bonds:
    - shard-dg2:          NOTRUN -> [SKIP][81] ([i915#4036])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@gem_exec_balancer@invalid-bonds.html
    - shard-mtlp:         NOTRUN -> [SKIP][82] ([i915#4036])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@gem_exec_balancer@invalid-bonds.html

  * igt@gem_exec_balancer@parallel-keep-submit-fence:
    - shard-rkl:          NOTRUN -> [SKIP][83] ([i915#4525]) +1 other test skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@gem_exec_balancer@parallel-keep-submit-fence.html
    - shard-tglu-1:       NOTRUN -> [SKIP][84] ([i915#4525])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_exec_balancer@parallel-keep-submit-fence.html

  * igt@gem_exec_balancer@sliced:
    - shard-dg2-9:        NOTRUN -> [SKIP][85] ([i915#4812])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_exec_balancer@sliced.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-dg2:          NOTRUN -> [SKIP][86] ([i915#3539] / [i915#4852])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_flush@basic-uc-prw-default:
    - shard-dg2:          NOTRUN -> [SKIP][87] ([i915#3539])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@gem_exec_flush@basic-uc-prw-default.html

  * igt@gem_exec_flush@basic-uc-set-default:
    - shard-dg1:          NOTRUN -> [SKIP][88] ([i915#3539])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_exec_flush@basic-uc-set-default.html

  * igt@gem_exec_flush@basic-wb-rw-before-default:
    - shard-dg1:          NOTRUN -> [SKIP][89] ([i915#3539] / [i915#4852]) +6 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@gem_exec_flush@basic-wb-rw-before-default.html

  * igt@gem_exec_flush@basic-wb-rw-default:
    - shard-dg2-9:        NOTRUN -> [SKIP][90] ([i915#3539] / [i915#4852]) +1 other test skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_exec_flush@basic-wb-rw-default.html

  * igt@gem_exec_reloc@basic-active:
    - shard-dg2:          NOTRUN -> [SKIP][91] ([i915#3281]) +9 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@gem_exec_reloc@basic-active.html

  * igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][92] ([i915#3281]) +7 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html

  * igt@gem_exec_reloc@basic-gtt-wc-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#3281]) +12 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
    - shard-dg1:          NOTRUN -> [SKIP][94] ([i915#3281]) +5 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html

  * igt@gem_exec_reloc@basic-write-read-noreloc:
    - shard-dg2-9:        NOTRUN -> [SKIP][95] ([i915#3281]) +2 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_exec_reloc@basic-write-read-noreloc.html

  * igt@gem_exec_schedule@preempt-queue:
    - shard-dg2-9:        NOTRUN -> [SKIP][96] ([i915#4537] / [i915#4812])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_exec_schedule@preempt-queue.html

  * igt@gem_exec_schedule@preempt-queue-chain:
    - shard-mtlp:         NOTRUN -> [SKIP][97] ([i915#4537] / [i915#4812])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_exec_schedule@preempt-queue-chain.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain:
    - shard-dg2:          NOTRUN -> [SKIP][98] ([i915#4537] / [i915#4812]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@gem_exec_schedule@preempt-queue-contexts-chain.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-dg1:          NOTRUN -> [SKIP][99] ([i915#4812]) +5 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-dg1:          NOTRUN -> [SKIP][100] ([i915#4860]) +1 other test skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_fenced_exec_thrash@no-spare-fences:
    - shard-rkl:          [PASS][101] -> [DMESG-WARN][102] ([i915#12964]) +17 other tests dmesg-warn
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-rkl-5/igt@gem_fenced_exec_thrash@no-spare-fences.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-7/igt@gem_fenced_exec_thrash@no-spare-fences.html

  * igt@gem_fenced_exec_thrash@too-many-fences:
    - shard-dg2:          NOTRUN -> [SKIP][103] ([i915#4860]) +1 other test skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@gem_fenced_exec_thrash@too-many-fences.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][104] ([i915#4613]) +1 other test skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][105] ([i915#12193])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][106] ([i915#4565])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-tglu:         NOTRUN -> [SKIP][107] ([i915#4613]) +1 other test skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@gem_lmem_swapping@smem-oom.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2-9:        NOTRUN -> [TIMEOUT][108] ([i915#5493]) +1 other test timeout
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_lmem_swapping@smem-oom@lmem0.html
    - shard-dg1:          NOTRUN -> [TIMEOUT][109] ([i915#5493]) +1 other test timeout
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_lmem_swapping@verify:
    - shard-rkl:          NOTRUN -> [SKIP][110] ([i915#4613]) +3 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@gem_lmem_swapping@verify.html
    - shard-tglu-1:       NOTRUN -> [SKIP][111] ([i915#4613])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_lmem_swapping@verify.html

  * igt@gem_lmem_swapping@verify-random:
    - shard-glk:          NOTRUN -> [SKIP][112] ([i915#4613]) +2 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk9/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_madvise@dontneed-before-exec:
    - shard-mtlp:         NOTRUN -> [SKIP][113] ([i915#3282]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_madvise@dontneed-before-exec.html

  * igt@gem_madvise@dontneed-before-pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#3282]) +2 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@gem_madvise@dontneed-before-pwrite.html

  * igt@gem_media_vme:
    - shard-rkl:          NOTRUN -> [SKIP][115] ([i915#284])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@gem_media_vme.html
    - shard-tglu-1:       NOTRUN -> [SKIP][116] ([i915#284])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_media_vme.html

  * igt@gem_mmap@bad-offset:
    - shard-mtlp:         NOTRUN -> [SKIP][117] ([i915#4083]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_mmap@bad-offset.html

  * igt@gem_mmap_gtt@basic-read-write-distinct:
    - shard-mtlp:         NOTRUN -> [SKIP][118] ([i915#4077]) +3 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@gem_mmap_gtt@basic-read-write-distinct.html
    - shard-dg2:          NOTRUN -> [SKIP][119] ([i915#4077]) +4 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@gem_mmap_gtt@basic-read-write-distinct.html

  * igt@gem_mmap_gtt@cpuset-big-copy:
    - shard-dg2-9:        NOTRUN -> [SKIP][120] ([i915#4077]) +2 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_mmap_gtt@cpuset-big-copy.html

  * igt@gem_mmap_gtt@medium-copy-odd:
    - shard-dg1:          NOTRUN -> [SKIP][121] ([i915#4077]) +16 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_mmap_gtt@medium-copy-odd.html

  * igt@gem_mmap_wc@invalid-flags:
    - shard-dg2-9:        NOTRUN -> [SKIP][122] ([i915#4083]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_mmap_wc@invalid-flags.html

  * igt@gem_mmap_wc@write-read:
    - shard-dg1:          NOTRUN -> [SKIP][123] ([i915#4083]) +5 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_mmap_wc@write-read.html

  * igt@gem_mmap_wc@write-wc-read-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][124] ([i915#4083]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@gem_mmap_wc@write-wc-read-gtt.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-rkl:          NOTRUN -> [SKIP][125] ([i915#3282]) +2 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
    - shard-dg1:          NOTRUN -> [SKIP][126] ([i915#3282]) +6 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_pread@self:
    - shard-dg2-9:        NOTRUN -> [SKIP][127] ([i915#3282])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_pread@self.html

  * igt@gem_pxp@create-valid-protected-context:
    - shard-rkl:          [PASS][128] -> [TIMEOUT][129] ([i915#12964])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-rkl-8/igt@gem_pxp@create-valid-protected-context.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@gem_pxp@create-valid-protected-context.html

  * igt@gem_pxp@display-protected-crc:
    - shard-dg2:          NOTRUN -> [SKIP][130] ([i915#4270]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@gem_pxp@display-protected-crc.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-rkl:          NOTRUN -> [TIMEOUT][131] ([i915#12917] / [i915#12964]) +3 other tests timeout
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_pxp@reject-modify-context-protection-off-3:
    - shard-dg1:          NOTRUN -> [SKIP][132] ([i915#4270]) +3 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_pxp@reject-modify-context-protection-off-3.html

  * igt@gem_pxp@reject-modify-context-protection-on:
    - shard-rkl:          [PASS][133] -> [TIMEOUT][134] ([i915#12917] / [i915#12964]) +1 other test timeout
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-on.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@gem_pxp@reject-modify-context-protection-on.html

  * igt@gem_pxp@verify-pxp-stale-buf-execution:
    - shard-dg2-9:        NOTRUN -> [SKIP][135] ([i915#4270]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_pxp@verify-pxp-stale-buf-execution.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#8428]) +2 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs.html

  * igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
    - shard-dg2-9:        NOTRUN -> [SKIP][137] ([i915#5190] / [i915#8428]) +2 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_render_copy@yf-tiled-to-vebox-x-tiled.html

  * igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#5190] / [i915#8428]) +5 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][139] ([i915#4079])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_tiled_pread_basic:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#4079]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@gem_tiled_pread_basic.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-tglu:         NOTRUN -> [FAIL][141] ([i915#12941])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@gem_tiled_swapping@non-threaded.html

  * igt@gem_userptr_blits@access-control:
    - shard-mtlp:         NOTRUN -> [SKIP][142] ([i915#3297]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gem_userptr_blits@access-control.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-tglu-1:       NOTRUN -> [SKIP][143] ([i915#3297] / [i915#3323])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate:
    - shard-dg1:          NOTRUN -> [SKIP][144] ([i915#3297] / [i915#4880])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@gem_userptr_blits@map-fixed-invalidate.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-dg2:          NOTRUN -> [SKIP][145] ([i915#3297] / [i915#4880])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-dg2-9:        NOTRUN -> [SKIP][146] ([i915#3297] / [i915#4880])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#3297]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gem_userptr_blits@relocations:
    - shard-dg1:          NOTRUN -> [SKIP][148] ([i915#3281] / [i915#3297])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@gem_userptr_blits@relocations.html

  * igt@gem_userptr_blits@unsync-unmap:
    - shard-rkl:          NOTRUN -> [SKIP][149] ([i915#3297])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@gem_userptr_blits@unsync-unmap.html
    - shard-tglu-1:       NOTRUN -> [SKIP][150] ([i915#3297])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gem_userptr_blits@unsync-unmap.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-dg1:          NOTRUN -> [SKIP][151] ([i915#3297]) +2 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-tglu-1:       NOTRUN -> [SKIP][152] ([i915#2527] / [i915#2856]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@bb-secure:
    - shard-dg1:          NOTRUN -> [SKIP][153] ([i915#2527]) +3 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@gen9_exec_parse@bb-secure.html
    - shard-tglu:         NOTRUN -> [SKIP][154] ([i915#2527] / [i915#2856]) +1 other test skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@gen9_exec_parse@bb-secure.html
    - shard-dg2-9:        NOTRUN -> [SKIP][155] ([i915#2856]) +1 other test skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@gen9_exec_parse@bb-secure.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-dg2:          NOTRUN -> [SKIP][156] ([i915#2856]) +1 other test skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@gen9_exec_parse@secure-batches.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-rkl:          NOTRUN -> [SKIP][157] ([i915#2527]) +2 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@gen9_exec_parse@unaligned-access.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-mtlp:         NOTRUN -> [SKIP][158] ([i915#2856]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_fb_tiling:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#4881])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@i915_fb_tiling.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-rkl:          [PASS][160] -> [ABORT][161] ([i915#9820])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-rkl-3/igt@i915_module_load@reload-with-fault-injection.html
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@i915_module_load@reload-with-fault-injection.html
    - shard-dg1:          [PASS][162] -> [ABORT][163] ([i915#9820])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-13/igt@i915_module_load@reload-with-fault-injection.html
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@i915_module_load@reload-with-fault-injection.html
    - shard-mtlp:         NOTRUN -> [ABORT][164] ([i915#10131] / [i915#10887] / [i915#9820])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_module_load@resize-bar:
    - shard-dg1:          NOTRUN -> [SKIP][165] ([i915#7178])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@i915_module_load@resize-bar.html
    - shard-tglu:         NOTRUN -> [SKIP][166] ([i915#6412])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][167] ([i915#8399])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@i915_pm_freq_api@freq-suspend.html
    - shard-tglu-1:       NOTRUN -> [SKIP][168] ([i915#8399])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0:
    - shard-dg1:          [PASS][169] -> [FAIL][170] ([i915#3591])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
    - shard-tglu:         [PASS][171] -> [WARN][172] ([i915#2681]) +1 other test warn
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-tglu-5/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html

  * igt@i915_pm_rpm@system-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#13328])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@i915_pm_rpm@system-suspend.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-mtlp:         [PASS][174] -> [ABORT][175] ([i915#13193]) +1 other test abort
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-mtlp-3/igt@i915_pm_rpm@system-suspend-devices.html
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-7/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@i915_pm_rps@thresholds-idle-park:
    - shard-dg1:          NOTRUN -> [SKIP][176] ([i915#11681])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@i915_pm_rps@thresholds-idle-park.html

  * igt@i915_pm_sseu@full-enable:
    - shard-dg2:          NOTRUN -> [SKIP][177] ([i915#4387])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@i915_pm_sseu@full-enable.html

  * igt@i915_query@hwconfig_table:
    - shard-tglu-1:       NOTRUN -> [SKIP][178] ([i915#6245])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@i915_query@hwconfig_table.html
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#6245])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@i915_query@hwconfig_table.html

  * igt@i915_selftest@mock@memory_region:
    - shard-dg1:          NOTRUN -> [DMESG-WARN][180] ([i915#9311]) +1 other test dmesg-warn
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@i915_selftest@mock@memory_region.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - shard-dg1:          [PASS][181] -> [DMESG-WARN][182] ([i915#4391] / [i915#4423])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg1-18/igt@i915_suspend@basic-s2idle-without-i915.html
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-17/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@intel_hwmon@hwmon-write:
    - shard-rkl:          NOTRUN -> [SKIP][183] ([i915#7707])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][184] ([i915#4212])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][185] ([i915#5190])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][186] ([i915#4215] / [i915#5190])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-dg1:          NOTRUN -> [SKIP][187] ([i915#4212])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-3-y-rc-ccs-cc:
    - shard-dg1:          NOTRUN -> [SKIP][188] ([i915#8709]) +7 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-3-y-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-b-hdmi-a-3-4-rc-ccs-cc:
    - shard-dg2:          NOTRUN -> [SKIP][189] ([i915#8709]) +7 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-3/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-b-hdmi-a-3-4-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][190] ([i915#8709]) +3 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-dg2:          [PASS][191] -> [FAIL][192] ([i915#5956])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg2-2/igt@kms_atomic_transition@plane-all-modeset-transition.html
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-11/igt@kms_atomic_transition@plane-all-modeset-transition.html
    - shard-mtlp:         NOTRUN -> [SKIP][193] ([i915#1769] / [i915#3555])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#1769] / [i915#3555])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
    - shard-dg2-9:        NOTRUN -> [SKIP][195] ([i915#1769] / [i915#3555])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
    - shard-dg1:          NOTRUN -> [SKIP][196] ([i915#1769] / [i915#3555])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][197] ([i915#5956])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-11/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-dp-3.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-180:
    - shard-rkl:          NOTRUN -> [SKIP][198] ([i915#5286]) +4 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-90:
    - shard-tglu-1:       NOTRUN -> [SKIP][199] ([i915#5286]) +2 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-dg1:          NOTRUN -> [SKIP][200] ([i915#5286])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][201] ([i915#4538] / [i915#5286]) +7 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
    - shard-tglu:         NOTRUN -> [SKIP][202] ([i915#5286]) +3 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [PASS][203] -> [DMESG-FAIL][204] ([i915#13314])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][205] ([i915#3638]) +2 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-dg2-9:        NOTRUN -> [SKIP][206] +3 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][207] ([i915#3638]) +4 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][208] ([i915#4538] / [i915#5190]) +4 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][209] ([i915#5190]) +1 other test skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-dg2-9:        NOTRUN -> [SKIP][210] ([i915#4538] / [i915#5190]) +1 other test skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-mtlp:         NOTRUN -> [SKIP][211] ([i915#6187])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-dg1:          NOTRUN -> [SKIP][212] ([i915#4538]) +6 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][213] +9 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][214] ([i915#6095]) +162 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][215] ([i915#12313]) +1 other test skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
    - shard-dg2:          NOTRUN -> [SKIP][216] ([i915#12313])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][217] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#10307] / [i915#6095]) +198 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-1/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-c-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][219] ([i915#6095]) +39 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][220] ([i915#6095]) +24 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2:
    - shard-dg2-9:        NOTRUN -> [SKIP][221] ([i915#10307] / [i915#6095]) +24 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][222] ([i915#12805])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
    - shard-dg1:          NOTRUN -> [SKIP][223] ([i915#12805])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][224] ([i915#6095]) +115 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][225] ([i915#12805])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][226] ([i915#6095]) +29 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][227] -> [INCOMPLETE][228] ([i915#12796])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-glk8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk1/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][229] ([i915#12313])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
    - shard-dg1:          NOTRUN -> [SKIP][230] ([i915#12313])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-dg2-9:        NOTRUN -> [SKIP][231] ([i915#12313])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][232] ([i915#6095]) +29 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-tglu-1:       NOTRUN -> [SKIP][233] ([i915#3742])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_cdclk@mode-transition-all-outputs.html
    - shard-rkl:          NOTRUN -> [SKIP][234] ([i915#3742])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][235] ([i915#7213]) +3 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-6/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html

  * igt@kms_chamelium_audio@dp-audio:
    - shard-mtlp:         NOTRUN -> [SKIP][236] ([i915#11151] / [i915#7828]) +3 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@kms_chamelium_audio@dp-audio.html

  * igt@kms_chamelium_audio@hdmi-audio:
    - shard-rkl:          NOTRUN -> [SKIP][237] ([i915#11151] / [i915#7828]) +5 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_chamelium_audio@hdmi-audio.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-dg2-9:        NOTRUN -> [SKIP][238] ([i915#11151] / [i915#7828]) +3 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][239] ([i915#11151] / [i915#7828]) +5 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_chamelium_hpd@dp-hpd-after-suspend:
    - shard-dg1:          NOTRUN -> [SKIP][240] ([i915#11151] / [i915#7828]) +10 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
    - shard-tglu:         NOTRUN -> [SKIP][241] ([i915#11151] / [i915#7828]) +3 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-tglu-1:       NOTRUN -> [SKIP][242] ([i915#11151] / [i915#7828]) +2 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_color@deep-color:
    - shard-dg2:          [PASS][243] -> [SKIP][244] ([i915#3555])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg2-11/igt@kms_color@deep-color.html
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_color@deep-color.html
    - shard-tglu-1:       NOTRUN -> [SKIP][245] ([i915#3555] / [i915#9979])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_color@deep-color.html

  * igt@kms_content_protection@atomic:
    - shard-dg2:          NOTRUN -> [SKIP][246] ([i915#7118] / [i915#9424])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][247] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_content_protection@atomic-dpms.html
    - shard-dg1:          NOTRUN -> [SKIP][248] ([i915#7116] / [i915#9424])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-dg2-9:        NOTRUN -> [SKIP][249] ([i915#3299])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_content_protection@dp-mst-type-0.html
    - shard-tglu:         NOTRUN -> [SKIP][250] ([i915#3116] / [i915#3299])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg1:          NOTRUN -> [SKIP][251] ([i915#3299]) +2 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@mei-interface:
    - shard-rkl:          NOTRUN -> [SKIP][252] ([i915#9424])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_content_protection@mei-interface.html
    - shard-tglu-1:       NOTRUN -> [SKIP][253] ([i915#6944] / [i915#9424])
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@srm:
    - shard-mtlp:         NOTRUN -> [SKIP][254] ([i915#6944])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@srm@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][255] ([i915#7173])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-11/igt@kms_content_protection@srm@pipe-a-dp-3.html

  * igt@kms_content_protection@uevent:
    - shard-mtlp:         NOTRUN -> [SKIP][256] ([i915#6944] / [i915#9424]) +1 other test skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_content_protection@uevent.html
    - shard-rkl:          NOTRUN -> [SKIP][257] ([i915#7118] / [i915#9424])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-dg2:          NOTRUN -> [SKIP][258] ([i915#3555]) +3 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg2:          NOTRUN -> [SKIP][259] ([i915#13049]) +2 other tests skip
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-32x10:
    - shard-tglu:         NOTRUN -> [SKIP][260] ([i915#3555]) +1 other test skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_cursor_crc@cursor-random-32x10.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][261] ([i915#13049])
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_cursor_crc@cursor-random-512x512.html
    - shard-tglu-1:       NOTRUN -> [SKIP][262] ([i915#13049])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][263] ([i915#3555]) +1 other test skip
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-mtlp:         NOTRUN -> [SKIP][264] ([i915#8814])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][265] ([i915#9809]) +1 other test skip
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-dg2-9:        NOTRUN -> [SKIP][266] ([i915#13046] / [i915#5354]) +3 other tests skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
    - shard-glk:          NOTRUN -> [DMESG-WARN][267] ([i915#118])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk4/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][268] ([i915#4213])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-dg2:          NOTRUN -> [SKIP][269] ([i915#4103] / [i915#4213]) +1 other test skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][270] +13 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][271] ([i915#13046] / [i915#5354]) +5 other tests skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-dg1:          NOTRUN -> [SKIP][272] ([i915#4103] / [i915#4213])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][273] ([i915#4103]) +1 other test skip
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-tglu-1:       NOTRUN -> [SKIP][274] ([i915#4103])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-tglu-1:       NOTRUN -> [SKIP][275] ([i915#9723])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
    - shard-dg1:          NOTRUN -> [SKIP][276] ([i915#9723])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg2-9:        NOTRUN -> [SKIP][277] ([i915#3555]) +3 other tests skip
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-dg2:          NOTRUN -> [SKIP][278] ([i915#8588])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-dg1:          NOTRUN -> [SKIP][279] ([i915#3555]) +8 other tests skip
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][280] ([i915#3804])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dp_aux_dev:
    - shard-rkl:          NOTRUN -> [SKIP][281] ([i915#1257])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_dp_aux_dev.html
    - shard-dg1:          NOTRUN -> [SKIP][282] ([i915#1257])
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-basic:
    - shard-rkl:          NOTRUN -> [SKIP][283] ([i915#3555] / [i915#3840])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_dsc@dsc-basic.html
    - shard-tglu-1:       NOTRUN -> [SKIP][284] ([i915#3555] / [i915#3840])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-rkl:          NOTRUN -> [SKIP][285] ([i915#3840])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-mtlp:         NOTRUN -> [SKIP][286] ([i915#3840])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2:          NOTRUN -> [SKIP][287] ([i915#3555] / [i915#3840])
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-dg1:          NOTRUN -> [SKIP][288] ([i915#3840] / [i915#9053])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][289] ([i915#3955])
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_fbcon_fbt@psr-suspend.html
    - shard-dg1:          NOTRUN -> [SKIP][290] ([i915#3469])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_fbcon_fbt@psr-suspend.html
    - shard-tglu:         NOTRUN -> [SKIP][291] ([i915#3469])
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-dg2-9:        NOTRUN -> [SKIP][292] ([i915#4854])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-3x:
    - shard-rkl:          NOTRUN -> [SKIP][293] ([i915#1839])
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_feature_discovery@display-3x.html
    - shard-tglu-1:       NOTRUN -> [SKIP][294] ([i915#1839])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-mtlp:         NOTRUN -> [SKIP][295] ([i915#9337])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-absolute-wf_vblank:
    - shard-dg2:          NOTRUN -> [SKIP][296] ([i915#9934]) +6 other tests skip
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_flip@2x-absolute-wf_vblank.html

  * igt@kms_flip@2x-dpms-vs-vblank-race:
    - shard-mtlp:         NOTRUN -> [SKIP][297] ([i915#3637]) +4 other tests skip
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_flip@2x-dpms-vs-vblank-race.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-dg1:          NOTRUN -> [SKIP][298] ([i915#9934]) +2 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@2x-flip-vs-fences:
    - shard-tglu-1:       NOTRUN -> [SKIP][299] ([i915#3637]) +2 other tests skip
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_flip@2x-flip-vs-fences.html
    - shard-dg1:          NOTRUN -> [SKIP][300] ([i915#8381]) +1 other test skip
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_flip@2x-flip-vs-fences.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][301] ([i915#12745] / [i915#4839])
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk9/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][302] ([i915#4839])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk9/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-dg2-9:        NOTRUN -> [SKIP][303] ([i915#9934]) +2 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][304] ([i915#9934]) +4 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
    - shard-tglu:         NOTRUN -> [SKIP][305] ([i915#3637]) +2 other tests skip
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank:
    - shard-snb:          [PASS][306] -> [FAIL][307] ([i915#11989]) +1 other test fail
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-snb5/igt@kms_flip@flip-vs-absolute-wf_vblank.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-snb6/igt@kms_flip@flip-vs-absolute-wf_vblank.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][308] ([i915#2587] / [i915#2672]) +2 other tests skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-dg2-9:        NOTRUN -> [SKIP][309] ([i915#2672] / [i915#3555]) +1 other test skip
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
    - shard-tglu:         NOTRUN -> [SKIP][310] ([i915#2672] / [i915#3555]) +1 other test skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-dg2-9:        NOTRUN -> [SKIP][311] ([i915#2672]) +1 other test skip
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][312] ([i915#2672] / [i915#8813]) +1 other test skip
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-dg1:          NOTRUN -> [SKIP][313] ([i915#2587] / [i915#2672] / [i915#3555]) +1 other test skip
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
    - shard-tglu:         NOTRUN -> [SKIP][314] ([i915#2587] / [i915#2672] / [i915#3555])
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][315] ([i915#2672]) +1 other test skip
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][316] ([i915#2672] / [i915#3555]) +3 other tests skip
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
    - shard-dg1:          NOTRUN -> [SKIP][317] ([i915#2672] / [i915#3555]) +8 other tests skip
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][318] ([i915#2587] / [i915#2672]) +3 other tests skip
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][319] ([i915#2587] / [i915#2672]) +10 other tests skip
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
    - shard-rkl:          NOTRUN -> [SKIP][320] ([i915#2672] / [i915#3555]) +1 other test skip
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-glk:          NOTRUN -> [SKIP][321] +187 other tests skip
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-dg2:          NOTRUN -> [SKIP][322] ([i915#2672] / [i915#3555])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][323] ([i915#2672])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][324] ([i915#2672] / [i915#3555] / [i915#8813]) +3 other tests skip
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render:
    - shard-dg2:          [PASS][325] -> [FAIL][326] ([i915#6880])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][327] +49 other tests skip
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
    - shard-dg2-9:        NOTRUN -> [SKIP][328] ([i915#5354]) +11 other tests skip
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][329] ([i915#10055])
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
    - shard-dg2-9:        NOTRUN -> [SKIP][330] ([i915#8708]) +9 other tests skip
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][331] ([i915#8708]) +20 other tests skip
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][332] ([i915#1825]) +34 other tests skip
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][333] ([i915#4423])
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-fullscreen:
    - shard-dg2:          NOTRUN -> [SKIP][334] ([i915#5354]) +21 other tests skip
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-mtlp:         NOTRUN -> [SKIP][335] ([i915#1825]) +18 other tests skip
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen:
    - shard-tglu:         NOTRUN -> [SKIP][336] +40 other tests skip
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
    - shard-dg2-9:        NOTRUN -> [SKIP][337] ([i915#3458]) +5 other tests skip
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][338] ([i915#5439])
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
    - shard-dg1:          NOTRUN -> [SKIP][339] ([i915#5439])
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
    - shard-tglu:         NOTRUN -> [SKIP][340] ([i915#5439])
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-dg1:          NOTRUN -> [SKIP][341] ([i915#9766])
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
    - shard-tglu:         NOTRUN -> [SKIP][342] ([i915#9766])
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
    - shard-dg2-9:        NOTRUN -> [SKIP][343] ([i915#9766])
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][344] ([i915#3023]) +19 other tests skip
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][345] ([i915#8708]) +7 other tests skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][346] ([i915#3458]) +22 other tests skip
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][347] ([i915#8708]) +13 other tests skip
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][348] +41 other tests skip
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          NOTRUN -> [SKIP][349] ([i915#3458]) +13 other tests skip
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_getfb@getfb-reject-ccs:
    - shard-dg2-9:        NOTRUN -> [SKIP][350] ([i915#6118])
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_getfb@getfb-reject-ccs.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-tglu-1:       NOTRUN -> [SKIP][351] ([i915#3555] / [i915#8228]) +1 other test skip
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@invalid-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][352] ([i915#3555] / [i915#8228]) +1 other test skip
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2-9:        NOTRUN -> [SKIP][353] ([i915#3555] / [i915#8228])
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-swap:
    - shard-dg1:          NOTRUN -> [SKIP][354] ([i915#3555] / [i915#8228]) +1 other test skip
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_hdr@static-swap.html
    - shard-tglu:         NOTRUN -> [SKIP][355] ([i915#3555] / [i915#8228])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_hdr@static-swap.html

  * igt@kms_hdr@static-toggle:
    - shard-dg2:          [PASS][356] -> [SKIP][357] ([i915#3555] / [i915#8228])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg2-10/igt@kms_hdr@static-toggle.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-3/igt@kms_hdr@static-toggle.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][358] ([i915#3555] / [i915#8228]) +1 other test skip
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][359] ([i915#10656])
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_joiner@basic-big-joiner.html
    - shard-dg1:          NOTRUN -> [SKIP][360] ([i915#10656])
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_joiner@basic-big-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][361] ([i915#10656])
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][362] ([i915#12388])
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][363] ([i915#10656])
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][364] ([i915#12394])
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][365] ([i915#12339])
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-dg1:          NOTRUN -> [SKIP][366] ([i915#13522])
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-13/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
    - shard-dg2:          NOTRUN -> [SKIP][367] +8 other tests skip
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][368] -> [INCOMPLETE][369] ([i915#12756])
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-glk3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk7/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][370] ([i915#3555]) +6 other tests skip
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-dg2:          [PASS][371] -> [SKIP][372] ([i915#6953] / [i915#9423])
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg2-10/igt@kms_plane_scaling@intel-max-src-size.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-3/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b:
    - shard-mtlp:         NOTRUN -> [SKIP][373] ([i915#12247]) +4 other tests skip
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][374] ([i915#12247]) +14 other tests skip
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][375] ([i915#12247]) +14 other tests skip
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a:
    - shard-tglu-1:       NOTRUN -> [SKIP][376] ([i915#12247]) +9 other tests skip
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25:
    - shard-dg2:          NOTRUN -> [SKIP][377] ([i915#12247] / [i915#6953] / [i915#9423]) +1 other test skip
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-8/igt@kms_plane_scaling@planes-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d:
    - shard-dg1:          NOTRUN -> [SKIP][378] ([i915#12247]) +19 other tests skip
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][379] ([i915#12247] / [i915#6953])
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c:
    - shard-dg2:          NOTRUN -> [SKIP][380] ([i915#12247]) +7 other tests skip
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
    - shard-dg2-9:        NOTRUN -> [SKIP][381] ([i915#12247] / [i915#6953] / [i915#9423])
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d:
    - shard-dg2-9:        NOTRUN -> [SKIP][382] ([i915#12247]) +3 other tests skip
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-rkl:          NOTRUN -> [SKIP][383] ([i915#5354]) +1 other test skip
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-tglu-1:       NOTRUN -> [SKIP][384] ([i915#9812])
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-dg1:          NOTRUN -> [SKIP][385] ([i915#5354]) +1 other test skip
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-rkl:          NOTRUN -> [SKIP][386] ([i915#9685])
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_pm_dc@dc3co-vpb-simulation.html
    - shard-dg1:          NOTRUN -> [SKIP][387] ([i915#9685])
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_pm_dc@dc3co-vpb-simulation.html
    - shard-tglu:         NOTRUN -> [SKIP][388] ([i915#9685])
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-dg1:          NOTRUN -> [SKIP][389] ([i915#3828])
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-12/igt@kms_pm_dc@dc5-retention-flops.html
    - shard-tglu:         NOTRUN -> [SKIP][390] ([i915#3828])
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [PASS][391] -> [FAIL][392] ([i915#9295])
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-4/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-tglu-1:       NOTRUN -> [SKIP][393] ([i915#8430])
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_pm_lpsp@screens-disabled.html
    - shard-dg1:          NOTRUN -> [SKIP][394] ([i915#8430])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][395] ([i915#9519]) +1 other test skip
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_pm_rpm@dpms-lpsp.html
    - shard-dg1:          NOTRUN -> [SKIP][396] ([i915#9519])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-tglu-1:       NOTRUN -> [SKIP][397] ([i915#9519])
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-dg2:          [PASS][398] -> [SKIP][399] ([i915#9519]) +1 other test skip
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg2:          NOTRUN -> [SKIP][400] ([i915#9519])
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [PASS][401] -> [SKIP][402] ([i915#9519])
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16104/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-dg2:          NOTRUN -> [SKIP][403] ([i915#6524] / [i915#6805])
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_prime@basic-crc-hybrid.html
    - shard-mtlp:         NOTRUN -> [SKIP][404] ([i915#6524])
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-5/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_prime@d3hot:
    - shard-tglu-1:       NOTRUN -> [SKIP][405] ([i915#6524])
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_prime@d3hot.html
    - shard-dg1:          NOTRUN -> [SKIP][406] ([i915#6524]) +1 other test skip
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-18/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf:
    - shard-tglu:         NOTRUN -> [SKIP][407] ([i915#11520]) +5 other tests skip
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-glk:          NOTRUN -> [SKIP][408] ([i915#11520]) +4 other tests skip
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-glk4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][409] ([i915#11520]) +8 other tests skip
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-8/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][410] ([i915#9808])
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][411] ([i915#12316]) +2 other tests skip
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-tglu-1:       NOTRUN -> [SKIP][412] ([i915#11520]) +3 other tests skip
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-dg2-9:        NOTRUN -> [SKIP][413] ([i915#11520]) +2 other tests skip
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-dg1:          NOTRUN -> [SKIP][414] ([i915#11520]) +12 other tests skip
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-dg2:          NOTRUN -> [SKIP][415] ([i915#11520]) +5 other tests skip
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][416] ([i915#9683])
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-2/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-pr-no-drrs:
    - shard-rkl:          NOTRUN -> [SKIP][417] ([i915#1072] / [i915#9732]) +20 other tests skip
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-3/igt@kms_psr@fbc-pr-no-drrs.html

  * igt@kms_psr@fbc-psr-primary-page-flip:
    - shard-dg2-9:        NOTRUN -> [SKIP][418] ([i915#1072] / [i915#9732]) +8 other tests skip
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_psr@fbc-psr-primary-page-flip.html

  * igt@kms_psr@fbc-psr2-cursor-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][419] ([i915#9688]) +4 other tests skip
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_psr@fbc-psr2-cursor-mmap-cpu.html

  * igt@kms_psr@fbc-psr2-sprite-render:
    - shard-tglu-1:       NOTRUN -> [SKIP][420] ([i915#9732]) +9 other tests skip
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_psr@fbc-psr2-sprite-render.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][421] ([i915#1072] / [i915#9732]) +12 other tests skip
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@kms_psr@psr2-cursor-plane-onoff:
    - shard-tglu:         NOTRUN -> [SKIP][422] ([i915#9732]) +8 other tests skip
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-3/igt@kms_psr@psr2-cursor-plane-onoff.html

  * igt@kms_psr@psr2-sprite-blt:
    - shard-dg1:          NOTRUN -> [SKIP][423] ([i915#1072] / [i915#9732]) +29 other tests skip
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_psr@psr2-sprite-blt.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2:          NOTRUN -> [SKIP][424] ([i915#9685])
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@exhaust-fences:
    - shard-mtlp:         NOTRUN -> [SKIP][425] ([i915#4235])
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-2/igt@kms_rotation_crc@exhaust-fences.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          NOTRUN -> [SKIP][426] ([i915#5289])
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-rkl-5/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
    - shard-tglu-1:       NOTRUN -> [SKIP][427] ([i915#5289])
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-tglu-1/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-mtlp:         NOTRUN -> [SKIP][428] ([i915#12755])
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-mtlp-1/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-dg1:          NOTRUN -> [SKIP][429] ([i915#5289])
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg1-14/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2:          NOTRUN -> [SKIP][430] ([i915#12755] / [i915#5190])
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][431] ([i915#12755])
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-5/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-dg2-9:        NOTRUN -> [SKIP][432] ([i915#12755])
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/shard-dg2-9/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-mtlp:         NOTRUN -> [ABORT][433] ([i915#13179]) +1 other test abort
   [433]: https://intel-gfx-ci.01.org/tree/drm-t

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144636v1/index.html

[-- Attachment #2: Type: text/html, Size: 110982 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff
  2025-02-11  9:54   ` Jani Nikula
@ 2025-02-11 12:01     ` Imre Deak
  0 siblings, 0 replies; 13+ messages in thread
From: Imre Deak @ 2025-02-11 12:01 UTC (permalink / raw)
  To: Jani Nikula, Ville Syrjälä; +Cc: intel-gfx

On Tue, Feb 11, 2025 at 11:54:29AM +0200, Jani Nikula wrote:
> On Tue, 11 Feb 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Seem to me that intel_runtime_pm.c already handles the
> > CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n case perfectly fine
> > internally, so I don't understand why it's being leaked into
> > all the callers as well. Get rid of all this the externally
> > visible _unchecked() stuff.
> 
> I think I've sent a similar patch in the past, and I think Imre
> explained the rationale was that passing the wakeref around for
> non-debug builds increases code size by 1k or something.

Yes, in non-debug builds the

intel_runtime_pm_put(rpm, wakeref) calls are converted to
intel_runtime_pm_put_unchecked(rpm),

and the

intel_display_power_put(display, domain, wakeref) calls are converted to
intel_display_power_put_unchecked(display, domain).

The rational was that these are called from many (184) places, thus
saving ~2.5kB in code.

> Yet this optimization makes the code harder to read.

Ok, agree with this one and I'm not sure if the optimization justifies
it. I think the same could be achieved simpler (only a wakeref pointer
passed to intel_display_power_put(), deducing both display and domain
from the wakeref), so on the patch:
Reviewed-by: Imre Deak <imre.deak@intel.com>

> I'm a bit divided on this one.
> 
> Cc: Imre
> 
> 
> BR,
> Jani.
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  .../drm/i915/display/intel_display_power.c    | 24 ---------------
> >  .../drm/i915/display/intel_display_power.h    | 30 -------------------
> >  drivers/gpu/drm/i915/intel_gvt.c              |  3 --
> >  drivers/gpu/drm/i915/intel_runtime_pm.c       | 19 ------------
> >  drivers/gpu/drm/i915/intel_runtime_pm.h       |  9 ------
> >  5 files changed, 85 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index d93f43d145a9..20296ab450bf 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -809,7 +809,6 @@ intel_display_power_flush_work_sync(struct intel_display *display)
> >  	drm_WARN_ON(display->drm, power_domains->async_put_wakeref);
> >  }
> >  
> > -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> >  /**
> >   * intel_display_power_put - release a power domain reference
> >   * @display: display device instance
> > @@ -829,29 +828,6 @@ void intel_display_power_put(struct intel_display *display,
> >  	__intel_display_power_put(display, domain);
> >  	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> >  }
> > -#else
> > -/**
> > - * intel_display_power_put_unchecked - release an unchecked power domain reference
> > - * @display: display device instance
> > - * @domain: power domain to reference
> > - *
> > - * This function drops the power domain reference obtained by
> > - * intel_display_power_get() and might power down the corresponding hardware
> > - * block right away if this is the last reference.
> > - *
> > - * This function is only for the power domain code's internal use to suppress wakeref
> > - * tracking when the corresponding debug kconfig option is disabled, should not
> > - * be used otherwise.
> > - */
> > -void intel_display_power_put_unchecked(struct intel_display *display,
> > -				       enum intel_display_power_domain domain)
> > -{
> > -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> > -
> > -	__intel_display_power_put(display, domain);
> > -	intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
> > -}
> > -#endif
> >  
> >  void
> >  intel_display_power_get_in_set(struct intel_display *display,
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> > index a3a5c1be8bab..52b8a89b96eb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> > @@ -195,7 +195,6 @@ void __intel_display_power_put_async(struct intel_display *display,
> >  				     intel_wakeref_t wakeref,
> >  				     int delay_ms);
> >  void intel_display_power_flush_work(struct intel_display *display);
> > -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> >  void intel_display_power_put(struct intel_display *display,
> >  			     enum intel_display_power_domain domain,
> >  			     intel_wakeref_t wakeref);
> > @@ -215,35 +214,6 @@ intel_display_power_put_async_delay(struct intel_display *display,
> >  {
> >  	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
> >  }
> > -#else
> > -void intel_display_power_put_unchecked(struct intel_display *display,
> > -				       enum intel_display_power_domain domain);
> > -
> > -static inline void
> > -intel_display_power_put(struct intel_display *display,
> > -			enum intel_display_power_domain domain,
> > -			intel_wakeref_t wakeref)
> > -{
> > -	intel_display_power_put_unchecked(display, domain);
> > -}
> > -
> > -static inline void
> > -intel_display_power_put_async(struct intel_display *display,
> > -			      enum intel_display_power_domain domain,
> > -			      intel_wakeref_t wakeref)
> > -{
> > -	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, -1);
> > -}
> > -
> > -static inline void
> > -intel_display_power_put_async_delay(struct intel_display *display,
> > -				    enum intel_display_power_domain domain,
> > -				    intel_wakeref_t wakeref,
> > -				    int delay_ms)
> > -{
> > -	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, delay_ms);
> > -}
> > -#endif
> >  
> >  void
> >  intel_display_power_get_in_set(struct intel_display *display,
> > diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
> > index dae9dce7d1b3..164be5b8acb3 100644
> > --- a/drivers/gpu/drm/i915/intel_gvt.c
> > +++ b/drivers/gpu/drm/i915/intel_gvt.c
> > @@ -310,10 +310,7 @@ EXPORT_SYMBOL_NS_GPL(__intel_context_do_pin, "I915_GVT");
> >  EXPORT_SYMBOL_NS_GPL(__intel_context_do_unpin, "I915_GVT");
> >  EXPORT_SYMBOL_NS_GPL(intel_ring_begin, "I915_GVT");
> >  EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_get, "I915_GVT");
> > -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> >  EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put, "I915_GVT");
> > -#endif
> > -EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put_unchecked, "I915_GVT");
> >  EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_for_reg, "I915_GVT");
> >  EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_get, "I915_GVT");
> >  EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_put, "I915_GVT");
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 8d9f4c410546..070bafb0a460 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -322,24 +322,6 @@ intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
> >  	__intel_runtime_pm_put(rpm, wref, false);
> >  }
> >  
> > -/**
> > - * intel_runtime_pm_put_unchecked - release an unchecked runtime pm reference
> > - * @rpm: the intel_runtime_pm structure
> > - *
> > - * This function drops the device-level runtime pm reference obtained by
> > - * intel_runtime_pm_get() and might power down the corresponding
> > - * hardware block right away if this is the last reference.
> > - *
> > - * This function exists only for historical reasons and should be avoided in
> > - * new code, as the correctness of its use cannot be checked. Always use
> > - * intel_runtime_pm_put() instead.
> > - */
> > -void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm)
> > -{
> > -	__intel_runtime_pm_put(rpm, INTEL_WAKEREF_DEF, true);
> > -}
> > -
> > -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> >  /**
> >   * intel_runtime_pm_put - release a runtime pm reference
> >   * @rpm: the intel_runtime_pm structure
> > @@ -353,7 +335,6 @@ void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
> >  {
> >  	__intel_runtime_pm_put(rpm, wref, true);
> >  }
> > -#endif
> >  
> >  /**
> >   * intel_runtime_pm_enable - enable runtime pm
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h b/drivers/gpu/drm/i915/intel_runtime_pm.h
> > index 7428bd8fa67f..6eee55e3ff0b 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.h
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
> > @@ -204,16 +204,7 @@ intel_wakeref_t intel_runtime_pm_get_raw(struct intel_runtime_pm *rpm);
> >  	for ((wf) = intel_runtime_pm_get_if_active(rpm); (wf); \
> >  	     intel_runtime_pm_put((rpm), (wf)), (wf) = NULL)
> >  
> > -void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm);
> > -#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> >  void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
> > -#else
> > -static inline void
> > -intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
> > -{
> > -	intel_runtime_pm_put_unchecked(rpm);
> > -}
> > -#endif
> >  void intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
> >  
> >  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> 
> -- 
> Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2025-02-11 12:00 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-11  0:01 [PATCH 0/4] drm/i915: More display power conversions Ville Syrjala
2025-02-11  0:01 ` [PATCH 1/4] drm/i915: Fix CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n build Ville Syrjala
2025-02-11  9:32   ` Jani Nikula
2025-02-11  0:01 ` [PATCH 2/4] drm/i915: Continue intel_display_power struct intel_display conversion Ville Syrjala
2025-02-11  9:35   ` Jani Nikula
2025-02-11  0:01 ` [PATCH 3/4] drm/i915/gvt: Stop using intel_runtime_pm_put_unchecked() Ville Syrjala
2025-02-11  9:38   ` Jani Nikula
2025-02-11  0:01 ` [PATCH 4/4] drm/i915: Get rid of the _unchecked() runime pm stuff Ville Syrjala
2025-02-11  9:54   ` Jani Nikula
2025-02-11 12:01     ` Imre Deak
2025-02-11  1:14 ` ✗ Fi.CI.SPARSE: warning for drm/i915: More display power conversions Patchwork
2025-02-11  3:07 ` ✓ i915.CI.BAT: success " Patchwork
2025-02-11 10:41 ` ✗ i915.CI.Full: failure " Patchwork

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