From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/13] drm/i915: Add skl+ plane name aliases to enum plane_id
Date: Fri, 17 May 2024 18:33:46 +0300 [thread overview]
Message-ID: <87jzjsa1wl.fsf@intel.com> (raw)
In-Reply-To: <20240516135622.3498-2-ville.syrjala@linux.intel.com>
On Thu, 16 May 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Using PLANE_PRIMARY + PLANE_SPRITE? on skl+ results in a bunch
> of unnecessary head scratching. Add aliases using the skl+ plane
> names.
> And for pre-skl we only need to keep PRIMARY,SPRITE0,SPRITE1
> as we only ever have 0-2 sprites per pipe on those platforms.
Should these be changed too?
- intel_plane_set_ckey()
- for_each_plane_id_on_crtc()
I'm not sure. But there's one real issue:
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 32d10e62b2b9..d0bfee2ca643 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -238,9 +238,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
> static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
> {
> if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
> - return BIT(PLANE_SPRITE2) | BIT(PLANE_SPRITE3);
> + return BIT(PLANE_6) | BIT(PLANE_7);
> else
> - return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5);
> + return BIT(PLANE_4) | BIT(PLANE_5);
The if branches got swapped?
BR,
Jani.
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-05-17 15:33 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-16 13:56 [PATCH 00/13] drm/i915: Plane register cleanups Ville Syrjala
2024-05-16 13:56 ` [PATCH 01/13] drm/i915: Add skl+ plane name aliases to enum plane_id Ville Syrjala
2024-05-17 15:33 ` Jani Nikula [this message]
2024-05-17 15:55 ` Ville Syrjälä
2024-05-17 17:12 ` [PATCH v2 " Ville Syrjala
2024-05-20 8:56 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 02/13] drm/i915: Clean up the cursor register defines Ville Syrjala
2024-05-20 9:10 ` Jani Nikula
2024-05-20 16:23 ` Ville Syrjälä
2024-05-20 16:34 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 03/13] drm/i915: Add separate define for SEL_FETCH_CUR_CTL() Ville Syrjala
2024-05-20 9:27 ` Jani Nikula
2024-05-20 17:08 ` Ville Syrjälä
2024-05-20 17:14 ` [PATCH v2 " Ville Syrjala
2024-05-16 13:56 ` [PATCH 04/13] drm/i915: Simplify PIPESRC_ERLY_TPT definition Ville Syrjala
2024-05-20 9:35 ` Jani Nikula
2024-05-20 9:37 ` Jani Nikula
2024-05-20 9:56 ` Hogander, Jouni
2024-05-16 13:56 ` [PATCH 05/13] drm/i915: Rename selective fetch plane registers Ville Syrjala
2024-05-20 9:39 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 06/13] drm/i915: Define SEL_FETCH_PLANE registers via PICK_EVEN_2RANGES() Ville Syrjala
2024-05-23 9:15 ` Jani Nikula
2024-05-23 12:06 ` Ville Syrjälä
2024-05-16 13:56 ` [PATCH 07/13] drm/i915: Add separate defines for cursor WM/DDB register bits Ville Syrjala
2024-05-20 13:24 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 08/13] drm/i915: Move PIPEGCMAX to intel_color_regs.h Ville Syrjala
2024-05-20 13:07 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 09/13] drm/i915: Extract i9xx_plane_regs.h Ville Syrjala
2024-05-20 13:09 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 10/13] drm/i915: Polish pre-skl primary plane registers Ville Syrjala
2024-05-20 13:12 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 11/13] drm/i915: Document a few pre-skl primary plane platform dependencies Ville Syrjala
2024-05-20 13:16 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 12/13] drm/i915: Polish sprite plane register definitions Ville Syrjala
2024-05-20 13:17 ` Jani Nikula
2024-05-20 13:18 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 13/13] drm/i915: Document which platforms use which sprite registers Ville Syrjala
2024-05-20 13:18 ` Jani Nikula
2024-05-16 14:36 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanups Patchwork
2024-05-16 14:36 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-16 18:21 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-05-17 18:07 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanups (rev2) Patchwork
2024-05-17 18:08 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-17 18:26 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-18 5:46 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-20 18:08 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanups (rev3) Patchwork
2024-05-20 18:08 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-20 18:20 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-21 5:29 ` ✗ Fi.CI.IGT: failure " Patchwork
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