Re: [Intel-gfx] [PATCH 03/21] drm/i915/adl_s: Add ADL-S platform info and PCI ids

[Jani Nikula <jani.nikula@intel.com>]

On Mon, 23 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
> On 11/17/20 11:17 AM, Jani Nikula wrote:
>> On Tue, 17 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>>> From: Caz Yokoyama <caz.yokoyama@intel.com>
>>>
>>> - Add the initial platform information for Alderlake-S.
>>> - Specify ppgtt_size value
>>> - Add dma_mask_size
>>> - Add ADLS REVIDs
>>> - HW tracking(Selective Update Tracking Enable) has been
>>>   removed from ADLS. Disable PSR2 till we enable software/
>>>   manual tracking.
>>>
>>> v2:
>>> - Add support for different ADLS SOC steppings to select
>>>   correct GT/DISP stepping based on Bspec 53655 based on
>>>   feedback from Matt Roper.(aswarup)
>>>
>>> Bspec: 53597
>>> Bspec: 53648
>>> Bspec: 53655
>>> Bspec: 48028
>>> Bspec: 53650
>>> BSpec: 50422
>>>
>>> Cc: José Roberto de Souza <jose.souza@intel.com>
>>> Cc: Matt Roper <matthew.d.roper@intel.com>
>>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>>> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> Cc: Imre Deak <imre.deak@intel.com>
>>> Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com>
>>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/gt/intel_workarounds.c |  8 ++++++++
>>>  drivers/gpu/drm/i915/i915_drv.h             | 20 ++++++++++++++++++++
>>>  drivers/gpu/drm/i915/i915_pci.c             | 12 ++++++++++++
>>>  drivers/gpu/drm/i915/intel_device_info.c    |  1 +
>>>  drivers/gpu/drm/i915/intel_device_info.h    |  1 +
>>>  include/drm/i915_pciids.h                   | 13 +++++++++++++
>>>  6 files changed, 55 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> index d756155d82ea..d88d3d60fb1c 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> @@ -83,6 +83,14 @@ const struct i915_rev_steppings tgl_revids[] = {
>>>  	[1] = { .gt_stepping = REVID_B0, .disp_stepping = REVID_D0 },
>>>  };
>>>  
>>> +const struct i915_rev_steppings adls_revids[] = {
>>> +	[ADLS_REVID_A0] = { .gt_stepping = REVID_A0, .disp_stepping = REVID_A0 },
>>> +	[ADLS_REVID_A2] = { .gt_stepping = REVID_A0, .disp_stepping = REVID_A2 },
>>> +	[ADLS_REVID_B0] = { .gt_stepping = REVID_B0, .disp_stepping = REVID_B0 },
>>> +	[ADLS_REVID_G0] = { .gt_stepping = REVID_C0, .disp_stepping = REVID_B0 },
>>> +	[ADLS_REVID_C0] = { .gt_stepping = REVID_D0, .disp_stepping = REVID_C0 },
>>> +};
>>> +
>>>  static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
>>>  {
>>>  	wal->name = name;
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>> index 437916aacaa6..817a5102b94f 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -1423,6 +1423,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>>>  #define IS_TIGERLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_TIGERLAKE)
>>>  #define IS_ROCKETLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE)
>>>  #define IS_DG1(dev_priv)        IS_PLATFORM(dev_priv, INTEL_DG1)
>>> +#define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S)
>>>  #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
>>>  				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
>>>  #define IS_BDW_ULT(dev_priv) \
>>> @@ -1566,6 +1567,7 @@ extern const struct i915_rev_steppings kbl_revids[];
>>>  
>>>  enum {
>>>  	REVID_A0,
>>> +	REVID_A2,
>> 
>> Don't the numerical values matter?
>
> This is an internal mapping for Display/GT steppings and hence the values don't 
> matter as long as they are distinct. Value of SOC stepping matters which is declared
> as a separate macro and used as an index to obtain the correct Display/GT stepping info,
> to be used in conjunction 
>
>> 
>>>  	REVID_B0,
>>>  	REVID_B1,
>>>  	REVID_C0,
>>> @@ -1607,6 +1609,24 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
>>>  #define IS_DG1_REVID(p, since, until) \
>>>  	(IS_DG1(p) && IS_REVID(p, since, until))
>>>  
>>> +#define ADLS_REVID_A0		0x0
>>> +#define ADLS_REVID_A2		0x1
>>> +#define ADLS_REVID_B0		0x4
>>> +#define ADLS_REVID_G0		0x8
>>> +#define ADLS_REVID_C0		0xC /*Same as H0 ADLS SOC stepping*/
>> 
>> Why do we now have both macros and enums for this stuff?
>
> Because SOC steppings and disp/GT steppings are not the same anymore for ADL-S from 
> Bspec: 53655. What we get from drm revision id is the SOC stepping and then we need 
> to map it internally for display/GT steppins(hence separate enums to deal with this
> as it is an internal mapping for i915 driver to be used with application of WAs based
> on display stepping info)

Right. We need to hide away the platform specific "physical" steppings
in a .c file, and only have the "logical" driver steppings exposed in
the .h file.

I think the right approach for this might be to convert the physical
stepping to a logical stepping in device info init stage, and add the
logical steppings to e.g. struct intel_runtime_info. Then we can use the
*same* revid check macros everywhere.

BR,
Jani.


>
>> 
>>> +
>>> +extern const struct i915_rev_steppings adls_revids[];
>> 
>> Yuck. Oh man, we really really should not have embarked on this path of
>> adding array externs to begin with. It should have been better
>> abstracted.
>
> I agree but can you please accept this approach for ADLS as it is following similar
> convention from KBL and TGL. I can address this approach in a later patch to not use externs
> for all the platforms in question.
>
> Aditya
>
>> 
>> BR,
>> Jani.
>> 
>>> +
>>> +#define IS_ADLS_DISP_REVID(p, since, until) \
>>> +	(IS_ALDERLAKE_S(p) && \
>>> +	 adls_revids[INTEL_REVID(p)].disp_stepping >= (since) && \
>>> +	 adls_revids[INTEL_REVID(p)].disp_stepping <= (until))
>>> +
>>> +#define IS_ADLS_GT_REVID(p, since, until) \
>>> +	(IS_ALDERLAKE_S(p) && \
>>> +	 adls_revids[INTEL_REVID(p)].gt_stepping >= (since) && \
>>> +	 adls_revids[INTEL_REVID(p)].gt_stepping <= (until))
>>> +
>>>  #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
>>>  #define IS_GEN9_LP(dev_priv)	(IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
>>>  #define IS_GEN9_BC(dev_priv)	(IS_GEN(dev_priv, 9) && !IS_LP(dev_priv))
>>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>>> index 11fe790b1969..069ac0c28bb3 100644
>>> --- a/drivers/gpu/drm/i915/i915_pci.c
>>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>>> @@ -925,6 +925,17 @@ static const struct intel_device_info dg1_info __maybe_unused = {
>>>  	.ppgtt_size = 47,
>>>  };
>>>  
>>> +static const struct intel_device_info adl_s_info = {
>>> +	GEN12_FEATURES,
>>> +	PLATFORM(INTEL_ALDERLAKE_S),
>>> +	.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
>>> +	.require_force_probe = 1,
>>> +	.display.has_psr_hw_tracking = 0,
>>> +	.platform_engine_mask =
>>> +		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
>>> +	.dma_mask_size = 46,
>>> +};
>>> +
>>>  #undef GEN
>>>  #undef PLATFORM
>>>  
>>> @@ -1001,6 +1012,7 @@ static const struct pci_device_id pciidlist[] = {
>>>  	INTEL_JSL_IDS(&jsl_info),
>>>  	INTEL_TGL_12_IDS(&tgl_info),
>>>  	INTEL_RKL_IDS(&rkl_info),
>>> +	INTEL_ADLS_IDS(&adl_s_info),
>>>  	{0, 0, 0}
>>>  };
>>>  MODULE_DEVICE_TABLE(pci, pciidlist);
>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>>> index e67cec8fa2aa..7310e019c611 100644
>>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>>> @@ -66,6 +66,7 @@ static const char * const platform_names[] = {
>>>  	PLATFORM_NAME(TIGERLAKE),
>>>  	PLATFORM_NAME(ROCKETLAKE),
>>>  	PLATFORM_NAME(DG1),
>>> +	PLATFORM_NAME(ALDERLAKE_S),
>>>  };
>>>  #undef PLATFORM_NAME
>>>  
>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>>> index d92fa041c700..360f3f1835f5 100644
>>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>>> +++ b/drivers/gpu/drm/i915/intel_device_info.h
>>> @@ -84,6 +84,7 @@ enum intel_platform {
>>>  	INTEL_TIGERLAKE,
>>>  	INTEL_ROCKETLAKE,
>>>  	INTEL_DG1,
>>> +	INTEL_ALDERLAKE_S,
>>>  	INTEL_MAX_PLATFORMS
>>>  };
>>>  
>>> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>>> index 931e46191047..ae53ff8462ae 100644
>>> --- a/include/drm/i915_pciids.h
>>> +++ b/include/drm/i915_pciids.h
>>> @@ -634,4 +634,17 @@
>>>  	INTEL_VGA_DEVICE(0x4907, info), \
>>>  	INTEL_VGA_DEVICE(0x4908, info)
>>>  
>>> +/* ADL-S */
>>> +#define INTEL_ADLS_IDS(info) \
>>> +	INTEL_VGA_DEVICE(0x4680, info), \
>>> +	INTEL_VGA_DEVICE(0x4681, info), \
>>> +	INTEL_VGA_DEVICE(0x4682, info), \
>>> +	INTEL_VGA_DEVICE(0x4683, info), \
>>> +	INTEL_VGA_DEVICE(0x4690, info), \
>>> +	INTEL_VGA_DEVICE(0x4691, info), \
>>> +	INTEL_VGA_DEVICE(0x4692, info), \
>>> +	INTEL_VGA_DEVICE(0x4693, info), \
>>> +	INTEL_VGA_DEVICE(0x4698, info), \
>>> +	INTEL_VGA_DEVICE(0x4699, info)
>>> +
>>>  #endif /* _I915_PCIIDS_H */
>> 
>

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx