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From: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>
To: "Swarup, Aditya" <aditya.swarup@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"De Marchi, Lucas" <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 13/21] drm/i915/adl_s: Update combo PHY master/slave relationships
Date: Wed, 25 Nov 2020 23:38:57 +0000	[thread overview]
Message-ID: <c505373b2d674312b6773e09f93e5e3f@intel.com> (raw)
In-Reply-To: <20201117185029.22078-14-aditya.swarup@intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Aditya Swarup
> Sent: Tuesday, November 17, 2020 10:50 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>
> Subject: [Intel-gfx] [PATCH 13/21] drm/i915/adl_s: Update combo PHY
> master/slave relationships
> 
> From: Matt Roper <matthew.d.roper@intel.com>
> 
> ADL-S switches up which PHYs are considered a master to other PHYs; PHY-C
> is no longer a master, but PHY-D is now.
> 
> Bspec: 49291
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_combo_phy.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> index d5ad61e4083e..55d2d2d9efbb 100644
> --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> @@ -246,14 +246,21 @@ static bool phy_is_master(struct
> drm_i915_private *dev_priv, enum phy phy)
>  	 * RKL,DG1:
>  	 *   A(master) -> B(slave)
>  	 *   C(master) -> D(slave)
> +	 * ADL-S:
> +	 *   A(master) -> B(slave), C(slave)
> +	 *   D(master) -> E(slave)
>  	 *
>  	 * We must set the IREFGEN bit for any PHY acting as a master
>  	 * to another PHY.
>  	 */
> -	if ((IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) && phy ==
> PHY_C)
> +	if (phy == PHY_A)
>  		return true;
> +	else if (IS_ALDERLAKE_S(dev_priv))
> +		return phy == PHY_D;
> +	else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
> +		return phy == PHY_C;
> 
> -	return phy == PHY_A;
> +	return false;
>  }
> 
>  static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
> --
> 2.27.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2020-11-25 23:39 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-17 18:50 [Intel-gfx] [PATCH 00/21] Introduce Alderlake-S Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 01/21] drm/i915/dg1: Enable ports Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 02/21] drm/i915/tgl: Fix macros for TGL SOC based WA Aditya Swarup
2020-11-17 19:03   ` Souza, Jose
2020-11-17 19:28     ` Lucas De Marchi
2020-11-17 19:33       ` Souza, Jose
2020-11-18  7:56         ` Lucas De Marchi
2020-11-17 19:31   ` Lucas De Marchi
2020-11-18  9:18     ` Jani Nikula
2020-11-24  1:32       ` Aditya Swarup
2020-11-24 13:14         ` Lucas De Marchi
2020-11-24 14:20           ` Jani Nikula
2020-11-24 20:11             ` Lucas De Marchi
2020-11-25  0:48               ` Aditya Swarup
2020-11-25  8:36                 ` Jani Nikula
2020-11-17 18:50 ` [Intel-gfx] [PATCH 03/21] drm/i915/adl_s: Add ADL-S platform info and PCI ids Aditya Swarup
2020-11-17 19:17   ` Jani Nikula
2020-11-24  1:50     ` Aditya Swarup
2020-11-24  9:28       ` Jani Nikula
2020-11-17 18:50 ` [Intel-gfx] [PATCH 04/21] x86/gpu: add ADL_S stolen memory support Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 05/21] drm/i915/adl_s: Add PCH support Aditya Swarup
2020-11-20  0:09   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 06/21] drm/i915/adl_s: Add Interrupt Support Aditya Swarup
2020-11-20  0:12   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 07/21] drm/i915/adl_s: Add PHYs for Alderlake S Aditya Swarup
2020-11-20  0:20   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 08/21] drm/i915/adl_s: Configure DPLL for ADL-S Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 09/21] drm/i915/adl_s: Configure Port clock registers " Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 10/21] drm/i915/adl_s: Add HTI support and initialize display " Aditya Swarup
2020-11-20  0:27   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 11/21] drm/i915/adl_s: Add adl-s ddc pin mapping Aditya Swarup
2020-11-20  0:33   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 12/21] drm/i915/adl_s: Add vbt port and aux channel settings for adls Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 13/21] drm/i915/adl_s: Update combo PHY master/slave relationships Aditya Swarup
2020-11-25 23:38   ` Srivatsa, Anusha [this message]
2020-11-17 18:50 ` [Intel-gfx] [PATCH 14/21] drm/i915/adl_s: Update PHY_MISC programming Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 15/21] drm/i915/adl_s: Add display, gt, ctx and ADL-S Aditya Swarup
2020-12-01 18:46   ` Srivatsa, Anusha
2020-12-01 20:51     ` Lucas De Marchi
2020-11-17 18:50 ` [Intel-gfx] [PATCH 16/21] drm/i915/adl_s: MCHBAR memory info registers are moved Aditya Swarup
2020-11-20 20:18   ` Lucas De Marchi
2020-11-20 20:39     ` Caz Yokoyama
2020-11-25  0:11   ` Lucas De Marchi
2020-11-17 18:50 ` [Intel-gfx] [PATCH 17/21] drm/i915/adl_s: Add power wells Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 18/21] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2020-11-25 22:52   ` Srivatsa, Anusha
2020-11-17 18:50 ` [Intel-gfx] [PATCH 19/21] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION Aditya Swarup
2020-12-01 18:35   ` Srivatsa, Anusha
2020-11-17 18:50 ` [Intel-gfx] [PATCH 20/21] drm/i915/adl_s: Load DMC Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 21/21] drm/i915/adl_s: Update memory bandwidth parameters Aditya Swarup
2020-11-25 22:46   ` Srivatsa, Anusha
2020-11-18  1:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Alderlake-S (rev2) Patchwork
2020-11-18  1:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-18  1:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-18  7:53 ` [Intel-gfx] [PATCH 00/21] Introduce Alderlake-S Lucas De Marchi
2020-11-18 15:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce Alderlake-S (rev2) Patchwork

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