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* [Intel-gfx] [PATCH] drm/i915/display: Add missing checks for cdclk crawling
@ 2022-11-10  5:37 Anusha Srivatsa
  2022-11-10 11:28 ` Jani Nikula
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Anusha Srivatsa @ 2022-11-10  5:37 UTC (permalink / raw)
  To: intel-gfx

cdclk_sanitize() function was written assuming vco was a signed integer.
vco gets assigned to -1 (essentially ~0) for the case where PLL
might be enabled and vco is not a frequency that will ever
get used. In such a scenario the right thing to do is disable the
PLL and re-enable it again with a valid frequency.
However the vco is declared as a unsigned variable.
With the above assumption, driver takes crawl path when not needed.
Add explicit check to not crawl in the case of an invalid PLL.

Cc: Matt Roper <matthew.d.roper@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 ++
 drivers/gpu/drm/i915/display/intel_cdclk.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 8a9031012d74..91112d266763 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1962,6 +1962,8 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 	if (!HAS_CDCLK_CRAWL(dev_priv))
 		return false;
 
+	if (intel_pll_is_unknown(a->vco))
+		return false;
 	/*
 	 * The vco and cd2x divider will change independently
 	 * from each, so we disallow cd2x change when crawling.
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index c674879a84a5..6eb83d806f11 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -80,6 +80,7 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state);
 	to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj))
 #define intel_atomic_get_new_cdclk_state(state) \
 	to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj))
+#define intel_pll_is_unknown(vco)	((vco) == ~0)
 
 int intel_cdclk_init(struct drm_i915_private *dev_priv);
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/display: Add missing checks for cdclk crawling
@ 2022-11-11 19:26 Anusha Srivatsa
  2022-11-11 19:39 ` Ville Syrjälä
  0 siblings, 1 reply; 10+ messages in thread
From: Anusha Srivatsa @ 2022-11-11 19:26 UTC (permalink / raw)
  To: intel-gfx

cdclk_sanitize() function was written assuming vco was a signed integer.
vco gets assigned to -1 (essentially ~0) for the case where PLL
might be enabled and vco is not a frequency that will ever
get used. In such a scenario the right thing to do is disable the
PLL and re-enable it again with a valid frequency.
However the vco is declared as a unsigned variable.
With the above assumption, driver takes crawl path when not needed.
Add explicit check to not crawl in the case of an invalid PLL.

v2: Move the check from .h to .c (MattR)
- Move check to bxt_set_cdclk() instead of
intel_modeset_calc_cdclk() which is directly in
the path of the sanitize() function (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 8a9031012d74..2d9b7ba58358 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1716,6 +1716,16 @@ static void dg2_cdclk_squash_program(struct drm_i915_private *i915,
 	intel_de_write(i915, CDCLK_SQUASH_CTL, squash_ctl);
 }
 
+static bool cdclk_pll_is_unknown(unsigned int vco)
+{
+	/*
+	 * Ensure driver does not take the crawl path for the
+	 * case when the vco is set to ~0 in the
+	 * sanitize path.
+	 */
+	return (vco == ~0);
+}
+
 static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
 			  const struct intel_cdclk_config *cdclk_config,
 			  enum pipe pipe)
@@ -1748,7 +1758,8 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
 		return;
 	}
 
-	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco > 0 && vco > 0) {
+	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco > 0 && vco > 0 &&
+	    (!cdclk_pll_is_unknown(dev_priv->display.cdclk.hw.vco))) {
 		if (dev_priv->display.cdclk.hw.vco != vco)
 			adlp_cdclk_pll_crawl(dev_priv, vco);
 	} else if (DISPLAY_VER(dev_priv) >= 11)
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-11-14 16:19 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-11-10  5:37 [Intel-gfx] [PATCH] drm/i915/display: Add missing checks for cdclk crawling Anusha Srivatsa
2022-11-10 11:28 ` Jani Nikula
2022-11-10 17:43   ` Matt Roper
2022-11-10 21:20 ` Ville Syrjälä
2022-11-10 21:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2022-11-10 21:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-11  6:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-11-11 19:26 [Intel-gfx] [PATCH] " Anusha Srivatsa
2022-11-11 19:39 ` Ville Syrjälä
2022-11-14 16:19   ` Srivatsa, Anusha

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