From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
Date: Wed, 13 Nov 2019 18:03:05 +0200 [thread overview]
Message-ID: <87o8xf7ohy.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20191112223600.30993-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Be consistent in our mocs setup on Tigerlake and set the unused control
> value to follow the PTE entry as we previously have done. The unused
> values are beyond the defines of the ABI, the consistency simplifies our
> checking.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 6e881c735b20..d2b445d6c258 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -489,7 +489,7 @@ static void intel_mocs_init_global(struct intel_gt *gt)
> for (; index < table.n_entries; index++)
> intel_uncore_write(uncore,
> GEN12_GLOBAL_MOCS(index),
> - table.table[0].control_value);
> + table.table[I915_MOCS_PTE].control_value);
> }
>
> void intel_mocs_init(struct intel_gt *gt)
> --
> 2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
Date: Wed, 13 Nov 2019 18:03:05 +0200 [thread overview]
Message-ID: <87o8xf7ohy.fsf@gaia.fi.intel.com> (raw)
Message-ID: <20191113160305.zZfAwH6lDiLIy30TGAVysVsBhVCG7rG_Ya6wyLMwdpY@z> (raw)
In-Reply-To: <20191112223600.30993-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Be consistent in our mocs setup on Tigerlake and set the unused control
> value to follow the PTE entry as we previously have done. The unused
> values are beyond the defines of the ABI, the consistency simplifies our
> checking.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 6e881c735b20..d2b445d6c258 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -489,7 +489,7 @@ static void intel_mocs_init_global(struct intel_gt *gt)
> for (; index < table.n_entries; index++)
> intel_uncore_write(uncore,
> GEN12_GLOBAL_MOCS(index),
> - table.table[0].control_value);
> + table.table[I915_MOCS_PTE].control_value);
> }
>
> void intel_mocs_init(struct intel_gt *gt)
> --
> 2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-13 16:03 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 22:35 [PATCH 1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Chris Wilson
2019-11-12 22:35 ` [Intel-gfx] " Chris Wilson
2019-11-12 22:35 ` [PATCH 2/4] drm/i915/gt: Tidy up debug-warns for the mocs control table Chris Wilson
2019-11-12 22:35 ` [Intel-gfx] " Chris Wilson
2019-11-14 17:33 ` Mika Kuoppala
2019-11-14 17:33 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 22:35 ` [PATCH 3/4] drm/i915/gt: Refactor mocs loops into single control macro Chris Wilson
2019-11-12 22:35 ` [Intel-gfx] " Chris Wilson
2019-11-14 17:35 ` Mika Kuoppala
2019-11-14 17:35 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 22:36 ` [PATCH 4/4] drm/i915/selftests: Add coverage of mocs registers Chris Wilson
2019-11-12 22:36 ` [Intel-gfx] " Chris Wilson
2019-11-12 23:19 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Patchwork
2019-11-12 23:19 ` [Intel-gfx] " Patchwork
2019-11-12 23:48 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-12 23:48 ` [Intel-gfx] " Patchwork
2019-11-13 11:16 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-13 11:16 ` [Intel-gfx] " Patchwork
2019-11-13 16:03 ` Mika Kuoppala [this message]
2019-11-13 16:03 ` [Intel-gfx] [PATCH 1/4] " Mika Kuoppala
2019-11-14 17:33 ` Mika Kuoppala
2019-11-14 17:33 ` [Intel-gfx] " Mika Kuoppala
-- strict thread matches above, loose matches on Subject: below --
2019-10-22 11:51 Chris Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87o8xf7ohy.fsf@gaia.fi.intel.com \
--to=mika.kuoppala@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox