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From: Jani Nikula <jani.nikula@intel.com>
To: Arun R Murthy <arun.r.murthy@intel.com>,
	intel-gfx@lists.freedesktop.org, ville.syrjala@linux.intel.com,
	imre.deak@intel.com
Subject: Re: [Intel-gfx] [PATCHv6] drm/i915/dp: change aux_ctl reg read to polling read
Date: Thu, 15 Dec 2022 12:30:26 +0200	[thread overview]
Message-ID: <87pmclufgd.fsf@intel.com> (raw)
In-Reply-To: <20221215095533.1073528-1-arun.r.murthy@intel.com>

On Thu, 15 Dec 2022, Arun R Murthy <arun.r.murthy@intel.com> wrote:
> The busy timeout logic checks for the AUX BUSY, then waits for the
> timeout period and then after timeout reads the register for BUSY or
> Success.
> Instead replace interrupt with polling so as to read the AUX CTL
> register often before the timeout period. Looks like there might be some
> issue with interrupt-on-read. Hence changing the logic to polling read.
>
> v2: replace interrupt with polling read
> v3: use usleep_rang instead of msleep, updated commit msg
> v4: use intel_wait_for_regiter internal function
> v5: use __intel_de_wait_for_register with 500us slow and 10ms fast timeout
> v6: check return value of __intel_de_wait_for_register
>
> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_aux.c | 15 +++++----------
>  1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 91c93c93e5fc..dec88f41380e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -40,21 +40,16 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp);
>  	const unsigned int timeout_ms = 10;
> -	u32 status;
> -	bool done;
> -
> -#define C (((status = intel_de_read_notrace(i915, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
> -	done = wait_event_timeout(i915->display.gmbus.wait_queue, C,
> -				  msecs_to_jiffies_timeout(timeout_ms));
> +	u32 status, ret;
>  
> -	/* just trace the final value */
> -	trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true);
> +	ret = __intel_de_wait_for_register(i915, ch_ctl,
> +				     DP_AUX_CH_CTL_SEND_BUSY, 0,
> +				     500, timeout_ms, &status);
>  
> -	if (!done)
> +	if (ret == -ETIMEDOUT)

What's wrong with this comparison? Although it probably does work by
coincidence.

BR,
Jani.


>  		drm_err(&i915->drm,
>  			"%s: did not complete or timeout within %ums (status 0x%08x)\n",
>  			intel_dp->aux.name, timeout_ms, status);
> -#undef C
>  
>  	return status;
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-12-15 10:30 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24  7:09 [Intel-gfx] [PATCH] drm/i915/dp: wait on timeout before retry include sw delay Arun R Murthy
2022-11-24  7:45 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork
2022-11-24  8:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-25 15:48 ` [Intel-gfx] [PATCH] " Imre Deak
2022-12-01  6:44 ` [Intel-gfx] [PATCHv2] drm/i915/dp: Change aux_ctl reg read to polling read Arun R Murthy
2022-12-05 10:38   ` Jani Nikula
2022-12-07  5:23     ` Murthy, Arun R
2022-12-01  7:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: wait on timeout before retry include sw delay (rev2) Patchwork
2022-12-01  7:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-01 17:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-12-09  8:35 ` [Intel-gfx] [RESEND PATCHv3] drm/i915/dp: Change aux_ctl reg read to polling read Arun R Murthy
2022-12-09 10:45   ` Jani Nikula
2022-12-13  5:44     ` Murthy, Arun R
2022-12-13  8:08       ` Jani Nikula
2022-12-09  9:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: wait on timeout before retry include sw delay (rev3) Patchwork
2022-12-09 15:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-12-14  3:29 ` [Intel-gfx] [PATCHv4] drm/i915/dp: change aux_ctl reg read to polling read Arun R Murthy
2022-12-14  5:36   ` Murthy, Arun R
2022-12-14  9:29   ` Jani Nikula
2022-12-14  5:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: wait on timeout before retry include sw delay (rev4) Patchwork
2022-12-14 16:21 ` [Intel-gfx] [PATCHv5] drm/i915/dp: change aux_ctl reg read to polling read Arun R Murthy
2022-12-15  9:05   ` Jani Nikula
2022-12-14 18:12 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/dp: wait on timeout before retry include sw delay (rev5) Patchwork
2022-12-14 18:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-12-15  9:55 ` [Intel-gfx] [PATCHv6] drm/i915/dp: change aux_ctl reg read to polling read Arun R Murthy
2022-12-15 10:30   ` Jani Nikula [this message]
2022-12-15 10:37     ` Murthy, Arun R
2022-12-15 10:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: wait on timeout before retry include sw delay (rev6) Patchwork
2022-12-15 10:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-12-15 11:13 ` [Intel-gfx] [PATCHv6] drm/i915/dp: change aux_ctl reg read to polling read Arun R Murthy
2022-12-19 10:17   ` Murthy, Arun R
2022-12-20 16:02     ` Jani Nikula
2022-12-20 16:54       ` Murthy, Arun R
2022-12-20 20:58         ` Jani Nikula
2022-12-15 14:14 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/dp: wait on timeout before retry include sw delay (rev8) Patchwork
2022-12-15 14:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-16 13:42 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-12-21  3:32 ` [Intel-gfx] [PATCHv7] drm/i915/dp: change aux_ctl reg read to polling read Arun R Murthy
2023-01-04 13:27   ` Jani Nikula
2023-01-04 15:21     ` Murthy, Arun R
2022-12-22  1:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: wait on timeout before retry include sw delay (rev9) Patchwork
2022-12-22  5:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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