public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Update eDP fast link training link rate parsing
Date: Fri, 03 Jun 2022 11:01:16 +0300	[thread overview]
Message-ID: <87sfomnpkj.fsf@intel.com> (raw)
In-Reply-To: <20220602205649.11283-1-ville.syrjala@linux.intel.com>

On Thu, 02 Jun 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We're not parsing the 5.4 Gbps value for the old eDP fast link
> training link rate, nor are we parsing the new fast link training
> link rate field. Remedy both.
>
> Also we'll now use the actual link rate instead of the DPCD BW
> register value.
>
> Note that we're not even using this information for anything
> currently, so should perhaps just nuke it all unless someone
> is planning on implementing fast link training finally...
>
> v2: Stop using the DPCD BW values (Jani)
>     *20 instead of *2 to get the rate in correct units (Jani)
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c     | 32 ++++++++++++-------
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h |  1 +
>  2 files changed, 21 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index c42b9e7d0dce..425e91d8cd2f 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1367,18 +1367,26 @@ parse_edp(struct drm_i915_private *i915,
>  
>  	panel->vbt.edp.pps = *edp_pps;
>  
> -	switch (edp_link_params->rate) {
> -	case EDP_RATE_1_62:
> -		panel->vbt.edp.rate = DP_LINK_BW_1_62;
> -		break;
> -	case EDP_RATE_2_7:
> -		panel->vbt.edp.rate = DP_LINK_BW_2_7;
> -		break;
> -	default:
> -		drm_dbg_kms(&i915->drm,
> -			    "VBT has unknown eDP link rate value %u\n",
> -			     edp_link_params->rate);
> -		break;
> +	if (i915->vbt.version >= 224) {
> +		panel->vbt.edp.rate =
> +			edp->edp_fast_link_training_rate[panel_type] * 20;
> +	} else {
> +		switch (edp_link_params->rate) {
> +		case EDP_RATE_1_62:
> +			panel->vbt.edp.rate = 162000;
> +			break;
> +		case EDP_RATE_2_7:
> +			panel->vbt.edp.rate = 270000;
> +			break;
> +		case EDP_RATE_5_4:
> +			panel->vbt.edp.rate = 540000;
> +			break;
> +		default:
> +			drm_dbg_kms(&i915->drm,
> +				    "VBT has unknown eDP link rate value %u\n",
> +				    edp_link_params->rate);
> +			break;
> +		}
>  	}
>  
>  	switch (edp_link_params->lanes) {
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index 14f1e1cc92c5..58aee0a040cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -638,6 +638,7 @@ struct bdb_sdvo_panel_dtds {
>  #define EDP_30BPP	2
>  #define EDP_RATE_1_62	0
>  #define EDP_RATE_2_7	1
> +#define EDP_RATE_5_4	2
>  #define EDP_LANE_1	0
>  #define EDP_LANE_2	1
>  #define EDP_LANE_4	3

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-06-03  8:01 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-01 15:19 [Intel-gfx] [PATCH 0/3] drm/i915: Parse more eDP link rate stuff from VBT Ville Syrjala
2022-06-01 15:19 ` [Intel-gfx] [PATCH 1/3] drm/i915: Initialize eDP source rates after per-panel VBT parsing Ville Syrjala
2022-06-02  9:27   ` Jani Nikula
2022-06-03 16:58   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-06-01 15:19 ` [Intel-gfx] [PATCH 2/3] drm/i915: Update eDP fast link training link rate parsing Ville Syrjala
2022-06-02  9:38   ` Jani Nikula
2022-06-02 17:57     ` Ville Syrjälä
2022-06-02 20:56   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-06-03  8:01     ` Jani Nikula [this message]
2022-06-01 15:19 ` [Intel-gfx] [PATCH 3/3] drm/i915: Parse max link rate from the eDP BDB block Ville Syrjala
2022-06-02  9:43   ` Jani Nikula
2022-06-02 20:57   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-06-03  8:02     ` Jani Nikula
2022-06-01 17:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Parse more eDP link rate stuff from VBT Patchwork
2022-06-01 22:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-06-02 21:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Parse more eDP link rate stuff from VBT (rev3) Patchwork
2022-06-03  1:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-06-04  0:27 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Parse more eDP link rate stuff from VBT (rev4) Patchwork
2022-06-04 16:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Parse more eDP link rate stuff from VBT (rev5) Patchwork
2022-06-04 17:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87sfomnpkj.fsf@intel.com \
    --to=jani.nikula@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox