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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch
Date: Wed, 30 Nov 2022 18:16:04 -0800	[thread overview]
Message-ID: <87v8mv3m3f.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20221201010535.1097741-3-umesh.nerlige.ramappa@intel.com>

On Wed, 30 Nov 2022 17:05:33 -0800, Umesh Nerlige Ramappa wrote:
>
> Similar to ACM, OA timestamp that is part of the OA report is shifted
> when compared to the CS timestamp. Add MTL to the WA.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_perf.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 7790a88f10d8..8ed9af571de9 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -3136,8 +3136,11 @@ get_sseu_config(struct intel_sseu *out_sseu,
>   */
>  u32 i915_perf_oa_timestamp_frequency(struct drm_i915_private *i915)
>  {
> -	/* Wa_18013179988:dg2 */
> -	if (IS_DG2(i915)) {
> +	/*
> +	 * Wa_18013179988:dg2
> +	 * Wa_14015846243:mtl
> +	 */
> +	if (IS_DG2(i915) || IS_METEORLAKE(i915)) {
>		intel_wakeref_t wakeref;
>		u32 reg, shift;
>
> --
> 2.36.1
>

  reply	other threads:[~2022-12-01  2:16 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01  1:05 [Intel-gfx] [PATCH v2 0/4] drm/i915/mtl: Add OAG 32 bit format support for MTL Umesh Nerlige Ramappa
2022-12-01  1:05 ` [Intel-gfx] [PATCH v2 1/4] drm/i915/mtl: Resize noa_wait BO size to save restore GPR regs Umesh Nerlige Ramappa
2022-12-01  2:18   ` Dixit, Ashutosh
2022-12-01  1:05 ` [Intel-gfx] [PATCH v2 2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch Umesh Nerlige Ramappa
2022-12-01  2:16   ` Dixit, Ashutosh [this message]
2022-12-01  1:05 ` [Intel-gfx] [PATCH v2 3/4] drm/i915/mtl: Update OA mux whitelist for MTL Umesh Nerlige Ramappa
2022-12-01  3:17   ` Dixit, Ashutosh
2022-12-01  1:05 ` [Intel-gfx] [PATCH v2 4/4] drm/i915/mtl: Add OA support by enabling 32 bit OAG formats " Umesh Nerlige Ramappa
2022-12-01  2:14   ` Dixit, Ashutosh
2022-12-08 17:08   ` Umesh Nerlige Ramappa
2022-12-12 10:48     ` Joonas Lahtinen
2022-12-01  1:07 ` [Intel-gfx] [PATCH v2 0/4] drm/i915/mtl: Add OAG 32 bit format support " Umesh Nerlige Ramappa
2022-12-01  1:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/mtl: Add OAG 32 bit format support for MTL (rev2) Patchwork
2022-12-01  1:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-01 14:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-12-01 18:43   ` Umesh Nerlige Ramappa
  -- strict thread matches above, loose matches on Subject: below --
2022-12-01  0:59 [Intel-gfx] [PATCH v2 0/4] drm/i915/mtl: Add OAG 32 bit format support for MTL Umesh Nerlige Ramappa
2022-12-01  0:59 ` [Intel-gfx] [PATCH v2 2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch Umesh Nerlige Ramappa

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