From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/mtl: Add OA support by enabling 32 bit OAG formats for MTL
Date: Wed, 30 Nov 2022 18:14:52 -0800 [thread overview]
Message-ID: <87wn7b3m5f.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20221201010535.1097741-5-umesh.nerlige.ramappa@intel.com>
On Wed, 30 Nov 2022 17:05:35 -0800, Umesh Nerlige Ramappa wrote:
>
> Without an entry in oa_init_supported_formats, OA will not be functional
> in MTL. Enable OA support by enabling 32 bit OAG formats for MTL.
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> drivers/gpu/drm/i915/i915_perf.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 8369ae4b850d..a735b9540113 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -4772,6 +4772,7 @@ static void oa_init_supported_formats(struct i915_perf *perf)
> break;
>
> case INTEL_DG2:
> + case INTEL_METEORLAKE:
> oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8);
> oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8);
> break;
> --
> 2.36.1
>
next prev parent reply other threads:[~2022-12-01 2:15 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-01 1:05 [Intel-gfx] [PATCH v2 0/4] drm/i915/mtl: Add OAG 32 bit format support for MTL Umesh Nerlige Ramappa
2022-12-01 1:05 ` [Intel-gfx] [PATCH v2 1/4] drm/i915/mtl: Resize noa_wait BO size to save restore GPR regs Umesh Nerlige Ramappa
2022-12-01 2:18 ` Dixit, Ashutosh
2022-12-01 1:05 ` [Intel-gfx] [PATCH v2 2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch Umesh Nerlige Ramappa
2022-12-01 2:16 ` Dixit, Ashutosh
2022-12-01 1:05 ` [Intel-gfx] [PATCH v2 3/4] drm/i915/mtl: Update OA mux whitelist for MTL Umesh Nerlige Ramappa
2022-12-01 3:17 ` Dixit, Ashutosh
2022-12-01 1:05 ` [Intel-gfx] [PATCH v2 4/4] drm/i915/mtl: Add OA support by enabling 32 bit OAG formats " Umesh Nerlige Ramappa
2022-12-01 2:14 ` Dixit, Ashutosh [this message]
2022-12-08 17:08 ` Umesh Nerlige Ramappa
2022-12-12 10:48 ` Joonas Lahtinen
2022-12-01 1:07 ` [Intel-gfx] [PATCH v2 0/4] drm/i915/mtl: Add OAG 32 bit format support " Umesh Nerlige Ramappa
2022-12-01 1:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/mtl: Add OAG 32 bit format support for MTL (rev2) Patchwork
2022-12-01 1:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-01 14:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-12-01 18:43 ` Umesh Nerlige Ramappa
-- strict thread matches above, loose matches on Subject: below --
2022-12-01 0:59 [Intel-gfx] [PATCH v2 0/4] drm/i915/mtl: Add OAG 32 bit format support for MTL Umesh Nerlige Ramappa
2022-12-01 0:59 ` [Intel-gfx] [PATCH v2 4/4] drm/i915/mtl: Add OA support by enabling 32 bit OAG formats " Umesh Nerlige Ramappa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87wn7b3m5f.wl-ashutosh.dixit@intel.com \
--to=ashutosh.dixit@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=umesh.nerlige.ramappa@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox