From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Paz Zcharya <pazz@chromium.org>
Subject: Re: [PATCH 3/8] drm/i915: Update TRANS_SET_CONTEXT_LATENCY during LRR updates
Date: Mon, 20 Jan 2025 18:49:54 +0200 [thread overview]
Message-ID: <87zfjlpgzx.fsf@intel.com> (raw)
In-Reply-To: <20250116201637.22486-4-ville.syrjala@linux.intel.com>
On Thu, 16 Jan 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Update TRANS_SET_CONTEXT_LATENCY in intel_set_transcoder_timings_lrr()
> as well. While for actual LRR updates this should not change, I want
> to reuse this code to also sanitize the vblank delay during boot,
> and in that case we do need to update this.
>
> Cc: Paz Zcharya <pazz@chromium.org>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1260e394afc7..ac6fc177099f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2930,6 +2930,10 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
> }
>
> if (DISPLAY_VER(dev_priv) >= 13) {
> + intel_de_write(dev_priv,
> + TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder),
> + crtc_vblank_start - crtc_vdisplay);
> +
> /*
> * VBLANK_START not used by hw, just clear it
> * to make it stand out in register dumps.
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-01-20 16:50 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-16 20:16 [PATCH 0/8] drm/i915: Handle vblank delay vs. fastboot and finish DSB plane update enabling Ville Syrjala
2025-01-16 20:16 ` [PATCH 1/8] drm/i915: Keep TRANS_VBLANK.vblank_start==0 on ADL+ even when doing LRR updates Ville Syrjala
2025-01-20 16:48 ` Jani Nikula
2025-01-21 14:38 ` Ville Syrjälä
2025-01-16 20:16 ` [PATCH 2/8] drm/i915: Handle interlaced modes in intel_set_transcoder_timings_lrr() Ville Syrjala
2025-01-20 16:49 ` Jani Nikula
2025-01-16 20:16 ` [PATCH 3/8] drm/i915: Update TRANS_SET_CONTEXT_LATENCY during LRR updates Ville Syrjala
2025-01-20 16:49 ` Jani Nikula [this message]
2025-01-16 20:16 ` [PATCH 4/8] drm/i915: Warn if someone tries to use intel_set_transcoder_timings*() on DSI outputs Ville Syrjala
2025-01-20 16:50 ` Jani Nikula
2025-01-16 20:16 ` [PATCH 5/8] drm/i915: Extract lrr_params_changed() Ville Syrjala
2025-01-20 16:50 ` Jani Nikula
2025-01-16 20:16 ` [PATCH 6/8] drm/i915: Allow fastboot to fix up the vblank delay Ville Syrjala
2025-01-20 16:53 ` Jani Nikula
2025-01-20 19:21 ` Ville Syrjälä
2025-01-16 20:16 ` [PATCH 7/8] drm/i915/dsb: Add support for triggering VRR push with DSB Ville Syrjala
2025-01-16 20:16 ` [PATCH 8/8] drm/i915/dsb: Allow DSB to perform commits when VRR is enabled Ville Syrjala
2025-01-17 1:54 ` ✗ i915.CI.BAT: failure for drm/i915: Handle vblank delay vs. fastboot and finish DSB plane update enabling Patchwork
2025-01-17 12:01 ` ✓ i915.CI.BAT: success for drm/i915: Handle vblank delay vs. fastboot and finish DSB plane update enabling (rev2) Patchwork
2025-01-19 13:06 ` ✗ i915.CI.Full: failure " Patchwork
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