Re: [PATCH 06/20] drm/i915/icl: Power down unused DSI lanes

[Jani Nikula <jani.nikula@intel.com>]

On Fri, 15 Jun 2018, Madhav Chauhan <madhav.chauhan@intel.com> wrote:
> To save power, unused lanes should be powered
> down using the bitfield of PORT_CL_DW10.
>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi_new.c | 44 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_new.c b/drivers/gpu/drm/i915/intel_dsi_new.c
> index 5ec4016..baaf46d 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_new.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_new.c
> @@ -74,6 +74,47 @@ static void gen11_dsi_enable_io_power(struct intel_encoder *encoder)
>  		intel_display_power_get(dev_priv, POWER_DOMAIN_PORT_DDI_B_IO);
>  }
>  
> +static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> +	enum port port;
> +	u32 tmp;
> +	u32 lane_mask;
> +
> +	switch (intel_dsi->lane_count) {
> +	case 1:
> +		lane_mask = PWR_DOWN_LN_3_1_0;
> +		break;
> +	case 2:
> +		lane_mask = PWR_DOWN_LN_3_1;
> +		break;
> +	case 3:
> +		lane_mask = PWR_DOWN_LN_3;
> +		break;
> +	case 4:
> +		lane_mask = PWR_UP_ALL_LANES;
> +		break;
> +	default:
> +		lane_mask = PWR_UP_ALL_LANES;
> +		break;
> +	}

Like I suggested in previous patch, this can be simplified considerably
if you change the macros for the lane power up/down.

BR,
Jani.

> +
> +	lane_mask = lane_mask << PWR_DOWN_LN_SHIFT;
> +
> +	for_each_dsi_port(port, intel_dsi->ports) {
> +		tmp = I915_READ(ICL_PORT_CL_DW10(port));
> +		tmp &= ~PWR_DOWN_LN_MASK;
> +		I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask);
> +	}
> +}
> +
> +static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
> +{
> +	/* step 4a: power up all lanes of the DDI used by DSI */
> +	gen11_dsi_power_up_lanes(encoder);
> +}
> +
>  static void __attribute__((unused)) gen11_dsi_pre_enable(
>  				struct intel_encoder *encoder,
>  				const struct intel_crtc_state *pipe_config,
> @@ -84,4 +125,7 @@ static void __attribute__((unused)) gen11_dsi_pre_enable(
>  
>  	/* step3: enable DSI PLL */
>  	gen11_dsi_program_esc_clk_div(encoder);
> +
> +	/* step4: enable DSI port and DPHY */
> +	gen11_dsi_enable_port_and_phy(encoder);
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center
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