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* [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit
@ 2024-09-17 17:41 Ankit Nautiyal
  2024-09-17 17:41 ` [PATCH 1/4] Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
                   ` (5 more replies)
  0 siblings, 6 replies; 15+ messages in thread
From: Ankit Nautiyal @ 2024-09-17 17:41 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula

For Platforms that support higher link rates, there is a limitation on
Link M /Link N ratio.
If the CEILING( Link M / Link N ) ratio is greater than 10.0, then
hardware cannot support the given resolution / refresh rate at the given
configuration.
For BMG Wa_14021768792 helps to bypass this limitation and allows it to
support the ratio till 15.0.

This series adds the missing restrictions for earlier platforms and adds
the Wa_14021768792 for BMG as per Bspec:49266

Rev2:
-Drop new member link_n_extended.
-Avoid WA framework for XE

Ankit Nautiyal (4):
  Add bits for link_n_exended for DISPLAY >= 14
  drm/i915/display: Limit m/n ratio to 10 for display > 12
  drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10
  drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n
    ratio > 10

 drivers/gpu/drm/i915/display/intel_display.c  | 147 ++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_display.h  |  15 +-
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  62 ++++++--
 drivers/gpu/drm/i915/display/intel_dp.h       |   5 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  37 +++--
 drivers/gpu/drm/i915/display/intel_fdi.c      |  15 +-
 .../gpu/drm/i915/display/intel_pch_display.c  |   4 +-
 drivers/gpu/drm/i915/i915_reg.h               |   7 +
 9 files changed, 243 insertions(+), 51 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit
@ 2024-10-10  4:10 Ankit Nautiyal
  2024-10-10  4:10 ` [PATCH 1/4] Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
  0 siblings, 1 reply; 15+ messages in thread
From: Ankit Nautiyal @ 2024-10-10  4:10 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, uma.shankar

For Platforms that support higher link rates, there is a limitation on
Link M /Link N ratio.
If the CEILING( Link M / Link N ) ratio is greater than 10.0, then
hardware cannot support the given resolution / refresh rate at the given
configuration.
For BMG Wa_14021768792 helps to bypass this limitation and allows it to
support the ratio till 15.0.

This series adds the missing restrictions for earlier platforms and adds
the Wa_14021768792 for BMG as per Bspec:49266

Rev2:
-Drop new member link_n_extended.
-Avoid WA framework for XE

Rev3:
-Refactor to just add the extended link_n just before writing and scrub
it just after read.

Ankit Nautiyal (4):
  Add bits for link_n_exended for DISPLAY >= 14
  drm/i915/display: Limit m/n ratio to 10 for display > 12
  drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10
  drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n
    ratio > 10

 drivers/gpu/drm/i915/display/intel_display.c  | 161 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_display.h  |  12 +-
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  66 +++++--
 drivers/gpu/drm/i915/display/intel_dp.h       |   5 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  37 ++--
 drivers/gpu/drm/i915/display/intel_fdi.c      |  15 +-
 drivers/gpu/drm/i915/i915_reg.h               |   7 +
 8 files changed, 260 insertions(+), 45 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit
@ 2025-03-21 11:26 Ankit Nautiyal
  2025-03-21 11:26 ` [PATCH 1/4] Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
  0 siblings, 1 reply; 15+ messages in thread
From: Ankit Nautiyal @ 2025-03-21 11:26 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, uma.shankar

For Platforms that support higher link rates, there is a limitation on
Link M /Link N ratio.
If the CEILING( Link M / Link N ) ratio is greater than 10.0, then
hardware cannot support the given resolution / refresh rate at the given
configuration.
For BMG Wa_14021768792 helps to bypass this limitation and allows it to
support the ratio till 15.0.

This series adds the missing restrictions for earlier platforms and adds
the Wa_14021768792 for BMG as per Bspec:49266

Rev2:
-Drop new member link_n_extended.
-Avoid WA framework for XE

Rev3:
-Refactor to just add the extended link_n just before writing and scrub
it just after read.

Rev4:
-Rebase

Ankit Nautiyal (4):
  Add bits for link_n_exended for DISPLAY >= 14
  drm/i915/display: Limit m/n ratio to 10 for display > 12
  drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10
  drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n
    ratio > 10

 drivers/gpu/drm/i915/display/intel_display.c  | 160 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_display.h  |  12 +-
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  66 ++++++--
 drivers/gpu/drm/i915/display/intel_dp.h       |   4 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  35 ++--
 drivers/gpu/drm/i915/display/intel_fdi.c      |  14 +-
 drivers/gpu/drm/i915/i915_reg.h               |   7 +
 8 files changed, 255 insertions(+), 45 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2025-03-26  9:25 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-09-17 17:41 [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit Ankit Nautiyal
2024-09-17 17:41 ` [PATCH 1/4] Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
2024-09-17 17:46   ` Jani Nikula
2024-09-18  3:58     ` Nautiyal, Ankit K
2024-09-17 17:41 ` [PATCH 2/4] drm/i915/display: Limit m/n ratio to 10 for display > 12 Ankit Nautiyal
2024-09-17 17:41 ` [PATCH 3/4] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Ankit Nautiyal
2024-09-17 17:42 ` [PATCH 4/4] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n " Ankit Nautiyal
2024-09-17 18:26 ` ✗ Fi.CI.SPARSE: warning for Implement Wa_14021768792 to bypass m_n ratio limit (rev2) Patchwork
2024-09-17 18:49 ` ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2024-10-10  4:10 [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit Ankit Nautiyal
2024-10-10  4:10 ` [PATCH 1/4] Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
2024-11-28  6:54   ` Srikanth V, NagaVenkata
2025-03-21 11:26 [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit Ankit Nautiyal
2025-03-21 11:26 ` [PATCH 1/4] Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
2025-03-21 18:31   ` Ville Syrjälä
2025-03-21 18:42     ` Ville Syrjälä
2025-03-26  9:24     ` Nautiyal, Ankit K

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