Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Sebastian Brzezinka <sebastian.brzezinka@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	<intel-gfx@lists.freedesktop.org>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 4/5] drm/i915/gmbus: Fix i2c bit banging for PTL+
Date: Thu, 8 Oct 2026 11:48:57 +0200	[thread overview]
Message-ID: <DLZD2E26UTCY.2GIWH1L49GF9T@intel.com> (raw)
In-Reply-To: <20261007222314.5714-5-ville.syrjala@linux.intel.com>

On Thu Oct 8, 2026 at 12:23 AM CEST, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The current implementation of w/a 16025573575 does not actually work.
> The GPIO register mask bits are write only, and thus he read-modify-write
> cycles we do will not preserve them. Furthermore the implementation makes
> no effort to preserve the actual direction/output value bits, which is
> a must if all the mask bits were actually set all the time.
>
> Rewrite the whole thing so that we always set all the mask bits,
> and correctly preserve the previous state of the direction/output value
> bits. And do that on all platforms so that we only have a single codepath
> to worry about. As a bonus this approach will also make the code
> work on upcoming platforms where the mask bits no longer even exist.
>
> Smoke tested on alm,cl,tgl,lnl,ptl.
>
> Fixes: 7565fd5dcb0b ("drm/i915/gmbus: Add Wa_16025573575 for PTL/WCL for bit-bashing")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com>
-- 
Best regards,
Sebastian


  reply	other threads:[~2026-10-08  9:49 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-07 22:23 [PATCH 0/5] drm/i915/gmbus: Fix PTL+ i2c bit banging Ville Syrjala
2026-10-07 22:23 ` [PATCH 1/5] drm/i915/gmbus: Stop frobbing with pin direction in .getsda()/.getscl() Ville Syrjala
2026-10-08  9:34   ` Sebastian Brzezinka
2026-10-07 22:23 ` [PATCH 2/5] drm/i915/gmbus: Handle the internal pullup disable bits more sensibly Ville Syrjala
2026-10-07 22:23 ` [PATCH 3/5] drm/i915/gmbus: Reorder the PNV clock gating GPIO w/a Ville Syrjala
2026-10-08  9:49   ` Sebastian Brzezinka
2026-10-07 22:23 ` [PATCH 4/5] drm/i915/gmbus: Fix i2c bit banging for PTL+ Ville Syrjala
2026-10-08  9:48   ` Sebastian Brzezinka [this message]
2026-10-07 22:23 ` [PATCH 5/5] drm/i915/gmbus: Remove the INTEL_DISPLAY_WA_16025573575 leftovers Ville Syrjala
2026-10-08  9:48   ` Sebastian Brzezinka
2026-10-07 23:36 ` ✓ i915.CI.BAT: success for drm/i915/gmbus: Fix PTL+ i2c bit banging Patchwork
2026-10-08  8:50 ` ✗ i915.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=DLZD2E26UTCY.2GIWH1L49GF9T@intel.com \
    --to=sebastian.brzezinka@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox