* [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation
@ 2023-01-21 19:08 Gustavo Sousa
2023-01-21 19:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Gustavo Sousa @ 2023-01-21 19:08 UTC (permalink / raw)
To: intel-gfx
The wildchar ("*") used in the function name patterns in the
documentation was taken as a start of an "emphasis" inline markup. Wrap
the patterns with the inline literal markup and, for consistency, do the
same for the other function names mentioned.
Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 918a271447e2..e849035d8dc5 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -30,8 +30,8 @@
* creation to have a "primed golden context", i.e. a context image that
* already contains the changes needed to all the registers.
*
- * Context workarounds should be implemented in the *_ctx_workarounds_init()
- * variants respective to the targeted platforms.
+ * Context workarounds should be implemented in the
+ * ``*_ctx_workarounds_init()`` variants respective to the targeted platforms.
*
* - Engine workarounds: the list of these WAs is applied whenever the specific
* engine is reset. It's also possible that a set of engine classes share a
@@ -46,16 +46,16 @@
* ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference.
*
* Workarounds for registers specific to RCS and CCS should be implemented in
- * rcs_engine_wa_init() and ccs_engine_wa_init(), respectively; those for
- * registers belonging to BCS, VCS or VECS should be implemented in
- * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific
- * engine's MMIO range but that are part of of the common RCS/CCS reset domain
- * should be implemented in general_render_compute_wa_init().
+ * ``rcs_engine_wa_init()`` and ``ccs_engine_wa_init()``, respectively; those
+ * for registers belonging to BCS, VCS or VECS should be implemented in
+ * ``xcs_engine_wa_init()``. Workarounds for registers not belonging to a
+ * specific engine's MMIO range but that are part of of the common RCS/CCS
+ * reset domain should be implemented in ``general_render_compute_wa_init()``.
*
* - GT workarounds: the list of these WAs is applied whenever these registers
* revert to their default values: on GPU reset, suspend/resume [1]_, etc.
*
- * GT workarounds should be implemented in the *_gt_workarounds_init()
+ * GT workarounds should be implemented in the ``*_gt_workarounds_init()``
* variants respective to the targeted platforms.
*
* - Register whitelist: some workarounds need to be implemented in userspace,
@@ -64,8 +64,8 @@
* this is just a special case of a MMIO workaround (as we write the list of
* these to/be-whitelisted registers to some special HW registers).
*
- * Register whitelisting should be done in the *_whitelist_build() variants
- * respective to the targeted platforms.
+ * Register whitelisting should be done in the ``*_whitelist_build()``
+ * variants respective to the targeted platforms.
*
* - Workaround batchbuffers: buffers that get executed automatically by the
* hardware on every HW context restore. These buffers are created and
--
2.39.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-01-21 19:08 [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation Gustavo Sousa
@ 2023-01-21 19:35 ` Patchwork
2023-01-21 23:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-01-24 19:39 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
2 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-01-21 19:35 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4894 bytes --]
== Series Details ==
Series: drm/i915/gt: Fix sphinx warnings for workarounds documentation
URL : https://patchwork.freedesktop.org/series/113193/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12619 -> Patchwork_113193v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/index.html
Participating hosts (37 -> 35)
------------------------------
Missing (2): fi-kbl-soraka fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_113193v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@mman:
- fi-rkl-guc: NOTRUN -> [TIMEOUT][1] ([i915#6794])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/fi-rkl-guc/igt@i915_selftest@live@mman.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-rkl-guc: NOTRUN -> [SKIP][2] ([i915#7828])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/fi-rkl-guc/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- {bat-adls-5}: [FAIL][3] -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/bat-adls-5/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/bat-adls-5/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@gt_pm:
- {bat-rpls-2}: [DMESG-FAIL][5] ([i915#4258]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@migrate:
- {bat-dg2-11}: [DMESG-WARN][7] ([i915#7699]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/bat-dg2-11/igt@i915_selftest@live@migrate.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/bat-dg2-11/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@reset:
- {bat-rpls-2}: [DMESG-FAIL][9] ([i915#4983]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/bat-rpls-2/igt@i915_selftest@live@reset.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/bat-rpls-2/igt@i915_selftest@live@reset.html
- {bat-rpls-1}: [DMESG-FAIL][11] ([i915#4983]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/bat-rpls-1/igt@i915_selftest@live@reset.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/bat-rpls-1/igt@i915_selftest@live@reset.html
* igt@i915_selftest@live@workarounds:
- fi-rkl-guc: [INCOMPLETE][13] ([i915#4983]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/fi-rkl-guc/igt@i915_selftest@live@workarounds.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/fi-rkl-guc/igt@i915_selftest@live@workarounds.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-3:
- {bat-dg2-11}: [INCOMPLETE][15] -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-3.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
[i915#7625]: https://gitlab.freedesktop.org/drm/intel/issues/7625
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
Build changes
-------------
* Linux: CI_DRM_12619 -> Patchwork_113193v1
CI-20190529: 20190529
CI_DRM_12619: 7d3e7f64a42d66ba8da6e7b66a8d85457ef84570 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7129: 7816773163a1b0d248dd9dd34d14e632ad8903be @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_113193v1: 7d3e7f64a42d66ba8da6e7b66a8d85457ef84570 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
33e6a647e06e drm/i915/gt: Fix sphinx warnings for workarounds documentation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/index.html
[-- Attachment #2: Type: text/html, Size: 5594 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-01-21 19:08 [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation Gustavo Sousa
2023-01-21 19:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2023-01-21 23:00 ` Patchwork
2023-01-24 19:39 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
2 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-01-21 23:00 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 23371 bytes --]
== Series Details ==
Series: drm/i915/gt: Fix sphinx warnings for workarounds documentation
URL : https://patchwork.freedesktop.org/series/113193/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12619_full -> Patchwork_113193v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/index.html
Participating hosts (11 -> 9)
------------------------------
Missing (2): pig-skl-6260u pig-kbl-iris
Known issues
------------
Here are the changes found in Patchwork_113193v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-deadline:
- shard-glk: NOTRUN -> [FAIL][1] ([i915#2846])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@gem_exec_fair@basic-deadline.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-glk: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#3886]) +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-ccs-on-another-bo-yf_tiled_ccs:
- shard-glk: NOTRUN -> [SKIP][4] ([fdo#109271]) +41 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@kms_ccs@pipe-d-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#658])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_writeback@writeback-fb-id:
- shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2437])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@kms_writeback@writeback-fb-id.html
* igt@sysfs_clients@fair-0:
- shard-glk: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2994])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@sysfs_clients@fair-0.html
#### Possible fixes ####
* igt@fbdev@info:
- {shard-rkl}: [SKIP][8] ([i915#2582]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@fbdev@info.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@fbdev@info.html
* igt@feature_discovery@psr2:
- {shard-rkl}: [SKIP][10] ([i915#658]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@feature_discovery@psr2.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@feature_discovery@psr2.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][12] ([fdo#103375]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-3/igt@gem_eio@in-flight-suspend.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-1/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][14] ([i915#2842]) -> [PASS][15] +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_reloc@basic-gtt-wc:
- {shard-rkl}: [SKIP][16] ([i915#3281]) -> [PASS][17] +5 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc.html
* igt@gem_mmap_wc@set-cache-level:
- {shard-rkl}: [SKIP][18] ([i915#1850]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-2/igt@gem_mmap_wc@set-cache-level.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@gem_mmap_wc@set-cache-level.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- {shard-rkl}: [SKIP][20] ([i915#3282]) -> [PASS][21] +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-2/igt@gem_partial_pwrite_pread@writes-after-reads.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gen9_exec_parse@allowed-all:
- {shard-rkl}: [SKIP][22] ([i915#2527]) -> [PASS][23] +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-2/igt@gen9_exec_parse@allowed-all.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-5/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [DMESG-WARN][24] ([i915#5566] / [i915#716]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-glk2/igt@gen9_exec_parse@allowed-single.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk8/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc6-dpms:
- {shard-rkl}: [SKIP][26] ([i915#3361]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@i915_pm_dc@dc6-dpms.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-3/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}: [WARN][28] ([i915#2681]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@pm-tiling:
- {shard-rkl}: [SKIP][30] ([fdo#109308]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@i915_pm_rpm@pm-tiling.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@i915_pm_rpm@pm-tiling.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-180:
- {shard-tglu}: [SKIP][32] ([i915#7651]) -> [PASS][33] +5 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-tglu-6/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-tglu-8/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [FAIL][34] ([i915#2346]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
* igt@kms_fbcon_fbt@psr:
- {shard-rkl}: [SKIP][36] ([fdo#110189] / [i915#3955]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-2/igt@kms_fbcon_fbt@psr.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@kms_fbcon_fbt@psr.html
* igt@kms_fence_pin_leak:
- {shard-tglu}: [SKIP][38] ([fdo#109274] / [i915#1845]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-tglu-6/igt@kms_fence_pin_leak.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-tglu-8/igt@kms_fence_pin_leak.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- {shard-tglu}: [SKIP][40] ([i915#1849]) -> [PASS][41] +2 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-tglu-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt:
- {shard-rkl}: [SKIP][42] ([i915#1849] / [i915#4098]) -> [PASS][43] +13 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html
* igt@kms_plane@plane-position-hole-dpms@pipe-b-planes:
- {shard-rkl}: [SKIP][44] ([i915#1849]) -> [PASS][45] +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@kms_plane@plane-position-hole-dpms@pipe-b-planes.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@kms_plane@plane-position-hole-dpms@pipe-b-planes.html
* igt@kms_plane@plane-position-hole@pipe-b-planes:
- {shard-tglu}: [SKIP][46] ([i915#1849] / [i915#3558]) -> [PASS][47] +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-tglu-6/igt@kms_plane@plane-position-hole@pipe-b-planes.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-tglu-8/igt@kms_plane@plane-position-hole@pipe-b-planes.html
* igt@kms_psr@cursor_blt:
- {shard-rkl}: [SKIP][48] ([i915#1072]) -> [PASS][49] +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@kms_psr@cursor_blt.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@kms_psr@cursor_blt.html
* igt@kms_rotation_crc@exhaust-fences:
- {shard-rkl}: [SKIP][50] ([i915#1845] / [i915#4098]) -> [PASS][51] +24 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@kms_rotation_crc@exhaust-fences.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@kms_rotation_crc@exhaust-fences.html
* igt@kms_universal_plane@cursor-fb-leak-pipe-a:
- {shard-rkl}: [SKIP][52] ([i915#1845] / [i915#4070] / [i915#4098]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-2/igt@kms_universal_plane@cursor-fb-leak-pipe-a.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-6/igt@kms_universal_plane@cursor-fb-leak-pipe-a.html
* igt@kms_vblank@pipe-a-ts-continuation-modeset:
- {shard-tglu}: [SKIP][54] ([i915#1845] / [i915#7651]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-tglu-6/igt@kms_vblank@pipe-a-ts-continuation-modeset.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-tglu-8/igt@kms_vblank@pipe-a-ts-continuation-modeset.html
* igt@perf@gen12-oa-tlb-invalidate:
- {shard-rkl}: [SKIP][56] ([fdo#109289]) -> [PASS][57] +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-5/igt@perf@gen12-oa-tlb-invalidate.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-4/igt@perf@gen12-oa-tlb-invalidate.html
* igt@perf@mi-rpc:
- {shard-rkl}: [SKIP][58] ([i915#2434]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12619/shard-rkl-4/igt@perf@mi-rpc.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/shard-rkl-5/igt@perf@mi-rpc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
Build changes
-------------
* Linux: CI_DRM_12619 -> Patchwork_113193v1
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_12619: 7d3e7f64a42d66ba8da6e7b66a8d85457ef84570 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7129: 7816773163a1b0d248dd9dd34d14e632ad8903be @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_113193v1: 7d3e7f64a42d66ba8da6e7b66a8d85457ef84570 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113193v1/index.html
[-- Attachment #2: Type: text/html, Size: 17227 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-01-21 19:08 [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation Gustavo Sousa
2023-01-21 19:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2023-01-21 23:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2023-01-24 19:39 ` Rodrigo Vivi
2023-01-31 13:03 ` Mauro Carvalho Chehab
2 siblings, 1 reply; 8+ messages in thread
From: Rodrigo Vivi @ 2023-01-24 19:39 UTC (permalink / raw)
To: Gustavo Sousa, mchehab; +Cc: intel-gfx
On Sat, Jan 21, 2023 at 04:08:53PM -0300, Gustavo Sousa wrote:
> The wildchar ("*") used in the function name patterns in the
> documentation was taken as a start of an "emphasis" inline markup. Wrap
> the patterns with the inline literal markup and, for consistency, do the
> same for the other function names mentioned.
>
> Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
just in case he sees some better alternative for the escaping the '*'
My fear is that this ``*_fn_name()`` could create invalid links in the doc...
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 918a271447e2..e849035d8dc5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -30,8 +30,8 @@
> * creation to have a "primed golden context", i.e. a context image that
> * already contains the changes needed to all the registers.
> *
> - * Context workarounds should be implemented in the *_ctx_workarounds_init()
> - * variants respective to the targeted platforms.
> + * Context workarounds should be implemented in the
> + * ``*_ctx_workarounds_init()`` variants respective to the targeted platforms.
> *
> * - Engine workarounds: the list of these WAs is applied whenever the specific
> * engine is reset. It's also possible that a set of engine classes share a
> @@ -46,16 +46,16 @@
> * ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference.
> *
> * Workarounds for registers specific to RCS and CCS should be implemented in
> - * rcs_engine_wa_init() and ccs_engine_wa_init(), respectively; those for
> - * registers belonging to BCS, VCS or VECS should be implemented in
> - * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific
> - * engine's MMIO range but that are part of of the common RCS/CCS reset domain
> - * should be implemented in general_render_compute_wa_init().
> + * ``rcs_engine_wa_init()`` and ``ccs_engine_wa_init()``, respectively; those
> + * for registers belonging to BCS, VCS or VECS should be implemented in
> + * ``xcs_engine_wa_init()``. Workarounds for registers not belonging to a
> + * specific engine's MMIO range but that are part of of the common RCS/CCS
> + * reset domain should be implemented in ``general_render_compute_wa_init()``.
> *
> * - GT workarounds: the list of these WAs is applied whenever these registers
> * revert to their default values: on GPU reset, suspend/resume [1]_, etc.
> *
> - * GT workarounds should be implemented in the *_gt_workarounds_init()
> + * GT workarounds should be implemented in the ``*_gt_workarounds_init()``
> * variants respective to the targeted platforms.
> *
> * - Register whitelist: some workarounds need to be implemented in userspace,
> @@ -64,8 +64,8 @@
> * this is just a special case of a MMIO workaround (as we write the list of
> * these to/be-whitelisted registers to some special HW registers).
> *
> - * Register whitelisting should be done in the *_whitelist_build() variants
> - * respective to the targeted platforms.
> + * Register whitelisting should be done in the ``*_whitelist_build()``
> + * variants respective to the targeted platforms.
> *
> * - Workaround batchbuffers: buffers that get executed automatically by the
> * hardware on every HW context restore. These buffers are created and
> --
> 2.39.0
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-01-24 19:39 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
@ 2023-01-31 13:03 ` Mauro Carvalho Chehab
2023-02-06 17:00 ` Rodrigo Vivi
0 siblings, 1 reply; 8+ messages in thread
From: Mauro Carvalho Chehab @ 2023-01-31 13:03 UTC (permalink / raw)
To: intel-gfx
On 1/24/23 20:39, Rodrigo Vivi wrote:
> On Sat, Jan 21, 2023 at 04:08:53PM -0300, Gustavo Sousa wrote:
>> The wildchar ("*") used in the function name patterns in the
>> documentation was taken as a start of an "emphasis" inline markup. Wrap
>> the patterns with the inline literal markup and, for consistency, do the
>> same for the other function names mentioned.
>>
>> Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds")
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
>
> just in case he sees some better alternative for the escaping the '*'
>
> My fear is that this ``*_fn_name()`` could create invalid links in the doc...
Seems OK to me. ``foo`` is literal inline. It won't try to generate
cross-references.
Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org>
>
>
>> ---
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++----------
>> 1 file changed, 10 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> index 918a271447e2..e849035d8dc5 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> @@ -30,8 +30,8 @@
>> * creation to have a "primed golden context", i.e. a context image that
>> * already contains the changes needed to all the registers.
>> *
>> - * Context workarounds should be implemented in the *_ctx_workarounds_init()
>> - * variants respective to the targeted platforms.
>> + * Context workarounds should be implemented in the
>> + * ``*_ctx_workarounds_init()`` variants respective to the targeted platforms.
>> *
>> * - Engine workarounds: the list of these WAs is applied whenever the specific
>> * engine is reset. It's also possible that a set of engine classes share a
>> @@ -46,16 +46,16 @@
>> * ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference.
>> *
>> * Workarounds for registers specific to RCS and CCS should be implemented in
>> - * rcs_engine_wa_init() and ccs_engine_wa_init(), respectively; those for
>> - * registers belonging to BCS, VCS or VECS should be implemented in
>> - * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific
>> - * engine's MMIO range but that are part of of the common RCS/CCS reset domain
>> - * should be implemented in general_render_compute_wa_init().
>> + * ``rcs_engine_wa_init()`` and ``ccs_engine_wa_init()``, respectively; those
>> + * for registers belonging to BCS, VCS or VECS should be implemented in
>> + * ``xcs_engine_wa_init()``. Workarounds for registers not belonging to a
>> + * specific engine's MMIO range but that are part of of the common RCS/CCS
>> + * reset domain should be implemented in ``general_render_compute_wa_init()``.
>> *
>> * - GT workarounds: the list of these WAs is applied whenever these registers
>> * revert to their default values: on GPU reset, suspend/resume [1]_, etc.
>> *
>> - * GT workarounds should be implemented in the *_gt_workarounds_init()
>> + * GT workarounds should be implemented in the ``*_gt_workarounds_init()``
>> * variants respective to the targeted platforms.
>> *
>> * - Register whitelist: some workarounds need to be implemented in userspace,
>> @@ -64,8 +64,8 @@
>> * this is just a special case of a MMIO workaround (as we write the list of
>> * these to/be-whitelisted registers to some special HW registers).
>> *
>> - * Register whitelisting should be done in the *_whitelist_build() variants
>> - * respective to the targeted platforms.
>> + * Register whitelisting should be done in the ``*_whitelist_build()``
>> + * variants respective to the targeted platforms.
>> *
>> * - Workaround batchbuffers: buffers that get executed automatically by the
>> * hardware on every HW context restore. These buffers are created and
>> --
>> 2.39.0
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-01-31 13:03 ` Mauro Carvalho Chehab
@ 2023-02-06 17:00 ` Rodrigo Vivi
2023-02-06 17:14 ` Gustavo Sousa
2023-02-07 11:26 ` Mauro Carvalho Chehab
0 siblings, 2 replies; 8+ messages in thread
From: Rodrigo Vivi @ 2023-02-06 17:00 UTC (permalink / raw)
To: Mauro Carvalho Chehab; +Cc: intel-gfx
On Tue, Jan 31, 2023 at 02:03:01PM +0100, Mauro Carvalho Chehab wrote:
>
> On 1/24/23 20:39, Rodrigo Vivi wrote:
> > On Sat, Jan 21, 2023 at 04:08:53PM -0300, Gustavo Sousa wrote:
> > > The wildchar ("*") used in the function name patterns in the
> > > documentation was taken as a start of an "emphasis" inline markup. Wrap
> > > the patterns with the inline literal markup and, for consistency, do the
> > > same for the other function names mentioned.
> > >
> > > Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds")
> > > Reported-by: kernel test robot <lkp@intel.com>
> > > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> > Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
> >
> > just in case he sees some better alternative for the escaping the '*'
> >
> > My fear is that this ``*_fn_name()`` could create invalid links in the doc...
>
>
> Seems OK to me. ``foo`` is literal inline. It won't try to generate
> cross-references.
>
>
> Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Gustavo and Mauro, please accept my apologies here.
I ended up pushing the patch from Bagas that had a escape \*
instead of the `` wrapper.
For some unexcused reason I had missed Mauro's response here
and forgot about this. I'm really sorry.
And the escape sounded more natural so I just pushed it immediately.
>
>
> >
> >
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++----------
> > > 1 file changed, 10 insertions(+), 10 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > index 918a271447e2..e849035d8dc5 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > @@ -30,8 +30,8 @@
> > > * creation to have a "primed golden context", i.e. a context image that
> > > * already contains the changes needed to all the registers.
> > > *
> > > - * Context workarounds should be implemented in the *_ctx_workarounds_init()
> > > - * variants respective to the targeted platforms.
> > > + * Context workarounds should be implemented in the
> > > + * ``*_ctx_workarounds_init()`` variants respective to the targeted platforms.
> > > *
> > > * - Engine workarounds: the list of these WAs is applied whenever the specific
> > > * engine is reset. It's also possible that a set of engine classes share a
> > > @@ -46,16 +46,16 @@
> > > * ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference.
> > > *
> > > * Workarounds for registers specific to RCS and CCS should be implemented in
> > > - * rcs_engine_wa_init() and ccs_engine_wa_init(), respectively; those for
> > > - * registers belonging to BCS, VCS or VECS should be implemented in
> > > - * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific
> > > - * engine's MMIO range but that are part of of the common RCS/CCS reset domain
> > > - * should be implemented in general_render_compute_wa_init().
> > > + * ``rcs_engine_wa_init()`` and ``ccs_engine_wa_init()``, respectively; those
> > > + * for registers belonging to BCS, VCS or VECS should be implemented in
> > > + * ``xcs_engine_wa_init()``. Workarounds for registers not belonging to a
> > > + * specific engine's MMIO range but that are part of of the common RCS/CCS
> > > + * reset domain should be implemented in ``general_render_compute_wa_init()``.
> > > *
> > > * - GT workarounds: the list of these WAs is applied whenever these registers
> > > * revert to their default values: on GPU reset, suspend/resume [1]_, etc.
> > > *
> > > - * GT workarounds should be implemented in the *_gt_workarounds_init()
> > > + * GT workarounds should be implemented in the ``*_gt_workarounds_init()``
> > > * variants respective to the targeted platforms.
> > > *
> > > * - Register whitelist: some workarounds need to be implemented in userspace,
> > > @@ -64,8 +64,8 @@
> > > * this is just a special case of a MMIO workaround (as we write the list of
> > > * these to/be-whitelisted registers to some special HW registers).
> > > *
> > > - * Register whitelisting should be done in the *_whitelist_build() variants
> > > - * respective to the targeted platforms.
> > > + * Register whitelisting should be done in the ``*_whitelist_build()``
> > > + * variants respective to the targeted platforms.
> > > *
> > > * - Workaround batchbuffers: buffers that get executed automatically by the
> > > * hardware on every HW context restore. These buffers are created and
> > > --
> > > 2.39.0
> > >
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-02-06 17:00 ` Rodrigo Vivi
@ 2023-02-06 17:14 ` Gustavo Sousa
2023-02-07 11:26 ` Mauro Carvalho Chehab
1 sibling, 0 replies; 8+ messages in thread
From: Gustavo Sousa @ 2023-02-06 17:14 UTC (permalink / raw)
To: Rodrigo Vivi, Mauro Carvalho Chehab; +Cc: intel-gfx
On Mon, Feb 06, 2023 at 12:00:01PM -0500, Rodrigo Vivi wrote:
> On Tue, Jan 31, 2023 at 02:03:01PM +0100, Mauro Carvalho Chehab wrote:
> >
> > On 1/24/23 20:39, Rodrigo Vivi wrote:
> > > On Sat, Jan 21, 2023 at 04:08:53PM -0300, Gustavo Sousa wrote:
> > > > The wildchar ("*") used in the function name patterns in the
> > > > documentation was taken as a start of an "emphasis" inline markup. Wrap
> > > > the patterns with the inline literal markup and, for consistency, do the
> > > > same for the other function names mentioned.
> > > >
> > > > Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds")
> > > > Reported-by: kernel test robot <lkp@intel.com>
> > > > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> > > Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
> > >
> > > just in case he sees some better alternative for the escaping the '*'
> > >
> > > My fear is that this ``*_fn_name()`` could create invalid links in the doc...
> >
> >
> > Seems OK to me. ``foo`` is literal inline. It won't try to generate
> > cross-references.
> >
> >
> > Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org>
>
> Gustavo and Mauro, please accept my apologies here.
> I ended up pushing the patch from Bagas that had a escape \*
> instead of the `` wrapper.
>
> For some unexcused reason I had missed Mauro's response here
> and forgot about this. I'm really sorry.
>
> And the escape sounded more natural so I just pushed it immediately.
No worries! I'm glad the issue that I caused is fixed :-)
--
Gustavo Sousa
>
> >
> >
> > >
> > >
> > > > ---
> > > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++----------
> > > > 1 file changed, 10 insertions(+), 10 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > > index 918a271447e2..e849035d8dc5 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > > @@ -30,8 +30,8 @@
> > > > * creation to have a "primed golden context", i.e. a context image that
> > > > * already contains the changes needed to all the registers.
> > > > *
> > > > - * Context workarounds should be implemented in the *_ctx_workarounds_init()
> > > > - * variants respective to the targeted platforms.
> > > > + * Context workarounds should be implemented in the
> > > > + * ``*_ctx_workarounds_init()`` variants respective to the targeted platforms.
> > > > *
> > > > * - Engine workarounds: the list of these WAs is applied whenever the specific
> > > > * engine is reset. It's also possible that a set of engine classes share a
> > > > @@ -46,16 +46,16 @@
> > > > * ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference.
> > > > *
> > > > * Workarounds for registers specific to RCS and CCS should be implemented in
> > > > - * rcs_engine_wa_init() and ccs_engine_wa_init(), respectively; those for
> > > > - * registers belonging to BCS, VCS or VECS should be implemented in
> > > > - * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific
> > > > - * engine's MMIO range but that are part of of the common RCS/CCS reset domain
> > > > - * should be implemented in general_render_compute_wa_init().
> > > > + * ``rcs_engine_wa_init()`` and ``ccs_engine_wa_init()``, respectively; those
> > > > + * for registers belonging to BCS, VCS or VECS should be implemented in
> > > > + * ``xcs_engine_wa_init()``. Workarounds for registers not belonging to a
> > > > + * specific engine's MMIO range but that are part of of the common RCS/CCS
> > > > + * reset domain should be implemented in ``general_render_compute_wa_init()``.
> > > > *
> > > > * - GT workarounds: the list of these WAs is applied whenever these registers
> > > > * revert to their default values: on GPU reset, suspend/resume [1]_, etc.
> > > > *
> > > > - * GT workarounds should be implemented in the *_gt_workarounds_init()
> > > > + * GT workarounds should be implemented in the ``*_gt_workarounds_init()``
> > > > * variants respective to the targeted platforms.
> > > > *
> > > > * - Register whitelist: some workarounds need to be implemented in userspace,
> > > > @@ -64,8 +64,8 @@
> > > > * this is just a special case of a MMIO workaround (as we write the list of
> > > > * these to/be-whitelisted registers to some special HW registers).
> > > > *
> > > > - * Register whitelisting should be done in the *_whitelist_build() variants
> > > > - * respective to the targeted platforms.
> > > > + * Register whitelisting should be done in the ``*_whitelist_build()``
> > > > + * variants respective to the targeted platforms.
> > > > *
> > > > * - Workaround batchbuffers: buffers that get executed automatically by the
> > > > * hardware on every HW context restore. These buffers are created and
> > > > --
> > > > 2.39.0
> > > >
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation
2023-02-06 17:00 ` Rodrigo Vivi
2023-02-06 17:14 ` Gustavo Sousa
@ 2023-02-07 11:26 ` Mauro Carvalho Chehab
1 sibling, 0 replies; 8+ messages in thread
From: Mauro Carvalho Chehab @ 2023-02-07 11:26 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On 2/6/23 18:00, Rodrigo Vivi wrote:
> On Tue, Jan 31, 2023 at 02:03:01PM +0100, Mauro Carvalho Chehab wrote:
>> On 1/24/23 20:39, Rodrigo Vivi wrote:
>>> On Sat, Jan 21, 2023 at 04:08:53PM -0300, Gustavo Sousa wrote:
>>>> The wildchar ("*") used in the function name patterns in the
>>>> documentation was taken as a start of an "emphasis" inline markup. Wrap
>>>> the patterns with the inline literal markup and, for consistency, do the
>>>> same for the other function names mentioned.
>>>>
>>>> Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds")
>>>> Reported-by: kernel test robot <lkp@intel.com>
>>>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>>> Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
>>>
>>> just in case he sees some better alternative for the escaping the '*'
>>>
>>> My fear is that this ``*_fn_name()`` could create invalid links in the doc...
>>
>> Seems OK to me. ``foo`` is literal inline. It won't try to generate
>> cross-references.
>>
>>
>> Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org>
> Gustavo and Mauro, please accept my apologies here.
> I ended up pushing the patch from Bagas that had a escape \*
> instead of the `` wrapper.
>
> For some unexcused reason I had missed Mauro's response here
> and forgot about this. I'm really sorry.
>
> And the escape sounded more natural so I just pushed it immediately.
No worries. An escape \* works.
Regards,
Mauro
^ permalink raw reply [flat|nested] 8+ messages in thread
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2023-01-21 19:08 [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation Gustavo Sousa
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2023-01-24 19:39 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
2023-01-31 13:03 ` Mauro Carvalho Chehab
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