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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/cdclk: hide struct intel_cdclk_vals
Date: Thu, 9 Dec 2021 19:46:32 +0200	[thread overview]
Message-ID: <YbJA+NyOdTHuxBZV@intel.com> (raw)
In-Reply-To: <f7e7e7fb91eae2b49a0ab5d982a235cec34e3320.1639068649.git.jani.nikula@intel.com>

On Thu, Dec 09, 2021 at 06:51:24PM +0200, Jani Nikula wrote:
> The definition is not needed outside of intel_cdclk.c.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 8 ++++++++
>  drivers/gpu/drm/i915/display/intel_cdclk.h | 8 --------
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 84674a4f7226..56f40d9430b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1219,6 +1219,14 @@ static bool has_cdclk_squasher(struct drm_i915_private *i915)
>  	return IS_DG2(i915);
>  }
>  
> +struct intel_cdclk_vals {
> +	u32 cdclk;
> +	u16 refclk;
> +	u16 waveform;
> +	u8 divider;	/* CD2X divider * 2 */
> +	u8 ratio;
> +};
> +
>  static const struct intel_cdclk_vals bxt_cdclk_table[] = {
>  	{ .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
>  	{ .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index 77e8c8e1708f..50b93226517e 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -16,14 +16,6 @@ struct drm_i915_private;
>  struct intel_atomic_state;
>  struct intel_crtc_state;
>  
> -struct intel_cdclk_vals {
> -	u32 cdclk;
> -	u16 refclk;
> -	u16 waveform;
> -	u8 divider;	/* CD2X divider * 2 */
> -	u8 ratio;
> -};
> -
>  struct intel_cdclk_state {
>  	struct intel_global_state base;
>  
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2021-12-09 17:46 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-09 16:51 [Intel-gfx] [PATCH 0/4] drm/i915/cdclk: improve abstractions Jani Nikula
2021-12-09 16:51 ` [Intel-gfx] [PATCH 1/4] drm/i915/cdclk: move intel_atomic_check_cdclk() to intel_cdclk.c Jani Nikula
2021-12-09 17:45   ` Ville Syrjälä
2021-12-09 16:51 ` [Intel-gfx] [PATCH 2/4] drm/i915/cdclk: un-inline intel_cdclk_state functions Jani Nikula
2021-12-09 17:54   ` Ville Syrjälä
2021-12-09 18:38     ` Jani Nikula
2021-12-09 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915/cdclk: hide struct intel_cdclk_vals Jani Nikula
2021-12-09 17:46   ` Ville Syrjälä [this message]
2021-12-09 16:51 ` [Intel-gfx] [PATCH 4/4] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency Jani Nikula
2021-12-09 17:55   ` Ville Syrjälä
2021-12-09 17:57 ` [Intel-gfx] [PATCH 0/4] drm/i915/cdclk: improve abstractions Ville Syrjälä
2021-12-10  4:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-12-10  4:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-10  4:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-10 15:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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