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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state
Date: Thu, 15 Sep 2022 00:42:57 +0300	[thread overview]
Message-ID: <YyJK4ctJ4Eum4Jbs@intel.com> (raw)
In-Reply-To: <YyJGLUva3ZOLUBui@intel.com>

On Thu, Sep 15, 2022 at 12:22:53AM +0300, Ville Syrjälä wrote:
> On Fri, Aug 19, 2022 at 05:58:19PM -0700, Anusha Srivatsa wrote:
> > This is a prep patch for what the rest of the series does.
> > 
> > Add existing actions that change cdclk - squash, crawl, modeset to
> > intel_cdclk_state so we have access to the cdclk values
> > that are in transition.
> > 
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cdclk.h | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> > index b535cf6a7d9e..43835688ee02 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> > @@ -15,6 +15,14 @@ struct drm_i915_private;
> >  struct intel_atomic_state;
> >  struct intel_crtc_state;
> >  
> > +enum cdclk_actions {
> > +	INTEL_CDCLK_MODESET = 0,
> > +	INTEL_CDCLK_SQUASH,
> > +	INTEL_CDCLK_CRAWL,
> > +	INTEL_CDCLK_NOOP,
> > +	MAX_CDCLK_ACTIONS
> > +};
> 
> This whole actions thing feels overly complicated to me.
> I think we should only need something like this:
> 
> if (new.squash > old.squash) {
> 	mid.vco = old.vco;
> 	mid.squash = new.squash;
> } else {
> 	mid.vco = new.vco;
> 	mid.squash = old.squash;
> }
> /*
>  * bunch of asserts here to make sure
>  * the mid state looks sane.
>  */
> set_cdclk(mid);
> set_cdclk(new);
> 
> And perhaps the current set_cdclk needs to get chunked up
> into smaller pieces so we don't do all the pre/post stuff
> more than once needlessly.

One idea might be to pass just a pair of flags to set_cdclk()
whether to skip the pre/post steps.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-09-14 21:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-20  0:58 [Intel-gfx] [PATCH 0/4] CDCLK churn: move checks to atomic check Anusha Srivatsa
2022-08-20  0:58 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state Anusha Srivatsa
2022-09-14 20:00   ` Navare, Manasi
2022-09-14 21:22   ` Ville Syrjälä
2022-09-14 21:42     ` Ville Syrjälä [this message]
2022-09-14 21:58       ` Srivatsa, Anusha
2022-09-15  6:05         ` Ville Syrjälä
2022-08-20  0:58 ` [Intel-gfx] [PATCH 2/4] drm/i915/squash: s/intel_cdclk_can_squash/intel_cdclk_squash Anusha Srivatsa
2022-09-14 20:03   ` Navare, Manasi
2022-08-20  0:58 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl Anusha Srivatsa
2022-08-20  0:58 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Add cdclk checks to atomic check Anusha Srivatsa
2022-08-20  1:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for CDCLK churn: move " Patchwork
2022-08-20  1:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-08-20  1:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-07-27 23:26 [Intel-gfx] [PATCH 0/4] Move CDCLK checks to atomic check phase Anusha Srivatsa
2022-07-27 23:26 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state Anusha Srivatsa
2022-03-15 19:47 [Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase Anusha Srivatsa
2022-03-15 19:47 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state Anusha Srivatsa
2022-03-11  7:04 [Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase Anusha Srivatsa
2022-03-11  7:04 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state Anusha Srivatsa

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