Re: [Intel-gfx] [PATCH v7 0/6] High refresh rate PSR fixes

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Mar 29, 2023 at 06:06:57PM +0300, Jouni Högander wrote:
> Fix/adjust Wa_16013835468 and implement Wa_14015648006. Implement Wa_1136 and
> check for vblank being long enough for psr2.
> 
> v7:
>  - Apply  Wa_14015648006 for display version 12 only
>  - Disable WM optimization in pre plane hook allow in post plane hook
> v6:
>  - Handle mode change in psr enable/disable
>  - Handle wm_level_disable changes separately in pre plane hook
>  - Handle WA #1136 in pre/post plane hooks
> v5:
>  - Add missing patch
> v4:
>  - Keep/fix Wa_16013835468
>  - Use calculated block count number instead of fixed 12
> v3:
>  - apply Wa_16013835468 for icl as well
>  - set/clear chicken bit in post plane update
>  - Unify pre/post hooks
> v2: Implement Wa_1136
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> 
> Jouni Högander (6):
>   drm/i915/psr: Unify pre/post hooks
>   drm/i915/psr: Modify/Fix Wa_16013835468 and prepare for Wa_14015648006
>   drm/i915/psr: Implement Wa_14015648006
>   drm/i915/psr: Add helpers for block count number handling
>   drm/i915/psr: Check that vblank is long enough for psr2
>   drm/i915/psr: Implement Display WA #1136

For the series
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 90 +++++++++++++++----
>  drivers/gpu/drm/i915/display/skl_watermark.c  |  6 +-
>  3 files changed, 74 insertions(+), 23 deletions(-)
> 
> -- 
> 2.34.1

-- 
Ville Syrjälä
Intel