* [Intel-gfx] [PATCH i-g-t] intel_gpu_top: Fix frequency and rc6 counters
@ 2023-05-23 15:24 Tvrtko Ursulin
2023-05-24 16:37 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 3+ messages in thread
From: Tvrtko Ursulin @ 2023-05-23 15:24 UTC (permalink / raw)
To: igt-dev, Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Need to reset aggregated counters before adding to them otherwise numbers
will grow endlessly.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Fixes: 3dadeff69d4a ("intel_gpu_top: Switch pmu_counter to use aggregated values")
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
tools/intel_gpu_top.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 4e49367a70c7..a89f13d46f11 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -710,6 +710,10 @@ static void pmu_sample(struct engines *engines)
engines->ts.prev = engines->ts.cur;
engines->ts.cur = pmu_read_multi(engines->fd, num_val, val);
+ engines->freq_req.val.cur = engines->freq_req.val.prev = 0;
+ engines->freq_act.val.cur = engines->freq_act.val.prev = 0;
+ engines->rc6.val.cur = engines->rc6.val.prev = 0;
+
for (i = 0; i < engines->num_gts; i++) {
update_sample(&engines->freq_req_gt[i], val);
engines->freq_req.val.cur += engines->freq_req_gt[i].val.cur;
--
2.39.2
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Intel-gfx] [PATCH i-g-t] intel_gpu_top: Fix frequency and rc6 counters
2023-05-23 15:24 [Intel-gfx] [PATCH i-g-t] intel_gpu_top: Fix frequency and rc6 counters Tvrtko Ursulin
@ 2023-05-24 16:37 ` Umesh Nerlige Ramappa
2023-05-24 16:44 ` Tvrtko Ursulin
0 siblings, 1 reply; 3+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-05-24 16:37 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev, Intel-gfx
On Tue, May 23, 2023 at 04:24:07PM +0100, Tvrtko Ursulin wrote:
>From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
>Need to reset aggregated counters before adding to them otherwise numbers
>will grow endlessly.
>
>Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>Fixes: 3dadeff69d4a ("intel_gpu_top: Switch pmu_counter to use aggregated values")
>Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> tools/intel_gpu_top.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
>index 4e49367a70c7..a89f13d46f11 100644
>--- a/tools/intel_gpu_top.c
>+++ b/tools/intel_gpu_top.c
>@@ -710,6 +710,10 @@ static void pmu_sample(struct engines *engines)
> engines->ts.prev = engines->ts.cur;
> engines->ts.cur = pmu_read_multi(engines->fd, num_val, val);
>
>+ engines->freq_req.val.cur = engines->freq_req.val.prev = 0;
>+ engines->freq_act.val.cur = engines->freq_act.val.prev = 0;
>+ engines->rc6.val.cur = engines->rc6.val.prev = 0;
>+
lgtm,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Umesh
> for (i = 0; i < engines->num_gts; i++) {
> update_sample(&engines->freq_req_gt[i], val);
> engines->freq_req.val.cur += engines->freq_req_gt[i].val.cur;
>--
>2.39.2
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Intel-gfx] [PATCH i-g-t] intel_gpu_top: Fix frequency and rc6 counters
2023-05-24 16:37 ` Umesh Nerlige Ramappa
@ 2023-05-24 16:44 ` Tvrtko Ursulin
0 siblings, 0 replies; 3+ messages in thread
From: Tvrtko Ursulin @ 2023-05-24 16:44 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev, Intel-gfx
On 24/05/2023 17:37, Umesh Nerlige Ramappa wrote:
> On Tue, May 23, 2023 at 04:24:07PM +0100, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Need to reset aggregated counters before adding to them otherwise numbers
>> will grow endlessly.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Fixes: 3dadeff69d4a ("intel_gpu_top: Switch pmu_counter to use
>> aggregated values")
>> Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
>> ---
>> tools/intel_gpu_top.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
>> index 4e49367a70c7..a89f13d46f11 100644
>> --- a/tools/intel_gpu_top.c
>> +++ b/tools/intel_gpu_top.c
>> @@ -710,6 +710,10 @@ static void pmu_sample(struct engines *engines)
>> engines->ts.prev = engines->ts.cur;
>> engines->ts.cur = pmu_read_multi(engines->fd, num_val, val);
>>
>> + engines->freq_req.val.cur = engines->freq_req.val.prev = 0;
>> + engines->freq_act.val.cur = engines->freq_act.val.prev = 0;
>> + engines->rc6.val.cur = engines->rc6.val.prev = 0;
>> +
>
> lgtm,
>
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Pushed, thanks!
Regards,
Tvrtko
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2023-05-23 15:24 [Intel-gfx] [PATCH i-g-t] intel_gpu_top: Fix frequency and rc6 counters Tvrtko Ursulin
2023-05-24 16:37 ` Umesh Nerlige Ramappa
2023-05-24 16:44 ` Tvrtko Ursulin
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