[PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Jouni Högander]

We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
prevent DC6 in case of Panel Replay. This causes problems if user-space is
polling for vblank events.

Fix this by setting target DC state as DC_STATE_EN_UPTO_DC5 when both
source and sink are supporting eDP Panel Replay and VBI is enabled.

Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../gpu/drm/i915/display/intel_display_core.h |  2 +
 .../gpu/drm/i915/display/intel_display_irq.c  | 48 +++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 0a711114ff2b4..0707bc2047931 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -457,6 +457,8 @@ struct intel_display {
 		/* For i915gm/i945gm vblank irq workaround */
 		u8 vblank_enabled;
 
+		struct work_struct vblank_work;
+
 		u32 de_irq_mask[I915_MAX_PIPES];
 		u32 pipestat_irq_mask[I915_MAX_PIPES];
 	} irq;
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 8f13f148c73e3..96abfb356349e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -15,6 +15,7 @@
 #include "intel_display_irq.h"
 #include "intel_display_trace.h"
 #include "intel_display_types.h"
+#include "intel_dp.h"
 #include "intel_dp_aux.h"
 #include "intel_dsb.h"
 #include "intel_fdi_regs.h"
@@ -1361,9 +1362,47 @@ static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
 	return true;
 }
 
+static void intel_display_vblank_work(struct work_struct *work)
+{
+	struct intel_display *display =
+		container_of(work, typeof(*display), irq.vblank_work);
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	/*
+	 * NOTE: intel_display_power_set_target_dc_state is used only by PSR
+	 * code for DC3CO handling. DC3CO target states is currently disabled in
+	 * PSR code. If DC3CO is taken into use we need take that into account
+	 * here as well.
+	 */
+	intel_display_power_set_target_dc_state(i915, display->irq.vblank_enabled ?
+						DC_STATE_EN_UPTO_DC5 : DC_STATE_EN_UPTO_DC6);
+}
+
+/*
+ * We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
+ * prevent DC6 in case of Panel Replay. This causes problems if user-space is
+ * polling for vblank events.
+ */
+static bool block_dc6_needed(struct intel_display *display)
+{
+	struct intel_encoder *encoder;
+
+	for_each_intel_encoder_with_psr(display->drm, encoder) {
+		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+		if (!intel_dp_is_edp(intel_dp))
+			continue;
+
+		if (CAN_PANEL_REPLAY(intel_dp))
+			return true;
+	}
+	return false;
+}
+
 int bdw_enable_vblank(struct drm_crtc *_crtc)
 {
 	struct intel_crtc *crtc = to_intel_crtc(_crtc);
+	struct intel_display *display = to_intel_display(crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	unsigned long irqflags;
@@ -1371,6 +1410,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
 	if (gen11_dsi_configure_te(crtc, true))
 		return 0;
 
+	if (block_dc6_needed(display) && display->irq.vblank_enabled++ == 0)
+		schedule_work(&display->irq.vblank_work);
+
 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
 	bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -1436,6 +1478,7 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
 void bdw_disable_vblank(struct drm_crtc *_crtc)
 {
 	struct intel_crtc *crtc = to_intel_crtc(_crtc);
+	struct intel_display *display = to_intel_display(crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	unsigned long irqflags;
@@ -1446,6 +1489,9 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
 	bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+
+	if (block_dc6_needed(display) && --display->irq.vblank_enabled == 0)
+		schedule_work(&display->irq.vblank_work);
 }
 
 void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
@@ -1871,4 +1917,6 @@ void intel_display_irq_init(struct drm_i915_private *i915)
 		i915->display.irq.display_irqs_enabled = false;
 
 	intel_hotplug_irq_init(i915);
+
+	INIT_WORK(&i915->display.irq.vblank_work, intel_display_vblank_work);
 }
-- 
2.34.1

Re: [PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Ville Syrjälä]

On Wed, Sep 11, 2024 at 03:40:15PM +0300, Jouni Högander wrote:
> We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
> prevent DC6 in case of Panel Replay.

This doesn't make sense to me. I *think* we are currently
supposed to always operate in the "main link on" mode for panel replay.
But if we enter DC6 then for sure the main link will be turned off.
Also DC6 is a superset of DC5, so how can we enter DC6 if we can't
even enter DC5?

> This causes problems if user-space is
> polling for vblank events.
> 
> Fix this by setting target DC state as DC_STATE_EN_UPTO_DC5 when both
> source and sink are supporting eDP Panel Replay and VBI is enabled.
> 
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_core.h |  2 +
>  .../gpu/drm/i915/display/intel_display_irq.c  | 48 +++++++++++++++++++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 0a711114ff2b4..0707bc2047931 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -457,6 +457,8 @@ struct intel_display {
>  		/* For i915gm/i945gm vblank irq workaround */
>  		u8 vblank_enabled;
>  
> +		struct work_struct vblank_work;
> +
>  		u32 de_irq_mask[I915_MAX_PIPES];
>  		u32 pipestat_irq_mask[I915_MAX_PIPES];
>  	} irq;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 8f13f148c73e3..96abfb356349e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -15,6 +15,7 @@
>  #include "intel_display_irq.h"
>  #include "intel_display_trace.h"
>  #include "intel_display_types.h"
> +#include "intel_dp.h"
>  #include "intel_dp_aux.h"
>  #include "intel_dsb.h"
>  #include "intel_fdi_regs.h"
> @@ -1361,9 +1362,47 @@ static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
>  	return true;
>  }
>  
> +static void intel_display_vblank_work(struct work_struct *work)
> +{
> +	struct intel_display *display =
> +		container_of(work, typeof(*display), irq.vblank_work);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
> +	/*
> +	 * NOTE: intel_display_power_set_target_dc_state is used only by PSR
> +	 * code for DC3CO handling. DC3CO target states is currently disabled in
> +	 * PSR code. If DC3CO is taken into use we need take that into account
> +	 * here as well.
> +	 */
> +	intel_display_power_set_target_dc_state(i915, display->irq.vblank_enabled ?
> +						DC_STATE_EN_UPTO_DC5 : DC_STATE_EN_UPTO_DC6);
> +}
> +
> +/*
> + * We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
> + * prevent DC6 in case of Panel Replay. This causes problems if user-space is
> + * polling for vblank events.
> + */
> +static bool block_dc6_needed(struct intel_display *display)
> +{
> +	struct intel_encoder *encoder;
> +
> +	for_each_intel_encoder_with_psr(display->drm, encoder) {
> +		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> +		if (!intel_dp_is_edp(intel_dp))
> +			continue;
> +
> +		if (CAN_PANEL_REPLAY(intel_dp))
> +			return true;
> +	}
> +	return false;
> +}
> +
>  int bdw_enable_vblank(struct drm_crtc *_crtc)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(_crtc);
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	unsigned long irqflags;
> @@ -1371,6 +1410,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
>  	if (gen11_dsi_configure_te(crtc, true))
>  		return 0;
>  
> +	if (block_dc6_needed(display) && display->irq.vblank_enabled++ == 0)
> +		schedule_work(&display->irq.vblank_work);
> +
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
>  	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> @@ -1436,6 +1478,7 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
>  void bdw_disable_vblank(struct drm_crtc *_crtc)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(_crtc);
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	unsigned long irqflags;
> @@ -1446,6 +1489,9 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
>  	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> +
> +	if (block_dc6_needed(display) && --display->irq.vblank_enabled == 0)
> +		schedule_work(&display->irq.vblank_work);
>  }
>  
>  void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> @@ -1871,4 +1917,6 @@ void intel_display_irq_init(struct drm_i915_private *i915)
>  		i915->display.irq.display_irqs_enabled = false;
>  
>  	intel_hotplug_irq_init(i915);
> +
> +	INIT_WORK(&i915->display.irq.vblank_work, intel_display_vblank_work);
>  }
> -- 
> 2.34.1

-- 
Ville Syrjälä
Intel

Re: [PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Hogander, Jouni]

On Wed, 2024-09-11 at 16:00 +0300, Ville Syrjälä wrote:
> On Wed, Sep 11, 2024 at 03:40:15PM +0300, Jouni Högander wrote:
> > We need to block DC6 entry in case of Panel Replay as enabling VBI
> > doesn't
> > prevent DC6 in case of Panel Replay.
> 
> This doesn't make sense to me. I *think* we are currently
> supposed to always operate in the "main link on" mode for panel
> replay.

This is not true. Check bspec 68920:

"When performing PR on an eDP port the Source will allow advanced link
power management (ALPM) to turn the Main Link OFF when not sending an
SDP or update region."

And if you check block_dc6_needed in my patch that is checking eDP.

I was originally planning to handle this by preventing PR entry when
VBLANK is enabled, but that would be more expensive from power
managements point of view -> decided to go with blocking DC6.

BR,

Jouni Högander

> But if we enter DC6 then for sure the main link will be turned off.
> Also DC6 is a superset of DC5, so how can we enter DC6 if we can't
> even enter DC5?
> 
> > This causes problems if user-space is
> > polling for vblank events.
> > 
> > Fix this by setting target DC state as DC_STATE_EN_UPTO_DC5 when
> > both
> > source and sink are supporting eDP Panel Replay and VBI is enabled.
> > 
> > Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  .../gpu/drm/i915/display/intel_display_core.h |  2 +
> >  .../gpu/drm/i915/display/intel_display_irq.c  | 48
> > +++++++++++++++++++
> >  2 files changed, 50 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> > b/drivers/gpu/drm/i915/display/intel_display_core.h
> > index 0a711114ff2b4..0707bc2047931 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > @@ -457,6 +457,8 @@ struct intel_display {
> >                 /* For i915gm/i945gm vblank irq workaround */
> >                 u8 vblank_enabled;
> >  
> > +               struct work_struct vblank_work;
> > +
> >                 u32 de_irq_mask[I915_MAX_PIPES];
> >                 u32 pipestat_irq_mask[I915_MAX_PIPES];
> >         } irq;
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > index 8f13f148c73e3..96abfb356349e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > @@ -15,6 +15,7 @@
> >  #include "intel_display_irq.h"
> >  #include "intel_display_trace.h"
> >  #include "intel_display_types.h"
> > +#include "intel_dp.h"
> >  #include "intel_dp_aux.h"
> >  #include "intel_dsb.h"
> >  #include "intel_fdi_regs.h"
> > @@ -1361,9 +1362,47 @@ static bool gen11_dsi_configure_te(struct
> > intel_crtc *intel_crtc,
> >         return true;
> >  }
> >  
> > +static void intel_display_vblank_work(struct work_struct *work)
> > +{
> > +       struct intel_display *display =
> > +               container_of(work, typeof(*display),
> > irq.vblank_work);
> > +       struct drm_i915_private *i915 = to_i915(display->drm);
> > +
> > +       /*
> > +        * NOTE: intel_display_power_set_target_dc_state is used
> > only by PSR
> > +        * code for DC3CO handling. DC3CO target states is
> > currently disabled in
> > +        * PSR code. If DC3CO is taken into use we need take that
> > into account
> > +        * here as well.
> > +        */
> > +       intel_display_power_set_target_dc_state(i915, display-
> > >irq.vblank_enabled ?
> > +                                               DC_STATE_EN_UPTO_DC
> > 5 : DC_STATE_EN_UPTO_DC6);
> > +}
> > +
> > +/*
> > + * We need to block DC6 entry in case of Panel Replay as enabling
> > VBI doesn't
> > + * prevent DC6 in case of Panel Replay. This causes problems if
> > user-space is
> > + * polling for vblank events.
> > + */
> > +static bool block_dc6_needed(struct intel_display *display)
> > +{
> > +       struct intel_encoder *encoder;
> > +
> > +       for_each_intel_encoder_with_psr(display->drm, encoder) {
> > +               struct intel_dp *intel_dp =
> > enc_to_intel_dp(encoder);
> > +
> > +               if (!intel_dp_is_edp(intel_dp))
> > +                       continue;
> > +
> > +               if (CAN_PANEL_REPLAY(intel_dp))
> > +                       return true;
> > +       }
> > +       return false;
> > +}
> > +
> >  int bdw_enable_vblank(struct drm_crtc *_crtc)
> >  {
> >         struct intel_crtc *crtc = to_intel_crtc(_crtc);
> > +       struct intel_display *display = to_intel_display(crtc);
> >         struct drm_i915_private *dev_priv = to_i915(crtc-
> > >base.dev);
> >         enum pipe pipe = crtc->pipe;
> >         unsigned long irqflags;
> > @@ -1371,6 +1410,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
> >         if (gen11_dsi_configure_te(crtc, true))
> >                 return 0;
> >  
> > +       if (block_dc6_needed(display) && display-
> > >irq.vblank_enabled++ == 0)
> > +               schedule_work(&display->irq.vblank_work);
> > +
> >         spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> >         bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
> >         spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> > @@ -1436,6 +1478,7 @@ void ilk_disable_vblank(struct drm_crtc
> > *crtc)
> >  void bdw_disable_vblank(struct drm_crtc *_crtc)
> >  {
> >         struct intel_crtc *crtc = to_intel_crtc(_crtc);
> > +       struct intel_display *display = to_intel_display(crtc);
> >         struct drm_i915_private *dev_priv = to_i915(crtc-
> > >base.dev);
> >         enum pipe pipe = crtc->pipe;
> >         unsigned long irqflags;
> > @@ -1446,6 +1489,9 @@ void bdw_disable_vblank(struct drm_crtc
> > *_crtc)
> >         spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> >         bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
> >         spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> > +
> > +       if (block_dc6_needed(display) && --display-
> > >irq.vblank_enabled == 0)
> > +               schedule_work(&display->irq.vblank_work);
> >  }
> >  
> >  void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> > @@ -1871,4 +1917,6 @@ void intel_display_irq_init(struct
> > drm_i915_private *i915)
> >                 i915->display.irq.display_irqs_enabled = false;
> >  
> >         intel_hotplug_irq_init(i915);
> > +
> > +       INIT_WORK(&i915->display.irq.vblank_work,
> > intel_display_vblank_work);
> >  }
> > -- 
> > 2.34.1
> 

Re: [PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Ville Syrjälä]

On Wed, Sep 11, 2024 at 01:14:33PM +0000, Hogander, Jouni wrote:
> On Wed, 2024-09-11 at 16:00 +0300, Ville Syrjälä wrote:
> > On Wed, Sep 11, 2024 at 03:40:15PM +0300, Jouni Högander wrote:
> > > We need to block DC6 entry in case of Panel Replay as enabling VBI
> > > doesn't
> > > prevent DC6 in case of Panel Replay.
> > 
> > This doesn't make sense to me. I *think* we are currently
> > supposed to always operate in the "main link on" mode for panel
> > replay.
> 
> This is not true. Check bspec 68920:
> 
> "When performing PR on an eDP port the Source will allow advanced link
> power management (ALPM) to turn the Main Link OFF when not sending an
> SDP or update region."

Right, it seems to be a thing for eDP only.

> 
> And if you check block_dc6_needed in my patch that is checking eDP.
> 
> I was originally planning to handle this by preventing PR entry when
> VBLANK is enabled, but that would be more expensive from power
> managements point of view -> decided to go with blocking DC6.

None of this explains how DC6 vs. DC5 is somehow different.
DC5 should already turn of all the clocks/etc so nothing real
can actually happen anymore. The only thing DC6 adds on top
of DC5 is turning off some extra power wells.

Hmm. So get_allowed_dc_mask() seems to be telling me that new
platforms only have DC6 but no DC5. Is that correct or not?
No idea. But that means we are in fact disabling all DC states
and that at least explains how something might happen due to
this patch.

The one thing that still doesn't quite make sense is that I would
assume that the main link would get turned off regardless of DC6
or not, which I would think causes the timing generator to stop
anyway and should still give us no vblanks...

-- 
Ville Syrjälä
Intel

Re: [PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Ville Syrjälä]

On Wed, Sep 11, 2024 at 03:40:15PM +0300, Jouni Högander wrote:
> We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
> prevent DC6 in case of Panel Replay. This causes problems if user-space is
> polling for vblank events.
> 
> Fix this by setting target DC state as DC_STATE_EN_UPTO_DC5 when both
> source and sink are supporting eDP Panel Replay and VBI is enabled.
> 
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_core.h |  2 +
>  .../gpu/drm/i915/display/intel_display_irq.c  | 48 +++++++++++++++++++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 0a711114ff2b4..0707bc2047931 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -457,6 +457,8 @@ struct intel_display {
>  		/* For i915gm/i945gm vblank irq workaround */
>  		u8 vblank_enabled;
>  
> +		struct work_struct vblank_work;
> +
>  		u32 de_irq_mask[I915_MAX_PIPES];
>  		u32 pipestat_irq_mask[I915_MAX_PIPES];
>  	} irq;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 8f13f148c73e3..96abfb356349e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -15,6 +15,7 @@
>  #include "intel_display_irq.h"
>  #include "intel_display_trace.h"
>  #include "intel_display_types.h"
> +#include "intel_dp.h"
>  #include "intel_dp_aux.h"
>  #include "intel_dsb.h"
>  #include "intel_fdi_regs.h"
> @@ -1361,9 +1362,47 @@ static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
>  	return true;
>  }
>  
> +static void intel_display_vblank_work(struct work_struct *work)
> +{
> +	struct intel_display *display =
> +		container_of(work, typeof(*display), irq.vblank_work);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
> +	/*
> +	 * NOTE: intel_display_power_set_target_dc_state is used only by PSR
> +	 * code for DC3CO handling. DC3CO target states is currently disabled in
> +	 * PSR code. If DC3CO is taken into use we need take that into account
> +	 * here as well.
> +	 */
> +	intel_display_power_set_target_dc_state(i915, display->irq.vblank_enabled ?

Hmm. How racy is this? I suppose workqueue should have sufficient
barriers to make the earlier increment/decrement visible to the
executing work. And vblank_enabled is a u8 so shouldn't tear
even when racing against another concurrent enable/disable.
And the last work scheduled should win out in the end
due to the way workqueue scheduling works. So I guess it works.

Might want to stick a READ_ONCE() here to highlight the
unlocked nature.

I have had some thoughts about reworking the vblank locking to
use per-crtc locks, which would require converting this to a
proper atomic_t though.

> +						DC_STATE_EN_UPTO_DC5 : DC_STATE_EN_UPTO_DC6);
> +}
> +
> +/*
> + * We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
> + * prevent DC6 in case of Panel Replay. This causes problems if user-space is
> + * polling for vblank events.
> + */
> +static bool block_dc6_needed(struct intel_display *display)
> +{
> +	struct intel_encoder *encoder;
> +
> +	for_each_intel_encoder_with_psr(display->drm, encoder) {
> +		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> +		if (!intel_dp_is_edp(intel_dp))
> +			continue;
> +
> +		if (CAN_PANEL_REPLAY(intel_dp))

That depends on intel_dp->psr.sink_panel_replay_support which can
updated during detect(). Granted, for eDP it's only done once,
but as soon as we introduce link off mode for non-eDP this is going
to turn into a race as well.

We might want to stick an actual flag or something into the crtc
itself that we can massage at modeset time to indicate whether
it needs this workaround.

> +			return true;
> +	}
> +	return false;
> +}
> +
>  int bdw_enable_vblank(struct drm_crtc *_crtc)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(_crtc);
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	unsigned long irqflags;
> @@ -1371,6 +1410,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
>  	if (gen11_dsi_configure_te(crtc, true))
>  		return 0;
>  
> +	if (block_dc6_needed(display) && display->irq.vblank_enabled++ == 0)
> +		schedule_work(&display->irq.vblank_work);
> +
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
>  	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> @@ -1436,6 +1478,7 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
>  void bdw_disable_vblank(struct drm_crtc *_crtc)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(_crtc);
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	unsigned long irqflags;
> @@ -1446,6 +1489,9 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
>  	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> +
> +	if (block_dc6_needed(display) && --display->irq.vblank_enabled == 0)
> +		schedule_work(&display->irq.vblank_work);
>  }
>  
>  void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> @@ -1871,4 +1917,6 @@ void intel_display_irq_init(struct drm_i915_private *i915)
>  		i915->display.irq.display_irqs_enabled = false;
>  
>  	intel_hotplug_irq_init(i915);
> +
> +	INIT_WORK(&i915->display.irq.vblank_work, intel_display_vblank_work);
>  }
> -- 
> 2.34.1

-- 
Ville Syrjälä
Intel

✗ Fi.CI.SPARSE: warning for drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Patchwork]

== Series Details ==

Series: drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay
URL   : https://patchwork.freedesktop.org/series/138520/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.BAT: failure for drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 19418 bytes --]

== Series Details ==

Series: drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay
URL   : https://patchwork.freedesktop.org/series/138520/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15394 -> Patchwork_138520v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_138520v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_138520v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/index.html

Participating hosts (38 -> 40)
------------------------------

  Additional (4): bat-mtlp-8 bat-dg2-11 bat-arlh-2 fi-kbl-8809g 
  Missing    (2): fi-snb-2520m fi-bsw-n3050 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_138520v1:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-8:         NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@i915_selftest@live@workarounds.html

  
Known issues
------------

  Here are the changes found in Patchwork_138520v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-mtlp-8:         NOTRUN -> [SKIP][2] ([i915#9318])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@debugfs_test@basic-hwmon.html
    - bat-arlh-2:         NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@debugfs_test@basic-hwmon.html

  * igt@fbdev@eof:
    - bat-arlh-2:         NOTRUN -> [SKIP][4] ([i915#11345]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@fbdev@eof.html

  * igt@fbdev@info:
    - bat-arlh-2:         NOTRUN -> [SKIP][5] ([i915#1849])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@fbdev@info.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - bat-arlh-2:         NOTRUN -> [SKIP][7] ([i915#10213] / [i915#11671]) +3 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-mtlp-8:         NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@gem_lmem_swapping@parallel-random-engines.html
    - fi-kbl-8809g:       NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/fi-kbl-8809g/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_mmap@basic:
    - bat-dg2-11:         NOTRUN -> [SKIP][10] ([i915#4083])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@gem_mmap@basic.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][11] ([i915#4083])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@gem_mmap@basic.html
    - bat-arlh-2:         NOTRUN -> [SKIP][12] ([i915#11343])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@gem_mmap@basic.html

  * igt@gem_render_tiled_blits@basic:
    - bat-dg2-11:         NOTRUN -> [SKIP][13] ([i915#4079]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@gem_render_tiled_blits@basic.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][14] ([i915#4079]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@gem_render_tiled_blits@basic.html
    - bat-arlh-2:         NOTRUN -> [SKIP][15] ([i915#10197] / [i915#11725])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@gem_render_tiled_blits@basic.html

  * igt@gem_tiled_blits@basic:
    - bat-arlh-2:         NOTRUN -> [SKIP][16] ([i915#10196]) +4 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@gem_tiled_blits@basic.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-dg2-11:         NOTRUN -> [SKIP][17] ([i915#4077]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@gem_tiled_fence_blits@basic.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][18] ([i915#4077]) +2 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-arlh-2:         NOTRUN -> [SKIP][19] ([i915#10206] / [i915#11724])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg2-11:         NOTRUN -> [SKIP][20] ([i915#11681] / [i915#6621])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@i915_pm_rps@basic-api.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][21] ([i915#11681] / [i915#6621])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@i915_pm_rps@basic-api.html
    - bat-arlh-2:         NOTRUN -> [SKIP][22] ([i915#10209] / [i915#11681])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         NOTRUN -> [INCOMPLETE][23] ([i915#10341])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@i915_selftest@live.html
    - bat-arls-1:         [PASS][24] -> [DMESG-WARN][25] ([i915#10341] / [i915#12133])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15394/bat-arls-1/igt@i915_selftest@live.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arls-1/igt@i915_selftest@live.html
    - bat-arls-2:         [PASS][26] -> [DMESG-WARN][27] ([i915#10341] / [i915#12133])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15394/bat-arls-2/igt@i915_selftest@live.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arls-2/igt@i915_selftest@live.html

  * igt@i915_selftest@live@hangcheck:
    - bat-arls-1:         [PASS][28] -> [DMESG-WARN][29] ([i915#11349])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15394/bat-arls-1/igt@i915_selftest@live@hangcheck.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arls-1/igt@i915_selftest@live@hangcheck.html
    - bat-arls-2:         [PASS][30] -> [DMESG-WARN][31] ([i915#11349])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15394/bat-arls-2/igt@i915_selftest@live@hangcheck.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arls-2/igt@i915_selftest@live@hangcheck.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - bat-dg2-11:         NOTRUN -> [SKIP][32] ([i915#4212]) +7 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-dg2-11:         NOTRUN -> [SKIP][33] ([i915#5190])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][34] ([i915#5190])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
    - bat-arlh-2:         NOTRUN -> [SKIP][35] ([i915#10200] / [i915#11666] / [i915#12203])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - bat-arlh-2:         NOTRUN -> [SKIP][36] ([i915#10200] / [i915#11666]) +8 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-mtlp-8:         NOTRUN -> [SKIP][37] ([i915#4212]) +8 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
    - bat-dg2-11:         NOTRUN -> [SKIP][38] ([i915#4215] / [i915#5190])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - bat-dg2-11:         NOTRUN -> [SKIP][39] ([i915#4103] / [i915#4213]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-mtlp-8:         NOTRUN -> [SKIP][40] ([i915#4213]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][41] +30 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/fi-kbl-8809g/igt@kms_dsc@dsc-basic.html
    - bat-dg2-11:         NOTRUN -> [SKIP][42] ([i915#3555] / [i915#3840])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_dsc@dsc-basic.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][43] ([i915#3555] / [i915#3840] / [i915#9159])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-mtlp-8:         NOTRUN -> [SKIP][44]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_force_connector_basic@force-load-detect.html
    - bat-dg2-11:         NOTRUN -> [SKIP][45]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - bat-dg2-11:         NOTRUN -> [SKIP][46] ([i915#5274])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_force_connector_basic@prune-stale-modes.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][47] ([i915#5274])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
    - bat-arls-5:         [PASS][48] -> [INCOMPLETE][49] ([i915#11320])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15394/bat-arls-5/igt@kms_pipe_crc_basic@nonblocking-crc.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arls-5/igt@kms_pipe_crc_basic@nonblocking-crc.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-dg2-11:         NOTRUN -> [SKIP][50] ([i915#5354])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr@psr-cursor-plane-move@edp-1:
    - bat-mtlp-8:         NOTRUN -> [CRASH][51] ([i915#12209] / [i915#12215]) +3 other tests crash
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_psr@psr-cursor-plane-move@edp-1.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - bat-mtlp-8:         NOTRUN -> [WARN][52] ([i915#12209] / [i915#12215]) +3 other tests warn
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_psr@psr-primary-page-flip:
    - bat-arlh-2:         NOTRUN -> [SKIP][53] ([i915#11346]) +32 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-dg2-11:         NOTRUN -> [SKIP][54] ([i915#1072] / [i915#9732]) +3 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-arlh-2:         NOTRUN -> [SKIP][55] ([i915#10208] / [i915#8809])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-dg2-11:         NOTRUN -> [SKIP][56] ([i915#3555])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][57] ([i915#3555] / [i915#8809])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-dg2-11:         NOTRUN -> [SKIP][58] ([i915#3708])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-read:
    - bat-mtlp-8:         NOTRUN -> [SKIP][59] ([i915#3708]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@prime_vgem@basic-fence-read.html
    - bat-arlh-2:         NOTRUN -> [SKIP][60] ([i915#10212] / [i915#11726])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - bat-dg2-11:         NOTRUN -> [SKIP][61] ([i915#3708] / [i915#4077]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@prime_vgem@basic-gtt.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][62] ([i915#3708] / [i915#4077]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@basic-read:
    - bat-arlh-2:         NOTRUN -> [SKIP][63] ([i915#10214] / [i915#11726])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@basic-write:
    - bat-dg2-11:         NOTRUN -> [SKIP][64] ([i915#3291] / [i915#3708]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-dg2-11/igt@prime_vgem@basic-write.html
    - bat-mtlp-8:         NOTRUN -> [SKIP][65] ([i915#10216] / [i915#3708])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-mtlp-8/igt@prime_vgem@basic-write.html
    - bat-arlh-2:         NOTRUN -> [SKIP][66] ([i915#10216] / [i915#11723])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/bat-arlh-2/igt@prime_vgem@basic-write.html

  
  [i915#10196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10196
  [i915#10197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10197
  [i915#10200]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10200
  [i915#10206]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10206
  [i915#10208]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10208
  [i915#10209]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10209
  [i915#10212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10212
  [i915#10213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10213
  [i915#10214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10214
  [i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
  [i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11320]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11320
  [i915#11343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11343
  [i915#11345]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11345
  [i915#11346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11346
  [i915#11349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11349
  [i915#11666]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11666
  [i915#11671]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11671
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11723
  [i915#11724]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11724
  [i915#11725]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11725
  [i915#11726]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11726
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#12203]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12203
  [i915#12209]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12209
  [i915#12215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12215
  [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
  [i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732


Build changes
-------------

  * Linux: CI_DRM_15394 -> Patchwork_138520v1

  CI-20190529: 20190529
  CI_DRM_15394: 15654ec9b99d27d360553f2191c07979cb064f9a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8012: 8012
  Patchwork_138520v1: 15654ec9b99d27d360553f2191c07979cb064f9a @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138520v1/index.html

[-- Attachment #2: Type: text/html, Size: 23571 bytes --]

Re: [PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Hogander, Jouni]

On Wed, 2024-09-11 at 17:23 +0300, Ville Syrjälä wrote:
> On Wed, Sep 11, 2024 at 01:14:33PM +0000, Hogander, Jouni wrote:
> > On Wed, 2024-09-11 at 16:00 +0300, Ville Syrjälä wrote:
> > > On Wed, Sep 11, 2024 at 03:40:15PM +0300, Jouni Högander wrote:
> > > > We need to block DC6 entry in case of Panel Replay as enabling
> > > > VBI
> > > > doesn't
> > > > prevent DC6 in case of Panel Replay.
> > > 
> > > This doesn't make sense to me. I *think* we are currently
> > > supposed to always operate in the "main link on" mode for panel
> > > replay.
> > 
> > This is not true. Check bspec 68920:
> > 
> > "When performing PR on an eDP port the Source will allow advanced
> > link
> > power management (ALPM) to turn the Main Link OFF when not sending
> > an
> > SDP or update region."
> 
> Right, it seems to be a thing for eDP only.
> 
> > 
> > And if you check block_dc6_needed in my patch that is checking eDP.
> > 
> > I was originally planning to handle this by preventing PR entry
> > when
> > VBLANK is enabled, but that would be more expensive from power
> > managements point of view -> decided to go with blocking DC6.
> 
> None of this explains how DC6 vs. DC5 is somehow different.
> DC5 should already turn of all the clocks/etc so nothing real
> can actually happen anymore. The only thing DC6 adds on top
> of DC5 is turning off some extra power wells.

Ok, based on your description I should use DC_STATE_DISABLE.

> 
> Hmm. So get_allowed_dc_mask() seems to be telling me that new
> platforms only have DC6 but no DC5. Is that correct or not?
> No idea. But that means we are in fact disabling all DC states
> and that at least explains how something might happen due to
> this patch.

Probably this is what happens. I will use DC_STATE_DISABLE instead.

> 
> The one thing that still doesn't quite make sense is that I would
> assume that the main link would get turned off regardless of DC6
> or not, which I would think causes the timing generator to stop
> anyway and should still give us no vblanks...

Comment from HW team was:

"Unlike PSR1/PSR2, the Transcoder’s timing generator never stops when
PR is Active (assuming DC6 is disabled), so the Transcoder will always
send V. Blank events to the interrupt structure."

BR,

Jouni Högander


>