[PATCH 0/7] drm/i915: Some wm/cxsr cleanups

[PATCH 0/7] drm/i915: Some wm/cxsr cleanups

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Start sorting out the pre-skl wm/cxsr code a bit. My plan is:
- move platform specific stuff out from intel_atomic_plane.c
- make cxsr actually robust (currently it has a bunch of poorly
  handled corner cases)
- probably some other fixes and cleanups

This series doesn't achieve those goals yet, because
I decided to limit it to non-functional changes, but
it's a start.

Also included the sprite uapi header cleanup here
to save ci a bit of grief.

Ville Syrjälä (7):
  drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype
  drm/i915: Combine .compute_{pipe,intermediate}_wm() into one
  drm/i915: Extract ilk_must_disable_lp_wm()
  drm/i915: Clean up intel_wm_need_update()
  drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm
  drm/i915: s/disable_lp_wm/disable_cxsr/
  drm/i915: Rename variables in ilk_intermedidate_wm()

 drivers/gpu/drm/i915/display/i9xx_wm.c        | 168 +++++++++++++++---
 drivers/gpu/drm/i915/display/i9xx_wm.h        |   4 +-
 drivers/gpu/drm/i915/display/intel_atomic.c   |   1 -
 .../gpu/drm/i915/display/intel_atomic_plane.c | 133 ++++++--------
 drivers/gpu/drm/i915/display/intel_display.c  |  21 +--
 .../gpu/drm/i915/display/intel_display_core.h |   6 +-
 .../drm/i915/display/intel_display_types.h    |   3 -
 drivers/gpu/drm/i915/display/intel_sprite.h   |   3 -
 drivers/gpu/drm/i915/display/intel_wm.c       |  24 +--
 drivers/gpu/drm/i915/display/intel_wm.h       |   6 +-
 drivers/gpu/drm/i915/i915_driver.c            |   2 +-
 11 files changed, 221 insertions(+), 150 deletions(-)

-- 
2.44.2

[PATCH 1/7] drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_sprite_set_colorkey_ioctl() lives in intel_sprice_uapi.{c,h}
these days. For some reason the old protoype was left behind
in intel_sprite.h and even used by i915_driver.c. Remove the
leftovers and switch to including the correct header for the
prototype.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.h | 3 ---
 drivers/gpu/drm/i915/i915_driver.c          | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h b/drivers/gpu/drm/i915/display/intel_sprite.h
index 044a032e41b9..f22abeb82032 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.h
+++ b/drivers/gpu/drm/i915/display/intel_sprite.h
@@ -10,7 +10,6 @@
 
 struct drm_device;
 struct drm_display_mode;
-struct drm_file;
 struct drm_i915_private;
 struct intel_crtc_state;
 struct intel_plane_state;
@@ -19,8 +18,6 @@ enum pipe;
 #ifdef I915
 struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 					      enum pipe pipe, int plane);
-int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
-				    struct drm_file *file_priv);
 int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
 int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
 
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 943e938040c0..b0ec54a4e033 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -59,7 +59,7 @@
 #include "display/intel_overlay.h"
 #include "display/intel_pch_refclk.h"
 #include "display/intel_pps.h"
-#include "display/intel_sprite.h"
+#include "display/intel_sprite_uapi.h"
 #include "display/skl_watermark.h"
 
 #include "gem/i915_gem_context.h"
-- 
2.44.2

[PATCH 2/7] drm/i915: Combine .compute_{pipe, intermediate}_wm() into one

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We always call .compute_pipe_wm() and .compute_intermediate_wm()
back to back. Just combine them to a single hook for simplicity.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c        | 57 +++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_display.c  | 17 +-----
 .../gpu/drm/i915/display/intel_display_core.h |  6 +-
 drivers/gpu/drm/i915/display/intel_wm.c       | 24 ++------
 drivers/gpu/drm/i915/display/intel_wm.h       |  6 +-
 5 files changed, 63 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 5b21604312fd..3151a31a5653 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -1288,6 +1288,22 @@ static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
 	return 0;
 }
 
+static int g4x_compute_watermarks(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc)
+{
+	int ret;
+
+	ret = g4x_compute_pipe_wm(state, crtc);
+	if (ret)
+		return ret;
+
+	ret = g4x_compute_intermediate_wm(state, crtc);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 static void g4x_merge_wm(struct drm_i915_private *dev_priv,
 			 struct g4x_wm_values *wm)
 {
@@ -1914,6 +1930,22 @@ static int vlv_compute_intermediate_wm(struct intel_atomic_state *state,
 	return 0;
 }
 
+static int vlv_compute_watermarks(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc)
+{
+	int ret;
+
+	ret = vlv_compute_pipe_wm(state, crtc);
+	if (ret)
+		return ret;
+
+	ret = vlv_compute_intermediate_wm(state, crtc);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 static void vlv_merge_wm(struct drm_i915_private *dev_priv,
 			 struct vlv_wm_values *wm)
 {
@@ -2940,6 +2972,22 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
 	return 0;
 }
 
+static int ilk_compute_watermarks(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc)
+{
+	int ret;
+
+	ret = ilk_compute_pipe_wm(state, crtc);
+	if (ret)
+		return ret;
+
+	ret = ilk_compute_intermediate_wm(state, crtc);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 /*
  * Merge the watermarks from all active pipes for a specific level.
  */
@@ -3986,16 +4034,14 @@ static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv)
 }
 
 static const struct intel_wm_funcs ilk_wm_funcs = {
-	.compute_pipe_wm = ilk_compute_pipe_wm,
-	.compute_intermediate_wm = ilk_compute_intermediate_wm,
+	.compute_watermarks = ilk_compute_watermarks,
 	.initial_watermarks = ilk_initial_watermarks,
 	.optimize_watermarks = ilk_optimize_watermarks,
 	.get_hw_state = ilk_wm_get_hw_state,
 };
 
 static const struct intel_wm_funcs vlv_wm_funcs = {
-	.compute_pipe_wm = vlv_compute_pipe_wm,
-	.compute_intermediate_wm = vlv_compute_intermediate_wm,
+	.compute_watermarks = vlv_compute_watermarks,
 	.initial_watermarks = vlv_initial_watermarks,
 	.optimize_watermarks = vlv_optimize_watermarks,
 	.atomic_update_watermarks = vlv_atomic_update_fifo,
@@ -4003,8 +4049,7 @@ static const struct intel_wm_funcs vlv_wm_funcs = {
 };
 
 static const struct intel_wm_funcs g4x_wm_funcs = {
-	.compute_pipe_wm = g4x_compute_pipe_wm,
-	.compute_intermediate_wm = g4x_compute_intermediate_wm,
+	.compute_watermarks = g4x_compute_watermarks,
 	.initial_watermarks = g4x_initial_watermarks,
 	.optimize_watermarks = g4x_optimize_watermarks,
 	.get_hw_state = g4x_wm_get_hw_state_and_sanitize,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d4a371edfcdd..60866316fc68 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4292,22 +4292,11 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
 	if (ret)
 		return ret;
 
-	ret = intel_compute_pipe_wm(state, crtc);
+	ret = intel_wm_compute(state, crtc);
 	if (ret) {
 		drm_dbg_kms(&dev_priv->drm,
-			    "Target pipe watermarks are invalid\n");
-		return ret;
-	}
-
-	/*
-	 * Calculate 'intermediate' watermarks that satisfy both the
-	 * old state and the new state.  We can program these
-	 * immediately.
-	 */
-	ret = intel_compute_intermediate_wm(state, crtc);
-	if (ret) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "No valid intermediate pipe watermarks are possible\n");
+			    "[CRTC:%d:%s] watermarks are invalid\n",
+			    crtc->base.base.id, crtc->base.name);
 		return ret;
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 0a711114ff2b..9ad125d3c0c0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -81,10 +81,8 @@ struct intel_display_funcs {
 struct intel_wm_funcs {
 	/* update_wm is for legacy wm management */
 	void (*update_wm)(struct drm_i915_private *dev_priv);
-	int (*compute_pipe_wm)(struct intel_atomic_state *state,
-			       struct intel_crtc *crtc);
-	int (*compute_intermediate_wm)(struct intel_atomic_state *state,
-				       struct intel_crtc *crtc);
+	int (*compute_watermarks)(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc);
 	void (*initial_watermarks)(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc);
 	void (*atomic_update_watermarks)(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_wm.c b/drivers/gpu/drm/i915/display/intel_wm.c
index 462917bc488f..d7dc49aecd27 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.c
+++ b/drivers/gpu/drm/i915/display/intel_wm.c
@@ -50,29 +50,15 @@ void intel_update_watermarks(struct drm_i915_private *i915)
 		i915->display.funcs.wm->update_wm(i915);
 }
 
-int intel_compute_pipe_wm(struct intel_atomic_state *state,
-			  struct intel_crtc *crtc)
+int intel_wm_compute(struct intel_atomic_state *state,
+		     struct intel_crtc *crtc)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state);
 
-	if (i915->display.funcs.wm->compute_pipe_wm)
-		return i915->display.funcs.wm->compute_pipe_wm(state, crtc);
-
-	return 0;
-}
-
-int intel_compute_intermediate_wm(struct intel_atomic_state *state,
-				  struct intel_crtc *crtc)
-{
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
-
-	if (!i915->display.funcs.wm->compute_intermediate_wm)
-		return 0;
-
-	if (drm_WARN_ON(&i915->drm, !i915->display.funcs.wm->compute_pipe_wm))
+	if (!display->funcs.wm->compute_watermarks)
 		return 0;
 
-	return i915->display.funcs.wm->compute_intermediate_wm(state, crtc);
+	return display->funcs.wm->compute_watermarks(state, crtc);
 }
 
 bool intel_initial_watermarks(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_wm.h b/drivers/gpu/drm/i915/display/intel_wm.h
index 48429ac140d2..e97cdca89a5c 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.h
+++ b/drivers/gpu/drm/i915/display/intel_wm.h
@@ -15,10 +15,8 @@ struct intel_crtc_state;
 struct intel_plane_state;
 
 void intel_update_watermarks(struct drm_i915_private *i915);
-int intel_compute_pipe_wm(struct intel_atomic_state *state,
-			  struct intel_crtc *crtc);
-int intel_compute_intermediate_wm(struct intel_atomic_state *state,
-				  struct intel_crtc *crtc);
+int intel_wm_compute(struct intel_atomic_state *state,
+		     struct intel_crtc *crtc);
 bool intel_initial_watermarks(struct intel_atomic_state *state,
 			      struct intel_crtc *crtc);
 void intel_atomic_update_watermarks(struct intel_atomic_state *state,
-- 
2.44.2

[PATCH 3/7] drm/i915: Extract ilk_must_disable_lp_wm()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the ilk/snb/ivb LP watermark disable checks into a separate
function similar to the gmch counterpart (i9xx_must_disable_cxsr()).
Reduces the clutter in intel_plane_atomic_calc_changes() significantly.

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../gpu/drm/i915/display/intel_atomic_plane.c | 95 +++++++++++--------
 1 file changed, 57 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 928d985f9985..b5bbcc773ec0 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -493,6 +493,61 @@ static bool i9xx_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state
 	return old_ctl != new_ctl;
 }
 
+static bool ilk_must_disable_lp_wm(const struct intel_crtc_state *new_crtc_state,
+				   const struct intel_plane_state *old_plane_state,
+				   const struct intel_plane_state *new_plane_state)
+{
+	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
+	bool old_visible = old_plane_state->uapi.visible;
+	bool new_visible = new_plane_state->uapi.visible;
+	bool modeset, turn_on;
+
+	if (plane->id == PLANE_CURSOR)
+		return false;
+
+	modeset = intel_crtc_needs_modeset(new_crtc_state);
+	turn_on = new_visible && (!old_visible || modeset);
+
+	/*
+	 * ILK/SNB DVSACNTR/Sprite Enable
+	 * IVB SPR_CTL/Sprite Enable
+	 * "When in Self Refresh Big FIFO mode, a write to enable the
+	 *  plane will be internally buffered and delayed while Big FIFO
+	 *  mode is exiting."
+	 *
+	 * Which means that enabling the sprite can take an extra frame
+	 * when we start in big FIFO mode (LP1+). Thus we need to drop
+	 * down to LP0 and wait for vblank in order to make sure the
+	 * sprite gets enabled on the next vblank after the register write.
+	 * Doing otherwise would risk enabling the sprite one frame after
+	 * we've already signalled flip completion. We can resume LP1+
+	 * once the sprite has been enabled.
+	 *
+	 * With experimental results seems this is needed also for primary
+	 * plane, not only sprite plane.
+	 */
+	if (turn_on)
+		return true;
+
+	/*
+	 * WaCxSRDisabledForSpriteScaling:ivb
+	 * IVB SPR_SCALE/Scaling Enable
+	 * "Low Power watermarks must be disabled for at least one
+	 *  frame before enabling sprite scaling, and kept disabled
+	 *  until sprite scaling is disabled."
+	 *
+	 * ILK/SNB DVSASCALE/Scaling Enable
+	 * "When in Self Refresh Big FIFO mode, scaling enable will be
+	 *  masked off while Big FIFO mode is exiting."
+	 *
+	 * Despite the w/a only being listed for IVB we assume that
+	 * the ILK/SNB note has similar ramifications, hence we apply
+	 * the w/a on all three platforms.
+	 */
+	return !intel_plane_is_scaled(old_plane_state) &&
+		intel_plane_is_scaled(new_plane_state);
+}
+
 static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
 					   struct intel_crtc_state *new_crtc_state,
 					   const struct intel_plane_state *old_plane_state,
@@ -568,44 +623,8 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
 	    i9xx_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
 		new_crtc_state->disable_cxsr = true;
 
-	/*
-	 * ILK/SNB DVSACNTR/Sprite Enable
-	 * IVB SPR_CTL/Sprite Enable
-	 * "When in Self Refresh Big FIFO mode, a write to enable the
-	 *  plane will be internally buffered and delayed while Big FIFO
-	 *  mode is exiting."
-	 *
-	 * Which means that enabling the sprite can take an extra frame
-	 * when we start in big FIFO mode (LP1+). Thus we need to drop
-	 * down to LP0 and wait for vblank in order to make sure the
-	 * sprite gets enabled on the next vblank after the register write.
-	 * Doing otherwise would risk enabling the sprite one frame after
-	 * we've already signalled flip completion. We can resume LP1+
-	 * once the sprite has been enabled.
-	 *
-	 *
-	 * WaCxSRDisabledForSpriteScaling:ivb
-	 * IVB SPR_SCALE/Scaling Enable
-	 * "Low Power watermarks must be disabled for at least one
-	 *  frame before enabling sprite scaling, and kept disabled
-	 *  until sprite scaling is disabled."
-	 *
-	 * ILK/SNB DVSASCALE/Scaling Enable
-	 * "When in Self Refresh Big FIFO mode, scaling enable will be
-	 *  masked off while Big FIFO mode is exiting."
-	 *
-	 * Despite the w/a only being listed for IVB we assume that
-	 * the ILK/SNB note has similar ramifications, hence we apply
-	 * the w/a on all three platforms.
-	 *
-	 * With experimental results seems this is needed also for primary
-	 * plane, not only sprite plane.
-	 */
-	if (plane->id != PLANE_CURSOR &&
-	    (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv) ||
-	     IS_IVYBRIDGE(dev_priv)) &&
-	    (turn_on || (!intel_plane_is_scaled(old_plane_state) &&
-			 intel_plane_is_scaled(new_plane_state))))
+	if ((IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) &&
+	    ilk_must_disable_lp_wm(new_crtc_state, old_plane_state, new_plane_state))
 		new_crtc_state->disable_lp_wm = true;
 
 	if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) {
-- 
2.44.2

[PATCH 4/7] drm/i915: Clean up intel_wm_need_update()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_wm_need_update() is a mess when it comes to variable
names and constness. The checks also keep alternating randomly
between 'old != cur' vs. 'cur != old'. Clean it all up.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../gpu/drm/i915/display/intel_atomic_plane.c | 20 +++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index b5bbcc773ec0..2aeb4cd5b5a1 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -393,22 +393,22 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
 }
 
 /* FIXME nuke when all wm code is atomic */
-static bool intel_wm_need_update(const struct intel_plane_state *cur,
-				 struct intel_plane_state *new)
+static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
+				 const struct intel_plane_state *new_plane_state)
 {
 	/* Update watermarks on tiling or size changes. */
-	if (new->uapi.visible != cur->uapi.visible)
+	if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
 		return true;
 
-	if (!cur->hw.fb || !new->hw.fb)
+	if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
 		return false;
 
-	if (cur->hw.fb->modifier != new->hw.fb->modifier ||
-	    cur->hw.rotation != new->hw.rotation ||
-	    drm_rect_width(&new->uapi.src) != drm_rect_width(&cur->uapi.src) ||
-	    drm_rect_height(&new->uapi.src) != drm_rect_height(&cur->uapi.src) ||
-	    drm_rect_width(&new->uapi.dst) != drm_rect_width(&cur->uapi.dst) ||
-	    drm_rect_height(&new->uapi.dst) != drm_rect_height(&cur->uapi.dst))
+	if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
+	    old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
+	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||
+	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||
+	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||
+	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))
 		return true;
 
 	return false;
-- 
2.44.2

[PATCH 5/7] drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

As with other watermark calculations, the dodgy pre-g4x
update_wm_{pre,post} flag calcultion would like to know
if a modeset is about to happen or not, and technically
later stages in the atomic_check() may still flag one.
In practice that shouldn't happen as we don't have dynamic
CDCLK implemented for these old platforms.

Regardless it'll be nice to move this old cruft out from
the supposedly platform agnostic plane code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c        | 74 +++++++++++++++++++
 .../gpu/drm/i915/display/intel_atomic_plane.c | 36 ---------
 2 files changed, 74 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 3151a31a5653..15ed3b810947 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -705,6 +705,76 @@ static void pnv_update_wm(struct drm_i915_private *dev_priv)
 	}
 }
 
+static bool i9xx_wm_need_update(const struct intel_plane_state *old_plane_state,
+				const struct intel_plane_state *new_plane_state)
+{
+	/* Update watermarks on tiling or size changes. */
+	if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
+		return true;
+
+	if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
+		return false;
+
+	if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
+	    old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
+	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||
+	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||
+	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||
+	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))
+		return true;
+
+	return false;
+}
+
+static void i9xx_wm_compute(struct intel_crtc_state *new_crtc_state,
+			    const struct intel_plane_state *old_plane_state,
+			    const struct intel_plane_state *new_plane_state)
+{
+	bool turn_off, turn_on, visible, was_visible, mode_changed;
+
+	mode_changed = intel_crtc_needs_modeset(new_crtc_state);
+	was_visible = old_plane_state->uapi.visible;
+	visible = new_plane_state->uapi.visible;
+
+	if (!was_visible && !visible)
+		return;
+
+	turn_off = was_visible && (!visible || mode_changed);
+	turn_on = visible && (!was_visible || mode_changed);
+
+	/* FIXME nuke when all wm code is atomic */
+	if (turn_on) {
+		new_crtc_state->update_wm_pre = true;
+	} else if (turn_off) {
+		new_crtc_state->update_wm_post = true;
+	} else if (i9xx_wm_need_update(old_plane_state, new_plane_state)) {
+		/* FIXME bollocks */
+		new_crtc_state->update_wm_pre = true;
+		new_crtc_state->update_wm_post = true;
+	}
+}
+
+static int i9xx_compute_watermarks(struct intel_atomic_state *state,
+				   struct intel_crtc *crtc)
+{
+	struct intel_crtc_state *new_crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_plane_state *old_plane_state;
+	const struct intel_plane_state *new_plane_state;
+	struct intel_plane *plane;
+	int i;
+
+	for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
+					     new_plane_state, i) {
+		if (plane->pipe != crtc->pipe)
+			continue;
+
+		i9xx_wm_compute(new_crtc_state, old_plane_state, new_plane_state);
+	}
+
+	return 0;
+}
+
 /*
  * Documentation says:
  * "If the line size is small, the TLB fetches can get in the way of the
@@ -4056,18 +4126,22 @@ static const struct intel_wm_funcs g4x_wm_funcs = {
 };
 
 static const struct intel_wm_funcs pnv_wm_funcs = {
+	.compute_watermarks = i9xx_compute_watermarks,
 	.update_wm = pnv_update_wm,
 };
 
 static const struct intel_wm_funcs i965_wm_funcs = {
+	.compute_watermarks = i9xx_compute_watermarks,
 	.update_wm = i965_update_wm,
 };
 
 static const struct intel_wm_funcs i9xx_wm_funcs = {
+	.compute_watermarks = i9xx_compute_watermarks,
 	.update_wm = i9xx_update_wm,
 };
 
 static const struct intel_wm_funcs i845_wm_funcs = {
+	.compute_watermarks = i9xx_compute_watermarks,
 	.update_wm = i845_update_wm,
 };
 
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 2aeb4cd5b5a1..33fec36ec0bd 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -392,28 +392,6 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
 	plane_state->uapi.visible = false;
 }
 
-/* FIXME nuke when all wm code is atomic */
-static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
-				 const struct intel_plane_state *new_plane_state)
-{
-	/* Update watermarks on tiling or size changes. */
-	if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
-		return true;
-
-	if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
-		return false;
-
-	if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
-	    old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
-	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||
-	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||
-	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||
-	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))
-		return true;
-
-	return false;
-}
-
 static bool intel_plane_is_scaled(const struct intel_plane_state *plane_state)
 {
 	int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -602,20 +580,6 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
 		       was_visible, visible,
 		       turn_off, turn_on, mode_changed);
 
-	if (turn_on) {
-		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
-			new_crtc_state->update_wm_pre = true;
-	} else if (turn_off) {
-		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
-			new_crtc_state->update_wm_post = true;
-	} else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
-		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
-			/* FIXME bollocks */
-			new_crtc_state->update_wm_pre = true;
-			new_crtc_state->update_wm_post = true;
-		}
-	}
-
 	if (visible || was_visible)
 		new_crtc_state->fb_bits |= plane->frontbuffer_bit;
 
-- 
2.44.2

[PATCH 6/7] drm/i915: s/disable_lp_wm/disable_cxsr/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The ilk+ disable_lp_wm boolean has the exact same role as
disable_cxsr for gmch platforms. The documentation also
still talks about CxSR on ilk+ even theough the way you
control it has now change to involve toggling the LP watermarks.
Get rid of disable_lp_wm and just use disable_cxsr for ilk+
as well.

TODO: Unify even more to not have any gmch vs. ilk+
      details in high level modeset code...

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c             |  2 +-
 drivers/gpu/drm/i915/display/i9xx_wm.h             |  4 ++--
 drivers/gpu/drm/i915/display/intel_atomic.c        |  1 -
 drivers/gpu/drm/i915/display/intel_atomic_plane.c  | 10 +++++-----
 drivers/gpu/drm/i915/display/intel_display.c       |  4 ++--
 drivers/gpu/drm/i915/display/intel_display_types.h |  3 ---
 6 files changed, 10 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 15ed3b810947..cfc487563c25 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -3396,7 +3396,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
 	dev_priv->display.wm.hw = *results;
 }
 
-bool ilk_disable_lp_wm(struct drm_i915_private *dev_priv)
+bool ilk_disable_cxsr(struct drm_i915_private *dev_priv)
 {
 	return _ilk_disable_lp_wm(dev_priv, WM_DIRTY_LP_ALL);
 }
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.h b/drivers/gpu/drm/i915/display/i9xx_wm.h
index de0920730ab2..06ac37c6c94b 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.h
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.h
@@ -13,12 +13,12 @@ struct intel_crtc_state;
 struct intel_plane_state;
 
 #ifdef I915
-bool ilk_disable_lp_wm(struct drm_i915_private *i915);
+bool ilk_disable_cxsr(struct drm_i915_private *i915);
 void ilk_wm_sanitize(struct drm_i915_private *i915);
 bool intel_set_memory_cxsr(struct drm_i915_private *i915, bool enable);
 void i9xx_wm_init(struct drm_i915_private *i915);
 #else
-static inline bool ilk_disable_lp_wm(struct drm_i915_private *i915)
+static inline bool ilk_disable_cxsr(struct drm_i915_private *i915)
 {
 	return false;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 12d6ed940751..6cac26af128c 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -266,7 +266,6 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
 	crtc_state->update_pipe = false;
 	crtc_state->update_m_n = false;
 	crtc_state->update_lrr = false;
-	crtc_state->disable_lp_wm = false;
 	crtc_state->disable_cxsr = false;
 	crtc_state->update_wm_pre = false;
 	crtc_state->update_wm_post = false;
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 33fec36ec0bd..ef6cffd50275 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -471,9 +471,9 @@ static bool i9xx_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state
 	return old_ctl != new_ctl;
 }
 
-static bool ilk_must_disable_lp_wm(const struct intel_crtc_state *new_crtc_state,
-				   const struct intel_plane_state *old_plane_state,
-				   const struct intel_plane_state *new_plane_state)
+static bool ilk_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state,
+				  const struct intel_plane_state *old_plane_state,
+				  const struct intel_plane_state *new_plane_state)
 {
 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
 	bool old_visible = old_plane_state->uapi.visible;
@@ -588,8 +588,8 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
 		new_crtc_state->disable_cxsr = true;
 
 	if ((IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) &&
-	    ilk_must_disable_lp_wm(new_crtc_state, old_plane_state, new_plane_state))
-		new_crtc_state->disable_lp_wm = true;
+	    ilk_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
+		new_crtc_state->disable_cxsr = true;
 
 	if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) {
 		new_crtc_state->do_async_flip = true;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 60866316fc68..a2257096bd29 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1250,8 +1250,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 	 *
 	 * WaCxSRDisabledForSpriteScaling:ivb
 	 */
-	if (old_crtc_state->hw.active &&
-	    new_crtc_state->disable_lp_wm && ilk_disable_lp_wm(dev_priv))
+	if (!HAS_GMCH(dev_priv) && old_crtc_state->hw.active &&
+	    new_crtc_state->disable_cxsr && ilk_disable_cxsr(dev_priv))
 		intel_crtc_wait_for_next_vblank(crtc);
 
 	/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 000ab373c887..e4c8fb55a92f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1143,9 +1143,6 @@ struct intel_crtc_state {
 	/* w/a for waiting 2 vblanks during crtc enable */
 	enum pipe hsw_workaround_pipe;
 
-	/* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
-	bool disable_lp_wm;
-
 	struct intel_crtc_wm_state wm;
 
 	int min_cdclk[I915_MAX_PLANES];
-- 
2.44.2

[PATCH 7/7] drm/i915: Rename variables in ilk_intermedidate_wm()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

ilk_compute_intermediate_wm() uses rather poor variable names
for its watermark structs. Borrow a better naming convention
from the g4x/vlv counterpart code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c | 35 +++++++++++++++-----------
 1 file changed, 20 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index cfc487563c25..fc928307d062 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -2993,8 +2993,9 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	const struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
-	struct intel_pipe_wm *a = &new_crtc_state->wm.ilk.intermediate;
-	const struct intel_pipe_wm *b = &old_crtc_state->wm.ilk.optimal;
+	struct intel_pipe_wm *intermediate = &new_crtc_state->wm.ilk.intermediate;
+	const struct intel_pipe_wm *optimal = &new_crtc_state->wm.ilk.optimal;
+	const struct intel_pipe_wm *active = &old_crtc_state->wm.ilk.optimal;
 	int level;
 
 	/*
@@ -3002,25 +3003,29 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
 	 * currently active watermarks to get values that are safe both before
 	 * and after the vblank.
 	 */
-	*a = new_crtc_state->wm.ilk.optimal;
+	*intermediate = *optimal;
 	if (!new_crtc_state->hw.active ||
 	    intel_crtc_needs_modeset(new_crtc_state) ||
 	    state->skip_intermediate_wm)
 		return 0;
 
-	a->pipe_enabled |= b->pipe_enabled;
-	a->sprites_enabled |= b->sprites_enabled;
-	a->sprites_scaled |= b->sprites_scaled;
+	intermediate->pipe_enabled |= active->pipe_enabled;
+	intermediate->sprites_enabled |= active->sprites_enabled;
+	intermediate->sprites_scaled |= active->sprites_scaled;
 
 	for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
-		struct intel_wm_level *a_wm = &a->wm[level];
-		const struct intel_wm_level *b_wm = &b->wm[level];
+		struct intel_wm_level *intermediate_wm = &intermediate->wm[level];
+		const struct intel_wm_level *active_wm = &active->wm[level];
 
-		a_wm->enable &= b_wm->enable;
-		a_wm->pri_val = max(a_wm->pri_val, b_wm->pri_val);
-		a_wm->spr_val = max(a_wm->spr_val, b_wm->spr_val);
-		a_wm->cur_val = max(a_wm->cur_val, b_wm->cur_val);
-		a_wm->fbc_val = max(a_wm->fbc_val, b_wm->fbc_val);
+		intermediate_wm->enable &= active_wm->enable;
+		intermediate_wm->pri_val = max(intermediate_wm->pri_val,
+					       active_wm->pri_val);
+		intermediate_wm->spr_val = max(intermediate_wm->spr_val,
+					       active_wm->spr_val);
+		intermediate_wm->cur_val = max(intermediate_wm->cur_val,
+					       active_wm->cur_val);
+		intermediate_wm->fbc_val = max(intermediate_wm->fbc_val,
+					       active_wm->fbc_val);
 	}
 
 	/*
@@ -3029,14 +3034,14 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
 	 * there's no safe way to transition from the old state to
 	 * the new state, so we need to fail the atomic transaction.
 	 */
-	if (!ilk_validate_pipe_wm(dev_priv, a))
+	if (!ilk_validate_pipe_wm(dev_priv, intermediate))
 		return -EINVAL;
 
 	/*
 	 * If our intermediate WM are identical to the final WM, then we can
 	 * omit the post-vblank programming; only update if it's different.
 	 */
-	if (memcmp(a, &new_crtc_state->wm.ilk.optimal, sizeof(*a)) != 0)
+	if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0)
 		new_crtc_state->wm.need_postvbl_update = true;
 
 	return 0;
-- 
2.44.2

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some wm/cxsr cleanups

[Patchwork]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups
URL   : https://patchwork.freedesktop.org/series/138729/
State : warning

== Summary ==

Error: dim checkpatch failed
b9bbeffe8e8d drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype
e59da38fc0ee drm/i915: Combine .compute_{pipe, intermediate}_wm() into one
2fca821abc31 drm/i915: Extract ilk_must_disable_lp_wm()
68c8c43574e2 drm/i915: Clean up intel_wm_need_update()
-:45: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#45: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:408:
+	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||

-:46: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#46: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:409:
+	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||

-:47: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#47: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:410:
+	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||

-:48: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#48: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:411:
+	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))

total: 0 errors, 4 warnings, 0 checks, 32 lines checked
2b12a54135d2 drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm
-:41: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#41: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:720:
+	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||

-:42: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#42: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:721:
+	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||

-:43: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:722:
+	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||

-:44: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#44: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:723:
+	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))

total: 0 errors, 4 warnings, 0 checks, 146 lines checked
78c8ce97b44c drm/i915: s/disable_lp_wm/disable_cxsr/
cab3f831c44b drm/i915: Rename variables in ilk_intermedidate_wm()

✗ Fi.CI.SPARSE: warning for drm/i915: Some wm/cxsr cleanups

[Patchwork]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups
URL   : https://patchwork.freedesktop.org/series/138729/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.BAT: failure for drm/i915: Some wm/cxsr cleanups

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10827 bytes --]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups
URL   : https://patchwork.freedesktop.org/series/138729/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15426 -> Patchwork_138729v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_138729v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_138729v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/index.html

Participating hosts (41 -> 40)
------------------------------

  Additional (1): bat-mtlp-8 
  Missing    (2): fi-snb-2520m fi-bsw-n3050 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_138729v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_parallel@engines:
    - bat-atsm-1:         [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15426/bat-atsm-1/igt@gem_exec_parallel@engines.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-atsm-1/igt@gem_exec_parallel@engines.html

  
Known issues
------------

  Here are the changes found in Patchwork_138729v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-mtlp-8:         NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@debugfs_test@basic-hwmon.html

  * igt@fbdev@eof:
    - bat-arls-1:         [PASS][4] -> [DMESG-WARN][5] ([i915#12102])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15426/bat-arls-1/igt@fbdev@eof.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-1/igt@fbdev@eof.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-mtlp-8:         NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_mmap@basic:
    - bat-mtlp-8:         NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@gem_mmap@basic.html

  * igt@gem_render_tiled_blits@basic:
    - bat-mtlp-8:         NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@gem_render_tiled_blits@basic.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-mtlp-8:         NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@gem_tiled_fence_blits@basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-mtlp-8:         NOTRUN -> [SKIP][10] ([i915#11681] / [i915#6621])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         NOTRUN -> [ABORT][11] ([i915#12061]) +1 other test abort
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@gt_heartbeat:
    - bat-arls-5:         NOTRUN -> [DMESG-WARN][12] ([i915#11637] / [i915#12133]) +3 other tests dmesg-warn
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-5/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_tlb:
    - bat-arls-5:         NOTRUN -> [DMESG-WARN][13] ([i915#11637]) +26 other tests dmesg-warn
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-5/igt@i915_selftest@live@gt_tlb.html

  * igt@i915_selftest@live@objects:
    - bat-arls-5:         NOTRUN -> [DMESG-WARN][14] ([i915#10341] / [i915#11637]) +2 other tests dmesg-warn
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-5/igt@i915_selftest@live@objects.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-mtlp-8:         NOTRUN -> [SKIP][15] ([i915#5190])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-mtlp-8:         NOTRUN -> [SKIP][16] ([i915#4212]) +8 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-mtlp-8:         NOTRUN -> [SKIP][17] ([i915#4213]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-mtlp-8:         NOTRUN -> [SKIP][18] ([i915#3555] / [i915#3840] / [i915#9159])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-mtlp-8:         NOTRUN -> [SKIP][19]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - bat-mtlp-8:         NOTRUN -> [SKIP][20] ([i915#5274])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - bat-mtlp-8:         NOTRUN -> [SKIP][21] ([i915#4077] / [i915#9688]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-mtlp-8:         NOTRUN -> [SKIP][22] ([i915#3555] / [i915#8809])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-mtlp-8:         NOTRUN -> [SKIP][23] ([i915#3708]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - bat-mtlp-8:         NOTRUN -> [SKIP][24] ([i915#3708] / [i915#4077]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@basic-write:
    - bat-mtlp-8:         NOTRUN -> [SKIP][25] ([i915#10216] / [i915#3708])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-mtlp-8/igt@prime_vgem@basic-write.html

  
#### Possible fixes ####

  * igt@fbdev@read:
    - bat-arls-1:         [DMESG-FAIL][26] ([i915#12102]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15426/bat-arls-1/igt@fbdev@read.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-1/igt@fbdev@read.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - bat-apl-1:          [DMESG-WARN][28] ([i915#180] / [i915#1982]) -> [DMESG-WARN][29] ([i915#180])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15426/bat-apl-1/igt@i915_module_load@reload.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-apl-1/igt@i915_module_load@reload.html

  * igt@i915_selftest@live:
    - bat-arls-5:         [ABORT][30] ([i915#12133] / [i915#12175]) -> [DMESG-WARN][31] ([i915#10341] / [i915#12133])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15426/bat-arls-5/igt@i915_selftest@live.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-5/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arls-5:         [ABORT][32] ([i915#12061]) -> [DMESG-WARN][33] ([i915#10341] / [i915#11637])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15426/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/bat-arls-5/igt@i915_selftest@live@workarounds.html

  
  [i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
  [i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341
  [i915#11637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11637
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12102
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#12175]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12175
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
  [i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688


Build changes
-------------

  * Linux: CI_DRM_15426 -> Patchwork_138729v1

  CI-20190529: 20190529
  CI_DRM_15426: 326b4f14959d97e0e786c2f20a8c246573f06fbd @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8020: 7860f9a9394da0a18fc0bf0223a79b533e569f95 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_138729v1: 326b4f14959d97e0e786c2f20a8c246573f06fbd @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v1/index.html

[-- Attachment #2: Type: text/html, Size: 13224 bytes --]

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some wm/cxsr cleanups (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/138729/
State : warning

== Summary ==

Error: dim checkpatch failed
c33eeb2200da drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype
7f54f71f1fb3 drm/i915: Combine .compute_{pipe, intermediate}_wm() into one
d5a13aee5ff0 drm/i915: Extract ilk_must_disable_lp_wm()
e70494bf564e drm/i915: Clean up intel_wm_need_update()
-:45: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#45: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:408:
+	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||

-:46: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#46: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:409:
+	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||

-:47: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#47: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:410:
+	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||

-:48: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#48: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:411:
+	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))

total: 0 errors, 4 warnings, 0 checks, 32 lines checked
852d9cf563b2 drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm
-:41: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#41: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:720:
+	    drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state->uapi.src) ||

-:42: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#42: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:721:
+	    drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state->uapi.src) ||

-:43: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:722:
+	    drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state->uapi.dst) ||

-:44: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#44: FILE: drivers/gpu/drm/i915/display/i9xx_wm.c:723:
+	    drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state->uapi.dst))

total: 0 errors, 4 warnings, 0 checks, 146 lines checked
a5a13f2df35a drm/i915: s/disable_lp_wm/disable_cxsr/
847a153bd0dd drm/i915: Rename variables in ilk_intermedidate_wm()

✗ Fi.CI.SPARSE: warning for drm/i915: Some wm/cxsr cleanups (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/138729/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for drm/i915: Some wm/cxsr cleanups (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2309 bytes --]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/138729/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15438 -> Patchwork_138729v2
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/index.html

Participating hosts (38 -> 35)
------------------------------

  Missing    (3): fi-kbl-7567u fi-cfl-8109u fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_138729v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [PASS][1] -> [ABORT][2] ([i915#12061]) +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/bat-mtlp-8/igt@i915_selftest@live.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/bat-mtlp-8/igt@i915_selftest@live.html
    - bat-arlh-2:         [PASS][3] -> [ABORT][4] ([i915#12133])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/bat-arlh-2/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/bat-arlh-2/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-2:         [PASS][5] -> [ABORT][6] ([i915#12061])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/bat-arlh-2/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/bat-arlh-2/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133


Build changes
-------------

  * Linux: CI_DRM_15438 -> Patchwork_138729v2

  CI-20190529: 20190529
  CI_DRM_15438: e63d4ffd3e279478c789eaceeb28074d9376142a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8024: 15f8ad0bce184e96d171dfe19c06bdef93e7cf72 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_138729v2: e63d4ffd3e279478c789eaceeb28074d9376142a @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/index.html

[-- Attachment #2: Type: text/html, Size: 3013 bytes --]

✗ Fi.CI.IGT: failure for drm/i915: Some wm/cxsr cleanups (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 51258 bytes --]

== Series Details ==

Series: drm/i915: Some wm/cxsr cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/138729/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15438_full -> Patchwork_138729v2_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_138729v2_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_138729v2_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/index.html

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_138729v2_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0:
    - shard-dg2:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html

  
Known issues
------------

  Here are the changes found in Patchwork_138729v2_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][3] ([i915#8411]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-dg2:          NOTRUN -> [SKIP][4] ([i915#11078])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@device_reset@cold-reset-bound.html

  * igt@drm_fdinfo@all-busy-check-all:
    - shard-dg1:          NOTRUN -> [SKIP][5] ([i915#8414])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@drm_fdinfo@all-busy-check-all.html

  * igt@drm_fdinfo@most-busy-check-all:
    - shard-rkl:          [PASS][6] -> [FAIL][7] ([i915#12179]) +1 other test fail
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-3/igt@drm_fdinfo@most-busy-check-all.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@drm_fdinfo@most-busy-check-all.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
    - shard-rkl:          [PASS][8] -> [FAIL][9] ([i915#7742]) +1 other test fail
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-5/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-3/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html

  * igt@gem_ctx_persistence@heartbeat-many:
    - shard-dg2:          NOTRUN -> [SKIP][10] ([i915#8555])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_ctx_persistence@heartbeat-many.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-rkl:          NOTRUN -> [SKIP][11] ([i915#280])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [PASS][12] -> [FAIL][13] ([i915#5784])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-13/igt@gem_eio@reset-stress.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-17/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@bonded-false-hang:
    - shard-dg2:          NOTRUN -> [SKIP][14] ([i915#4812])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_exec_balancer@bonded-false-hang.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-rkl:          NOTRUN -> [SKIP][15] ([i915#4525])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_capture@capture@vecs0-lmem0:
    - shard-dg2:          NOTRUN -> [FAIL][16] ([i915#11965]) +4 other tests fail
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_exec_capture@capture@vecs0-lmem0.html

  * igt@gem_exec_fair@basic-pace:
    - shard-rkl:          NOTRUN -> [FAIL][17] ([i915#2842]) +2 other tests fail
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@gem_exec_fair@basic-pace.html

  * igt@gem_exec_fair@basic-pace-share:
    - shard-tglu:         [PASS][18] -> [FAIL][19] ([i915#2842]) +1 other test fail
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-tglu-8/igt@gem_exec_fair@basic-pace-share.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-tglu-7/igt@gem_exec_fair@basic-pace-share.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][20] -> [FAIL][21] ([i915#2842]) +1 other test fail
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fence@syncobj-timeline-wait:
    - shard-dg1:          [PASS][22] -> [DMESG-WARN][23] ([i915#4423]) +1 other test dmesg-warn
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-17/igt@gem_exec_fence@syncobj-timeline-wait.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-18/igt@gem_exec_fence@syncobj-timeline-wait.html

  * igt@gem_exec_reloc@basic-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][24] ([i915#3281]) +2 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_exec_reloc@basic-cpu.html

  * igt@gem_exec_reloc@basic-cpu-read-noreloc:
    - shard-dg1:          NOTRUN -> [SKIP][25] ([i915#3281])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@gem_exec_reloc@basic-cpu-read-noreloc.html

  * igt@gem_exec_reloc@basic-wc-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][26] ([i915#3281]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_exec_reloc@basic-wc-cpu.html

  * igt@gem_exec_schedule@preempt-queue:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#4537] / [i915#4812])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_exec_schedule@preempt-queue.html

  * igt@gem_exec_schedule@preempt-queue-contexts:
    - shard-dg1:          NOTRUN -> [SKIP][28] ([i915#4812])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@gem_exec_schedule@preempt-queue-contexts.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          NOTRUN -> [SKIP][29] ([i915#7276])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][30] ([i915#4860]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-glk:          NOTRUN -> [SKIP][31] ([i915#4613])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-glk3/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-rkl:          NOTRUN -> [SKIP][32] ([i915#4613]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_mmap_gtt@big-copy:
    - shard-dg2:          NOTRUN -> [SKIP][33] ([i915#4077]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_mmap_gtt@big-copy.html

  * igt@gem_mmap_wc@write-prefaulted:
    - shard-dg2:          NOTRUN -> [SKIP][34] ([i915#4083]) +1 other test skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_mmap_wc@write-prefaulted.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-dg2:          NOTRUN -> [SKIP][35] ([i915#3282])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-rkl:          NOTRUN -> [SKIP][36] ([i915#3282]) +5 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@create-protected-buffer:
    - shard-rkl:          NOTRUN -> [SKIP][37] ([i915#4270]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_pxp@create-protected-buffer.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([i915#4270])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][39] ([i915#5190] / [i915#8428])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][40] ([i915#4079])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_softpin@evict-snoop:
    - shard-rkl:          NOTRUN -> [SKIP][41] +10 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@gem_softpin@evict-snoop.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-rkl:          NOTRUN -> [SKIP][42] ([i915#3297])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][43] ([i915#3297])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@relocations:
    - shard-dg2:          NOTRUN -> [SKIP][44] ([i915#3281] / [i915#3297])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gem_userptr_blits@relocations.html

  * igt@gem_userptr_blits@unsync-unmap-after-close:
    - shard-dg1:          NOTRUN -> [SKIP][45] ([i915#3297])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@gem_userptr_blits@unsync-unmap-after-close.html

  * igt@gen9_exec_parse@bb-chained:
    - shard-rkl:          NOTRUN -> [SKIP][46] ([i915#2527]) +2 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@gen9_exec_parse@bb-chained.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-dg2:          NOTRUN -> [SKIP][47] ([i915#2856]) +1 other test skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@gen9_exec_parse@bb-start-far.html

  * igt@i915_module_load@load:
    - shard-rkl:          NOTRUN -> [SKIP][48] ([i915#6227])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@i915_module_load@load.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-tglu:         [PASS][49] -> [ABORT][50] ([i915#10887] / [i915#9820])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-tglu-5/igt@i915_module_load@reload-with-fault-injection.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-tglu-3/igt@i915_module_load@reload-with-fault-injection.html
    - shard-glk:          [PASS][51] -> [ABORT][52] ([i915#9820])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-glk9/igt@i915_module_load@reload-with-fault-injection.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-glk3/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rps@thresholds:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#11681])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@i915_pm_rps@thresholds.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [PASS][54] -> [ABORT][55] ([i915#12216]) +1 other test abort
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-mtlp-6/igt@i915_selftest@live@workarounds.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-mtlp-4/igt@i915_selftest@live@workarounds.html

  * igt@intel_hwmon@hwmon-write:
    - shard-rkl:          NOTRUN -> [SKIP][56] ([i915#7707])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@intel_hwmon@hwmon-write.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-3-4-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][57] ([i915#8709]) +11 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-3-4-mc-ccs.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-180:
    - shard-rkl:          NOTRUN -> [SKIP][58] ([i915#5286]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][59] ([i915#4538] / [i915#5286])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][60] ([i915#3638]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#4538] / [i915#5190]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][62] ([i915#10307] / [i915#6095]) +148 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-8/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([i915#12042])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][64] ([i915#12042])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][65] ([i915#6095]) +39 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][66] ([i915#10307] / [i915#10434] / [i915#6095]) +4 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-10/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#6095]) +72 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][68] ([i915#3742])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#4087]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-1/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html

  * igt@kms_chamelium_frames@hdmi-crc-single:
    - shard-rkl:          NOTRUN -> [SKIP][70] ([i915#7828]) +2 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-single.html

  * igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#7828]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-dg1:          NOTRUN -> [SKIP][72] ([i915#7828])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#3299])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [TIMEOUT][74] ([i915#7173])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-dg2:          NOTRUN -> [SKIP][75] ([i915#3555]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-dg1:          NOTRUN -> [SKIP][76] ([i915#3555]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][77] ([i915#11453]) +2 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-glk:          [PASS][78] -> [FAIL][79] ([i915#72])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-rkl:          NOTRUN -> [SKIP][80] ([i915#4103])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@torture-move:
    - shard-tglu:         [PASS][81] -> [DMESG-WARN][82] ([i915#10166])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-tglu-5/igt@kms_cursor_legacy@torture-move.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-tglu-5/igt@kms_cursor_legacy@torture-move.html

  * igt@kms_cursor_legacy@torture-move@pipe-a:
    - shard-tglu:         [PASS][83] -> [DMESG-WARN][84] ([i915#10166] / [i915#1982])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-tglu-5/igt@kms_cursor_legacy@torture-move@pipe-a.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-tglu-5/igt@kms_cursor_legacy@torture-move@pipe-a.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          [PASS][85] -> [SKIP][86] ([i915#1257])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_dp_aux_dev.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-1/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-rkl:          NOTRUN -> [SKIP][87] ([i915#3555] / [i915#3840])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-rkl:          NOTRUN -> [SKIP][88] ([i915#3840] / [i915#9053])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][89] +5 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank:
    - shard-snb:          [PASS][90] -> [FAIL][91] ([i915#2122]) +1 other test fail
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-snb5/igt@kms_flip@flip-vs-absolute-wf_vblank.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-snb7/igt@kms_flip@flip-vs-absolute-wf_vblank.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([i915#2672] / [i915#3555]) +1 other test skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#2672]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-snb:          [PASS][94] -> [SKIP][95] +5 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#3023]) +11 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg1:          NOTRUN -> [SKIP][97] ([i915#3458])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen:
    - shard-dg2:          NOTRUN -> [SKIP][98] ([i915#3458]) +3 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][99] ([i915#5354]) +7 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][100] ([i915#1825]) +12 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][101] ([i915#8708]) +4 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][102]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([i915#3555] / [i915#8228]) +1 other test skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_hdr@bpc-switch-dpms.html
    - shard-dg2:          [PASS][104] -> [SKIP][105] ([i915#3555] / [i915#8228])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_hdr@bpc-switch-dpms.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-10/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2:          NOTRUN -> [SKIP][106] ([i915#3555] / [i915#8228])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_hdr@invalid-hdr.html

  * igt@kms_plane@pixel-format-source-clamping:
    - shard-dg2:          [PASS][107] -> [INCOMPLETE][108] ([i915#10056] / [i915#1982])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-6/igt@kms_plane@pixel-format-source-clamping.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_plane@pixel-format-source-clamping.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-dg2:          NOTRUN -> [SKIP][109] ([i915#3555] / [i915#8806])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][110] ([i915#8292])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-4/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][111] ([i915#8292])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-15/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-dg2:          [PASS][112] -> [SKIP][113] ([i915#9340])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-2/igt@kms_pm_lpsp@kms-lpsp.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-dg2:          [PASS][114] -> [SKIP][115] ([i915#9519])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-10/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-1/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [PASS][116] -> [SKIP][117] ([i915#9519]) +2 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-rkl:          NOTRUN -> [SKIP][118] ([i915#11520]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area:
    - shard-dg1:          NOTRUN -> [SKIP][119] ([i915#11520])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#11520])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#9683])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-psr-primary-blt:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([i915#1072] / [i915#9673] / [i915#9732]) +4 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_psr@fbc-psr-primary-blt.html

  * igt@kms_psr@psr-cursor-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][123] ([i915#1072] / [i915#9732])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@kms_psr@psr-cursor-mmap-gtt.html

  * igt@kms_psr@psr2-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][124] ([i915#1072] / [i915#9732]) +9 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_psr@psr2-suspend.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-dg2:          NOTRUN -> [SKIP][125] ([i915#5190])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-rkl:          NOTRUN -> [SKIP][126] ([i915#5289])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-glk:          NOTRUN -> [ABORT][127] ([i915#12231])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-glk8/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1:
    - shard-tglu:         [PASS][128] -> [FAIL][129] ([i915#9196])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-tglu-6/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-tglu-6/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html

  * igt@kms_vrr@flip-basic:
    - shard-rkl:          NOTRUN -> [SKIP][130] ([i915#3555]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@negative-basic:
    - shard-glk:          NOTRUN -> [SKIP][131] +78 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-glk3/igt@kms_vrr@negative-basic.html
    - shard-dg2:          [PASS][132] -> [SKIP][133] ([i915#3555] / [i915#9906])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_vrr@negative-basic.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-1/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-rkl:          NOTRUN -> [SKIP][134] ([i915#9906])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@kms_writeback@writeback-check-output:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#2437])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_writeback@writeback-check-output.html

  * igt@perf@mi-rpc:
    - shard-dg2:          NOTRUN -> [SKIP][136] ([i915#2434])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@perf@mi-rpc.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][137] ([i915#2433])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@perf@unprivileged-single-ctx-counters.html

  * igt@prime_vgem@basic-fence-flip:
    - shard-dg1:          NOTRUN -> [SKIP][138] ([i915#3708])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@prime_vgem@basic-fence-flip.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#9917])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-2/igt@sriov_basic@enable-vfs-bind-unbind-each.html

  * igt@sysfs_heartbeat_interval@precise:
    - shard-snb:          NOTRUN -> [SKIP][140] +83 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-snb5/igt@sysfs_heartbeat_interval@precise.html

  
#### Possible fixes ####

  * igt@gem_ctx_engines@invalid-engines:
    - shard-rkl:          [FAIL][141] ([i915#12027]) -> [PASS][142]
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-3/igt@gem_ctx_engines@invalid-engines.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_ctx_engines@invalid-engines.html

  * igt@gem_exec_fair@basic-pace-share:
    - shard-rkl:          [FAIL][143] ([i915#2842]) -> [PASS][144] +3 other tests pass
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-5/igt@gem_exec_fair@basic-pace-share.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-6/igt@gem_exec_fair@basic-pace-share.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [TIMEOUT][145] ([i915#5493]) -> [PASS][146] +1 other test pass
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg1:          [ABORT][147] ([i915#9820]) -> [PASS][148]
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-18/igt@i915_module_load@reload-with-fault-injection.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-13/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_power@sanity:
    - shard-mtlp:         [SKIP][149] ([i915#7984]) -> [PASS][150]
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-mtlp-1/igt@i915_power@sanity.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-mtlp-3/igt@i915_power@sanity.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [FAIL][151] ([i915#2122]) -> [PASS][152] +5 other tests pass
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-snb7/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-snb2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
    - shard-dg2:          [FAIL][153] ([i915#6880]) -> [PASS][154]
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [SKIP][155] ([i915#9519]) -> [PASS][156] +1 other test pass
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-10/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-5/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-rkl:          [SKIP][157] ([i915#9519]) -> [PASS][158]
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp.html
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-tglu:         [FAIL][159] ([i915#9196]) -> [PASS][160]
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-tglu-6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-tglu-6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  
#### Warnings ####

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-dg1:          [SKIP][161] ([i915#12193]) -> [SKIP][162] ([i915#12193] / [i915#4423])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-17/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-18/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:
    - shard-dg1:          [SKIP][163] ([i915#4565]) -> [SKIP][164] ([i915#4423] / [i915#4565])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-17/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-18/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [ABORT][165] ([i915#10131] / [i915#10887] / [i915#9820]) -> [ABORT][166] ([i915#10887] / [i915#11231])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@mock:
    - shard-dg2:          [DMESG-WARN][167] ([i915#9311]) -> [DMESG-WARN][168] ([i915#1982] / [i915#9311])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-8/igt@i915_selftest@mock.html
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-2/igt@i915_selftest@mock.html

  * igt@kms_content_protection@lic-type-0:
    - shard-dg2:          [SKIP][169] ([i915#9424]) -> [TIMEOUT][170] ([i915#7173])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-6/igt@kms_content_protection@lic-type-0.html
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][171] ([i915#9433]) -> [SKIP][172] ([i915#9424])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg1-13/igt@kms_content_protection@mei-interface.html
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg1-17/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          [TIMEOUT][173] ([i915#7173]) -> [SKIP][174] ([i915#7118])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_content_protection@srm.html
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-5/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-dg2:          [SKIP][175] ([i915#11453]) -> [SKIP][176] ([i915#11453] / [i915#3359])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-2/igt@kms_cursor_crc@cursor-sliding-512x170.html
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-dg2:          [SKIP][177] ([i915#11453] / [i915#3359]) -> [SKIP][178] ([i915#11453])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_cursor_crc@cursor-sliding-512x512.html
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-10/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
    - shard-dg2:          [SKIP][179] ([i915#10433] / [i915#3458]) -> [SKIP][180] ([i915#3458]) +3 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          [SKIP][181] ([i915#4281]) -> [SKIP][182] ([i915#3361])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-rkl-3/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-dg2:          [SKIP][183] ([i915#1072] / [i915#9732]) -> [SKIP][184] ([i915#1072] / [i915#9673] / [i915#9732]) +10 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-2/igt@kms_psr@fbc-pr-primary-page-flip.html
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-11/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_psr@fbc-psr-sprite-blt:
    - shard-dg2:          [SKIP][185] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][186] ([i915#1072] / [i915#9732]) +13 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_psr@fbc-psr-sprite-blt.html
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-10/igt@kms_psr@fbc-psr-sprite-blt.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2:          [SKIP][187] ([i915#11131] / [i915#4235]) -> [SKIP][188] ([i915#11131]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15438/shard-dg2-11/igt@kms_rotation_crc@primary-rotation-270.html
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/shard-dg2-10/igt@kms_rotation_crc@primary-rotation-270.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
  [i915#10166]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10166
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11131
  [i915#11231]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11231
  [i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11965]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11965
  [i915#12027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12027
  [i915#12042]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12042
  [i915#12179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12179
  [i915#12193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12193
  [i915#12216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12216
  [i915#12231]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12231
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6227]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6227
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#72]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/72
  [i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917


Build changes
-------------

  * Linux: CI_DRM_15438 -> Patchwork_138729v2
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_15438: e63d4ffd3e279478c789eaceeb28074d9376142a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8024: 15f8ad0bce184e96d171dfe19c06bdef93e7cf72 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_138729v2: e63d4ffd3e279478c789eaceeb28074d9376142a @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_138729v2/index.html

[-- Attachment #2: Type: text/html, Size: 61650 bytes --]

Re: [PATCH 1/7] drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype

[Govindapillai, Vinod]

On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> intel_sprite_set_colorkey_ioctl() lives in intel_sprice_uapi.{c,h}
> these days. For some reason the old protoype was left behind
> in intel_sprite.h and even used by i915_driver.c. Remove the
> leftovers and switch to including the correct header for the
> prototype.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_sprite.h | 3 ---
>  drivers/gpu/drm/i915/i915_driver.c          | 2 +-
>  2 files changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h
> b/drivers/gpu/drm/i915/display/intel_sprite.h
> index 044a032e41b9..f22abeb82032 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.h
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.h
> @@ -10,7 +10,6 @@
>  
>  struct drm_device;
>  struct drm_display_mode;
Not related to this patch, the above seems to be unused as well.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> -struct drm_file;
>  struct drm_i915_private;
>  struct intel_crtc_state;
>  struct intel_plane_state;
> @@ -19,8 +18,6 @@ enum pipe;
>  #ifdef I915
>  struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>                                               enum pipe pipe, int plane);
> -int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
> -                                   struct drm_file *file_priv);
>  int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
>  int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
>  
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 943e938040c0..b0ec54a4e033 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -59,7 +59,7 @@
>  #include "display/intel_overlay.h"
>  #include "display/intel_pch_refclk.h"
>  #include "display/intel_pps.h"
> -#include "display/intel_sprite.h"
> +#include "display/intel_sprite_uapi.h"
>  #include "display/skl_watermark.h"
>  
>  #include "gem/i915_gem_context.h"

Re: [PATCH 2/7] drm/i915: Combine .compute_{pipe, intermediate}_wm() into one

[Govindapillai, Vinod]

On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We always call .compute_pipe_wm() and .compute_intermediate_wm()
> back to back. Just combine them to a single hook for simplicity.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c        | 57 +++++++++++++++++--
>  drivers/gpu/drm/i915/display/intel_display.c  | 17 +-----
>  .../gpu/drm/i915/display/intel_display_core.h |  6 +-
>  drivers/gpu/drm/i915/display/intel_wm.c       | 24 ++------
>  drivers/gpu/drm/i915/display/intel_wm.h       |  6 +-
>  5 files changed, 63 insertions(+), 47 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 5b21604312fd..3151a31a5653 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -1288,6 +1288,22 @@ static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
>         return 0;
>  }
>  
> +static int g4x_compute_watermarks(struct intel_atomic_state *state,
> +                                 struct intel_crtc *crtc)
> +{
> +       int ret;
> +
> +       ret = g4x_compute_pipe_wm(state, crtc);
> +       if (ret)
> +               return ret;
> +
> +       ret = g4x_compute_intermediate_wm(state, crtc);
> +       if (ret)
> +               return ret;
> +
> +       return 0;
> +}
> +
>  static void g4x_merge_wm(struct drm_i915_private *dev_priv,
>                          struct g4x_wm_values *wm)
>  {
> @@ -1914,6 +1930,22 @@ static int vlv_compute_intermediate_wm(struct intel_atomic_state *state,
>         return 0;
>  }
>  
> +static int vlv_compute_watermarks(struct intel_atomic_state *state,
> +                                 struct intel_crtc *crtc)
> +{
> +       int ret;
> +
> +       ret = vlv_compute_pipe_wm(state, crtc);
> +       if (ret)
> +               return ret;
> +
> +       ret = vlv_compute_intermediate_wm(state, crtc);
> +       if (ret)
> +               return ret;
> +
> +       return 0;
> +}
> +
>  static void vlv_merge_wm(struct drm_i915_private *dev_priv,
>                          struct vlv_wm_values *wm)
>  {
> @@ -2940,6 +2972,22 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
>         return 0;
>  }
>  
> +static int ilk_compute_watermarks(struct intel_atomic_state *state,
> +                                 struct intel_crtc *crtc)
> +{
> +       int ret;
> +
> +       ret = ilk_compute_pipe_wm(state, crtc);
> +       if (ret)
> +               return ret;
> +
> +       ret = ilk_compute_intermediate_wm(state, crtc);
> +       if (ret)
> +               return ret;
> +
> +       return 0;
> +}
> +
>  /*
>   * Merge the watermarks from all active pipes for a specific level.
>   */
> @@ -3986,16 +4034,14 @@ static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv)
>  }
>  
>  static const struct intel_wm_funcs ilk_wm_funcs = {
> -       .compute_pipe_wm = ilk_compute_pipe_wm,
> -       .compute_intermediate_wm = ilk_compute_intermediate_wm,
> +       .compute_watermarks = ilk_compute_watermarks,
>         .initial_watermarks = ilk_initial_watermarks,
>         .optimize_watermarks = ilk_optimize_watermarks,
>         .get_hw_state = ilk_wm_get_hw_state,
>  };
>  
>  static const struct intel_wm_funcs vlv_wm_funcs = {
> -       .compute_pipe_wm = vlv_compute_pipe_wm,
> -       .compute_intermediate_wm = vlv_compute_intermediate_wm,
> +       .compute_watermarks = vlv_compute_watermarks,
>         .initial_watermarks = vlv_initial_watermarks,
>         .optimize_watermarks = vlv_optimize_watermarks,
>         .atomic_update_watermarks = vlv_atomic_update_fifo,
> @@ -4003,8 +4049,7 @@ static const struct intel_wm_funcs vlv_wm_funcs = {
>  };
>  
>  static const struct intel_wm_funcs g4x_wm_funcs = {
> -       .compute_pipe_wm = g4x_compute_pipe_wm,
> -       .compute_intermediate_wm = g4x_compute_intermediate_wm,
> +       .compute_watermarks = g4x_compute_watermarks,
>         .initial_watermarks = g4x_initial_watermarks,
>         .optimize_watermarks = g4x_optimize_watermarks,
>         .get_hw_state = g4x_wm_get_hw_state_and_sanitize,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d4a371edfcdd..60866316fc68 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4292,22 +4292,11 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>         if (ret)
>                 return ret;
>  
> -       ret = intel_compute_pipe_wm(state, crtc);
> +       ret = intel_wm_compute(state, crtc);
>         if (ret) {
>                 drm_dbg_kms(&dev_priv->drm,
> -                           "Target pipe watermarks are invalid\n");
> -               return ret;
> -       }
> -
> -       /*
> -        * Calculate 'intermediate' watermarks that satisfy both the
> -        * old state and the new state.  We can program these
> -        * immediately.
> -        */
> -       ret = intel_compute_intermediate_wm(state, crtc);
> -       if (ret) {
> -               drm_dbg_kms(&dev_priv->drm,
> -                           "No valid intermediate pipe watermarks are possible\n");
> +                           "[CRTC:%d:%s] watermarks are invalid\n",
> +                           crtc->base.base.id, crtc->base.name);
>                 return ret;
>         }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 0a711114ff2b..9ad125d3c0c0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -81,10 +81,8 @@ struct intel_display_funcs {
>  struct intel_wm_funcs {
>         /* update_wm is for legacy wm management */
>         void (*update_wm)(struct drm_i915_private *dev_priv);
> -       int (*compute_pipe_wm)(struct intel_atomic_state *state,
> -                              struct intel_crtc *crtc);
> -       int (*compute_intermediate_wm)(struct intel_atomic_state *state,
> -                                      struct intel_crtc *crtc);
> +       int (*compute_watermarks)(struct intel_atomic_state *state,
> +                                 struct intel_crtc *crtc);
>         void (*initial_watermarks)(struct intel_atomic_state *state,
>                                    struct intel_crtc *crtc);
>         void (*atomic_update_watermarks)(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_wm.c b/drivers/gpu/drm/i915/display/intel_wm.c
> index 462917bc488f..d7dc49aecd27 100644
> --- a/drivers/gpu/drm/i915/display/intel_wm.c
> +++ b/drivers/gpu/drm/i915/display/intel_wm.c
> @@ -50,29 +50,15 @@ void intel_update_watermarks(struct drm_i915_private *i915)
>                 i915->display.funcs.wm->update_wm(i915);
>  }
>  
> -int intel_compute_pipe_wm(struct intel_atomic_state *state,
> -                         struct intel_crtc *crtc)
> +int intel_wm_compute(struct intel_atomic_state *state,
> +                    struct intel_crtc *crtc)
>  {
> -       struct drm_i915_private *i915 = to_i915(state->base.dev);
> +       struct intel_display *display = to_intel_display(state);
>  
> -       if (i915->display.funcs.wm->compute_pipe_wm)
> -               return i915->display.funcs.wm->compute_pipe_wm(state, crtc);
> -
> -       return 0;
> -}
> -
> -int intel_compute_intermediate_wm(struct intel_atomic_state *state,
> -                                 struct intel_crtc *crtc)
> -{
> -       struct drm_i915_private *i915 = to_i915(state->base.dev);
> -
> -       if (!i915->display.funcs.wm->compute_intermediate_wm)
> -               return 0;
> -
> -       if (drm_WARN_ON(&i915->drm, !i915->display.funcs.wm->compute_pipe_wm))
> +       if (!display->funcs.wm->compute_watermarks)
>                 return 0;
>  
> -       return i915->display.funcs.wm->compute_intermediate_wm(state, crtc);
> +       return display->funcs.wm->compute_watermarks(state, crtc);
>  }
>  
>  bool intel_initial_watermarks(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_wm.h b/drivers/gpu/drm/i915/display/intel_wm.h
> index 48429ac140d2..e97cdca89a5c 100644
> --- a/drivers/gpu/drm/i915/display/intel_wm.h
> +++ b/drivers/gpu/drm/i915/display/intel_wm.h
> @@ -15,10 +15,8 @@ struct intel_crtc_state;
>  struct intel_plane_state;
>  
>  void intel_update_watermarks(struct drm_i915_private *i915);
> -int intel_compute_pipe_wm(struct intel_atomic_state *state,
> -                         struct intel_crtc *crtc);
> -int intel_compute_intermediate_wm(struct intel_atomic_state *state,
> -                                 struct intel_crtc *crtc);
> +int intel_wm_compute(struct intel_atomic_state *state,
> +                    struct intel_crtc *crtc);
>  bool intel_initial_watermarks(struct intel_atomic_state *state,
>                               struct intel_crtc *crtc);
>  void intel_atomic_update_watermarks(struct intel_atomic_state *state,

Re: [PATCH 4/7] drm/i915: Clean up intel_wm_need_update()

[Govindapillai, Vinod]

On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> intel_wm_need_update() is a mess when it comes to variable
> names and constness. The checks also keep alternating randomly
> between 'old != cur' vs. 'cur != old'. Clean it all up.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../gpu/drm/i915/display/intel_atomic_plane.c | 20 +++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index b5bbcc773ec0..2aeb4cd5b5a1 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -393,22 +393,22 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
>  }
>  
>  /* FIXME nuke when all wm code is atomic */
> -static bool intel_wm_need_update(const struct intel_plane_state *cur,
> -                                struct intel_plane_state *new)
> +static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> +                                const struct intel_plane_state *new_plane_state)
>  {
>         /* Update watermarks on tiling or size changes. */
> -       if (new->uapi.visible != cur->uapi.visible)
> +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
>                 return true;
>  
> -       if (!cur->hw.fb || !new->hw.fb)
> +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
>                 return false;
>  
> -       if (cur->hw.fb->modifier != new->hw.fb->modifier ||
> -           cur->hw.rotation != new->hw.rotation ||
> -           drm_rect_width(&new->uapi.src) != drm_rect_width(&cur->uapi.src) ||
> -           drm_rect_height(&new->uapi.src) != drm_rect_height(&cur->uapi.src) ||
> -           drm_rect_width(&new->uapi.dst) != drm_rect_width(&cur->uapi.dst) ||
> -           drm_rect_height(&new->uapi.dst) != drm_rect_height(&cur->uapi.dst))
> +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> >uapi.src) ||
> +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> >uapi.src) ||
> +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> >uapi.dst) ||
> +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> >uapi.dst))
>                 return true;
>  
>         return false;

Re: [PATCH 4/7] drm/i915: Clean up intel_wm_need_update()

[Govindapillai, Vinod]

On Sun, 2024-09-22 at 12:54 +0300, Govindapillai, Vinod wrote:
> On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > intel_wm_need_update() is a mess when it comes to variable
> > names and constness. The checks also keep alternating randomly
> > between 'old != cur' vs. 'cur != old'. Clean it all up.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  .../gpu/drm/i915/display/intel_atomic_plane.c | 20 +++++++++----------
> >  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

Just noticed that the next patch in this series nuke this intel_wm_need_update() and move to
i9xx_wm_need_update(). So wonder if we need this patch.

Anyway, already RB-ed.

BR
Vinod

> 
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > index b5bbcc773ec0..2aeb4cd5b5a1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > @@ -393,22 +393,22 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> >  }
> >  
> >  /* FIXME nuke when all wm code is atomic */
> > -static bool intel_wm_need_update(const struct intel_plane_state *cur,
> > -                                struct intel_plane_state *new)
> > +static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> > +                                const struct intel_plane_state *new_plane_state)
> >  {
> >         /* Update watermarks on tiling or size changes. */
> > -       if (new->uapi.visible != cur->uapi.visible)
> > +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> >                 return true;
> >  
> > -       if (!cur->hw.fb || !new->hw.fb)
> > +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> >                 return false;
> >  
> > -       if (cur->hw.fb->modifier != new->hw.fb->modifier ||
> > -           cur->hw.rotation != new->hw.rotation ||
> > -           drm_rect_width(&new->uapi.src) != drm_rect_width(&cur->uapi.src) ||
> > -           drm_rect_height(&new->uapi.src) != drm_rect_height(&cur->uapi.src) ||
> > -           drm_rect_width(&new->uapi.dst) != drm_rect_width(&cur->uapi.dst) ||
> > -           drm_rect_height(&new->uapi.dst) != drm_rect_height(&cur->uapi.dst))
> > +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > > uapi.src) ||
> > +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > > uapi.src) ||
> > +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > > uapi.dst) ||
> > +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > > uapi.dst))
> >                 return true;
> >  
> >         return false;
> 

Re: [PATCH 5/7] drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm

[Govindapillai, Vinod]

On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> As with other watermark calculations, the dodgy pre-g4x
> update_wm_{pre,post} flag calcultion would like to know
Typo: calculation
> if a modeset is about to happen or not, and technically
> later stages in the atomic_check() may still flag one.
> In practice that shouldn't happen as we don't have dynamic
> CDCLK implemented for these old platforms.
> 
> Regardless it'll be nice to move this old cruft out from
> the supposedly platform agnostic plane code.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c        | 74 +++++++++++++++++++
>  .../gpu/drm/i915/display/intel_atomic_plane.c | 36 ---------
>  2 files changed, 74 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 3151a31a5653..15ed3b810947 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -705,6 +705,76 @@ static void pnv_update_wm(struct drm_i915_private *dev_priv)
>         }
>  }
>  
> +static bool i9xx_wm_need_update(const struct intel_plane_state *old_plane_state,
> +                               const struct intel_plane_state *new_plane_state)
> +{
> +       /* Update watermarks on tiling or size changes. */
> +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> +               return true;
> +
> +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> +               return false;
> +
> +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> >uapi.src) ||
> +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> >uapi.src) ||
> +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> >uapi.dst) ||
> +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> >uapi.dst))
> +               return true;
> +
> +       return false;
> +}
> +
> +static void i9xx_wm_compute(struct intel_crtc_state *new_crtc_state,
> +                           const struct intel_plane_state *old_plane_state,
> +                           const struct intel_plane_state *new_plane_state)
> +{
> +       bool turn_off, turn_on, visible, was_visible, mode_changed;
> +
> +       mode_changed = intel_crtc_needs_modeset(new_crtc_state);
> +       was_visible = old_plane_state->uapi.visible;
> +       visible = new_plane_state->uapi.visible;
> +
> +       if (!was_visible && !visible)
> +               return;
> +
> +       turn_off = was_visible && (!visible || mode_changed);
> +       turn_on = visible && (!was_visible || mode_changed);
> +
> +       /* FIXME nuke when all wm code is atomic */
> +       if (turn_on) {
> +               new_crtc_state->update_wm_pre = true;
> +       } else if (turn_off) {
> +               new_crtc_state->update_wm_post = true;
> +       } else if (i9xx_wm_need_update(old_plane_state, new_plane_state)) {
> +               /* FIXME bollocks */
> +               new_crtc_state->update_wm_pre = true;
> +               new_crtc_state->update_wm_post = true;
> +       }
> +}
> +
> +static int i9xx_compute_watermarks(struct intel_atomic_state *state,
> +                                  struct intel_crtc *crtc)
> +{
> +       struct intel_crtc_state *new_crtc_state =
> +               intel_atomic_get_new_crtc_state(state, crtc);
> +       const struct intel_plane_state *old_plane_state;
> +       const struct intel_plane_state *new_plane_state;
> +       struct intel_plane *plane;
> +       int i;
> +
> +       for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
> +                                            new_plane_state, i) {
> +               if (plane->pipe != crtc->pipe)
> +                       continue;
> +
> +               i9xx_wm_compute(new_crtc_state, old_plane_state, new_plane_state);
> +       }
> +
> +       return 0;
> +}
> +
>  /*
>   * Documentation says:
>   * "If the line size is small, the TLB fetches can get in the way of the
> @@ -4056,18 +4126,22 @@ static const struct intel_wm_funcs g4x_wm_funcs = {
>  };
>  
>  static const struct intel_wm_funcs pnv_wm_funcs = {
> +       .compute_watermarks = i9xx_compute_watermarks,
>         .update_wm = pnv_update_wm,
>  };
>  
>  static const struct intel_wm_funcs i965_wm_funcs = {
> +       .compute_watermarks = i9xx_compute_watermarks,
>         .update_wm = i965_update_wm,
>  };
>  
>  static const struct intel_wm_funcs i9xx_wm_funcs = {
> +       .compute_watermarks = i9xx_compute_watermarks,
>         .update_wm = i9xx_update_wm,
>  };
>  
>  static const struct intel_wm_funcs i845_wm_funcs = {
> +       .compute_watermarks = i9xx_compute_watermarks,
>         .update_wm = i845_update_wm,
>  };
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 2aeb4cd5b5a1..33fec36ec0bd 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -392,28 +392,6 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
>         plane_state->uapi.visible = false;
>  }
>  
> -/* FIXME nuke when all wm code is atomic */
> -static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> -                                const struct intel_plane_state *new_plane_state)
> -{
> -       /* Update watermarks on tiling or size changes. */
> -       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> -               return true;
> -
> -       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> -               return false;
> -
> -       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> -           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> -           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> >uapi.src) ||
> -           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> >uapi.src) ||
> -           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> >uapi.dst) ||
> -           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> >uapi.dst))
> -               return true;
> -
> -       return false;
> -}
> -
>  static bool intel_plane_is_scaled(const struct intel_plane_state *plane_state)
>  {
>         int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> @@ -602,20 +580,6 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state
> *old_cr
>                        was_visible, visible,
>                        turn_off, turn_on, mode_changed);
>  
> -       if (turn_on) {
> -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> -                       new_crtc_state->update_wm_pre = true;
> -       } else if (turn_off) {
> -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> -                       new_crtc_state->update_wm_post = true;
> -       } else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
> -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
> -                       /* FIXME bollocks */
> -                       new_crtc_state->update_wm_pre = true;
> -                       new_crtc_state->update_wm_post = true;
> -               }
> -       }
> -

With this change, update_wm_pre/post flag will move from intel_atomic_check_planes() to
intel_atomic_check_crtcs() which will call compute_watermarks() and update the flag. Just wanted to
clarify if this is expected.

BR
Vinod


>         if (visible || was_visible)
>                 new_crtc_state->fb_bits |= plane->frontbuffer_bit;
>  

Re: [PATCH 6/7] drm/i915: s/disable_lp_wm/disable_cxsr/

[Govindapillai, Vinod]

On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The ilk+ disable_lp_wm boolean has the exact same role as
> disable_cxsr for gmch platforms. The documentation also
> still talks about CxSR on ilk+ even theough the way you
> control it has now change to involve toggling the LP watermarks.
> Get rid of disable_lp_wm and just use disable_cxsr for ilk+
> as well.
> 
> TODO: Unify even more to not have any gmch vs. ilk+
>       details in high level modeset code...
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c             |  2 +-
>  drivers/gpu/drm/i915/display/i9xx_wm.h             |  4 ++--
>  drivers/gpu/drm/i915/display/intel_atomic.c        |  1 -
>  drivers/gpu/drm/i915/display/intel_atomic_plane.c  | 10 +++++-----
>  drivers/gpu/drm/i915/display/intel_display.c       |  4 ++--
>  drivers/gpu/drm/i915/display/intel_display_types.h |  3 ---
>  6 files changed, 10 insertions(+), 14 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 15ed3b810947..cfc487563c25 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -3396,7 +3396,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
>         dev_priv->display.wm.hw = *results;
>  }
>  
> -bool ilk_disable_lp_wm(struct drm_i915_private *dev_priv)
> +bool ilk_disable_cxsr(struct drm_i915_private *dev_priv)
>  {
>         return _ilk_disable_lp_wm(dev_priv, WM_DIRTY_LP_ALL);
>  }
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.h b/drivers/gpu/drm/i915/display/i9xx_wm.h
> index de0920730ab2..06ac37c6c94b 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.h
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.h
> @@ -13,12 +13,12 @@ struct intel_crtc_state;
>  struct intel_plane_state;
>  
>  #ifdef I915
> -bool ilk_disable_lp_wm(struct drm_i915_private *i915);
> +bool ilk_disable_cxsr(struct drm_i915_private *i915);
>  void ilk_wm_sanitize(struct drm_i915_private *i915);
>  bool intel_set_memory_cxsr(struct drm_i915_private *i915, bool enable);
>  void i9xx_wm_init(struct drm_i915_private *i915);
>  #else
> -static inline bool ilk_disable_lp_wm(struct drm_i915_private *i915)
> +static inline bool ilk_disable_cxsr(struct drm_i915_private *i915)
>  {
>         return false;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
> b/drivers/gpu/drm/i915/display/intel_atomic.c
> index 12d6ed940751..6cac26af128c 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> @@ -266,7 +266,6 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>         crtc_state->update_pipe = false;
>         crtc_state->update_m_n = false;
>         crtc_state->update_lrr = false;
> -       crtc_state->disable_lp_wm = false;
>         crtc_state->disable_cxsr = false;
>         crtc_state->update_wm_pre = false;
>         crtc_state->update_wm_post = false;
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 33fec36ec0bd..ef6cffd50275 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -471,9 +471,9 @@ static bool i9xx_must_disable_cxsr(const struct intel_crtc_state
> *new_crtc_state
>         return old_ctl != new_ctl;
>  }
>  
> -static bool ilk_must_disable_lp_wm(const struct intel_crtc_state *new_crtc_state,
> -                                  const struct intel_plane_state *old_plane_state,
> -                                  const struct intel_plane_state *new_plane_state)
> +static bool ilk_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state,
> +                                 const struct intel_plane_state *old_plane_state,
> +                                 const struct intel_plane_state *new_plane_state)
>  {
>         struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
>         bool old_visible = old_plane_state->uapi.visible;
> @@ -588,8 +588,8 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state
> *old_cr
>                 new_crtc_state->disable_cxsr = true;
>  
>         if ((IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) &&
> -           ilk_must_disable_lp_wm(new_crtc_state, old_plane_state, new_plane_state))
> -               new_crtc_state->disable_lp_wm = true;
> +           ilk_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
> +               new_crtc_state->disable_cxsr = true;
>  
>         if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) {
>                 new_crtc_state->do_async_flip = true;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 60866316fc68..a2257096bd29 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1250,8 +1250,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
>          *
>          * WaCxSRDisabledForSpriteScaling:ivb
>          */
> -       if (old_crtc_state->hw.active &&
> -           new_crtc_state->disable_lp_wm && ilk_disable_lp_wm(dev_priv))
> +       if (!HAS_GMCH(dev_priv) && old_crtc_state->hw.active &&
> +           new_crtc_state->disable_cxsr && ilk_disable_cxsr(dev_priv))
>                 intel_crtc_wait_for_next_vblank(crtc);
>  
>         /*
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 000ab373c887..e4c8fb55a92f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1143,9 +1143,6 @@ struct intel_crtc_state {
>         /* w/a for waiting 2 vblanks during crtc enable */
>         enum pipe hsw_workaround_pipe;
>  
> -       /* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
> -       bool disable_lp_wm;
> -
>         struct intel_crtc_wm_state wm;
>  
>         int min_cdclk[I915_MAX_PLANES];

Re: [PATCH 7/7] drm/i915: Rename variables in ilk_intermedidate_wm()

[Govindapillai, Vinod]

On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> ilk_compute_intermediate_wm() uses rather poor variable names
> for its watermark structs. Borrow a better naming convention
> from the g4x/vlv counterpart code.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c | 35 +++++++++++++++-----------
>  1 file changed, 20 insertions(+), 15 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index cfc487563c25..fc928307d062 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -2993,8 +2993,9 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
>                 intel_atomic_get_new_crtc_state(state, crtc);
>         const struct intel_crtc_state *old_crtc_state =
>                 intel_atomic_get_old_crtc_state(state, crtc);
> -       struct intel_pipe_wm *a = &new_crtc_state->wm.ilk.intermediate;
> -       const struct intel_pipe_wm *b = &old_crtc_state->wm.ilk.optimal;
> +       struct intel_pipe_wm *intermediate = &new_crtc_state->wm.ilk.intermediate;
> +       const struct intel_pipe_wm *optimal = &new_crtc_state->wm.ilk.optimal;
> +       const struct intel_pipe_wm *active = &old_crtc_state->wm.ilk.optimal;
>         int level;
>  
>         /*
> @@ -3002,25 +3003,29 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
>          * currently active watermarks to get values that are safe both before
>          * and after the vblank.
>          */
> -       *a = new_crtc_state->wm.ilk.optimal;
> +       *intermediate = *optimal;
>         if (!new_crtc_state->hw.active ||
>             intel_crtc_needs_modeset(new_crtc_state) ||
>             state->skip_intermediate_wm)
>                 return 0;
>  
> -       a->pipe_enabled |= b->pipe_enabled;
> -       a->sprites_enabled |= b->sprites_enabled;
> -       a->sprites_scaled |= b->sprites_scaled;
> +       intermediate->pipe_enabled |= active->pipe_enabled;
> +       intermediate->sprites_enabled |= active->sprites_enabled;
> +       intermediate->sprites_scaled |= active->sprites_scaled;
>  
>         for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
> -               struct intel_wm_level *a_wm = &a->wm[level];
> -               const struct intel_wm_level *b_wm = &b->wm[level];
> +               struct intel_wm_level *intermediate_wm = &intermediate->wm[level];
> +               const struct intel_wm_level *active_wm = &active->wm[level];
>  
> -               a_wm->enable &= b_wm->enable;
> -               a_wm->pri_val = max(a_wm->pri_val, b_wm->pri_val);
> -               a_wm->spr_val = max(a_wm->spr_val, b_wm->spr_val);
> -               a_wm->cur_val = max(a_wm->cur_val, b_wm->cur_val);
> -               a_wm->fbc_val = max(a_wm->fbc_val, b_wm->fbc_val);
> +               intermediate_wm->enable &= active_wm->enable;
> +               intermediate_wm->pri_val = max(intermediate_wm->pri_val,
> +                                              active_wm->pri_val);
> +               intermediate_wm->spr_val = max(intermediate_wm->spr_val,
> +                                              active_wm->spr_val);
> +               intermediate_wm->cur_val = max(intermediate_wm->cur_val,
> +                                              active_wm->cur_val);
> +               intermediate_wm->fbc_val = max(intermediate_wm->fbc_val,
> +                                              active_wm->fbc_val);
>         }
>  
>         /*
> @@ -3029,14 +3034,14 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
>          * there's no safe way to transition from the old state to
>          * the new state, so we need to fail the atomic transaction.
>          */
> -       if (!ilk_validate_pipe_wm(dev_priv, a))
> +       if (!ilk_validate_pipe_wm(dev_priv, intermediate))
>                 return -EINVAL;
>  
>         /*
>          * If our intermediate WM are identical to the final WM, then we can
>          * omit the post-vblank programming; only update if it's different.
>          */
> -       if (memcmp(a, &new_crtc_state->wm.ilk.optimal, sizeof(*a)) != 0)
> +       if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0)
>                 new_crtc_state->wm.need_postvbl_update = true;
>  
>         return 0;

Re: [PATCH 4/7] drm/i915: Clean up intel_wm_need_update()

[Ville Syrjälä]

On Sun, Sep 22, 2024 at 10:34:07AM +0000, Govindapillai, Vinod wrote:
> On Sun, 2024-09-22 at 12:54 +0300, Govindapillai, Vinod wrote:
> > On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > intel_wm_need_update() is a mess when it comes to variable
> > > names and constness. The checks also keep alternating randomly
> > > between 'old != cur' vs. 'cur != old'. Clean it all up.
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  .../gpu/drm/i915/display/intel_atomic_plane.c | 20 +++++++++----------
> > >  1 file changed, 10 insertions(+), 10 deletions(-)
> > 
> > Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> 
> Just noticed that the next patch in this series nuke this intel_wm_need_update() and move to
> i9xx_wm_need_update().

That's just a rename. Nothing to do with the internals of the function.

> So wonder if we need this patch.
> 
> Anyway, already RB-ed.
> 
> BR
> Vinod
> 
> > 
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > index b5bbcc773ec0..2aeb4cd5b5a1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > @@ -393,22 +393,22 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> > >  }
> > >  
> > >  /* FIXME nuke when all wm code is atomic */
> > > -static bool intel_wm_need_update(const struct intel_plane_state *cur,
> > > -                                struct intel_plane_state *new)
> > > +static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> > > +                                const struct intel_plane_state *new_plane_state)
> > >  {
> > >         /* Update watermarks on tiling or size changes. */
> > > -       if (new->uapi.visible != cur->uapi.visible)
> > > +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > >                 return true;
> > >  
> > > -       if (!cur->hw.fb || !new->hw.fb)
> > > +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > >                 return false;
> > >  
> > > -       if (cur->hw.fb->modifier != new->hw.fb->modifier ||
> > > -           cur->hw.rotation != new->hw.rotation ||
> > > -           drm_rect_width(&new->uapi.src) != drm_rect_width(&cur->uapi.src) ||
> > > -           drm_rect_height(&new->uapi.src) != drm_rect_height(&cur->uapi.src) ||
> > > -           drm_rect_width(&new->uapi.dst) != drm_rect_width(&cur->uapi.dst) ||
> > > -           drm_rect_height(&new->uapi.dst) != drm_rect_height(&cur->uapi.dst))
> > > +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > > +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > > +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > > > uapi.src) ||
> > > +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > > > uapi.src) ||
> > > +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > > > uapi.dst) ||
> > > +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > > > uapi.dst))
> > >                 return true;
> > >  
> > >         return false;
> > 
> 

-- 
Ville Syrjälä
Intel

Re: [PATCH 5/7] drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm

[Ville Syrjälä]

On Sun, Sep 22, 2024 at 10:40:32AM +0000, Govindapillai, Vinod wrote:
> On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > As with other watermark calculations, the dodgy pre-g4x
> > update_wm_{pre,post} flag calcultion would like to know
> Typo: calculation
> > if a modeset is about to happen or not, and technically
> > later stages in the atomic_check() may still flag one.
> > In practice that shouldn't happen as we don't have dynamic
> > CDCLK implemented for these old platforms.
> > 
> > Regardless it'll be nice to move this old cruft out from
> > the supposedly platform agnostic plane code.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/display/i9xx_wm.c        | 74 +++++++++++++++++++
> >  .../gpu/drm/i915/display/intel_atomic_plane.c | 36 ---------
> >  2 files changed, 74 insertions(+), 36 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > index 3151a31a5653..15ed3b810947 100644
> > --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> > +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > @@ -705,6 +705,76 @@ static void pnv_update_wm(struct drm_i915_private *dev_priv)
> >         }
> >  }
> >  
> > +static bool i9xx_wm_need_update(const struct intel_plane_state *old_plane_state,
> > +                               const struct intel_plane_state *new_plane_state)
> > +{
> > +       /* Update watermarks on tiling or size changes. */
> > +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > +               return true;
> > +
> > +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > +               return false;
> > +
> > +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > >uapi.src) ||
> > +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > >uapi.src) ||
> > +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > >uapi.dst) ||
> > +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > >uapi.dst))
> > +               return true;
> > +
> > +       return false;
> > +}
> > +
> > +static void i9xx_wm_compute(struct intel_crtc_state *new_crtc_state,
> > +                           const struct intel_plane_state *old_plane_state,
> > +                           const struct intel_plane_state *new_plane_state)
> > +{
> > +       bool turn_off, turn_on, visible, was_visible, mode_changed;
> > +
> > +       mode_changed = intel_crtc_needs_modeset(new_crtc_state);
> > +       was_visible = old_plane_state->uapi.visible;
> > +       visible = new_plane_state->uapi.visible;
> > +
> > +       if (!was_visible && !visible)
> > +               return;
> > +
> > +       turn_off = was_visible && (!visible || mode_changed);
> > +       turn_on = visible && (!was_visible || mode_changed);
> > +
> > +       /* FIXME nuke when all wm code is atomic */
> > +       if (turn_on) {
> > +               new_crtc_state->update_wm_pre = true;
> > +       } else if (turn_off) {
> > +               new_crtc_state->update_wm_post = true;
> > +       } else if (i9xx_wm_need_update(old_plane_state, new_plane_state)) {
> > +               /* FIXME bollocks */
> > +               new_crtc_state->update_wm_pre = true;
> > +               new_crtc_state->update_wm_post = true;
> > +       }
> > +}
> > +
> > +static int i9xx_compute_watermarks(struct intel_atomic_state *state,
> > +                                  struct intel_crtc *crtc)
> > +{
> > +       struct intel_crtc_state *new_crtc_state =
> > +               intel_atomic_get_new_crtc_state(state, crtc);
> > +       const struct intel_plane_state *old_plane_state;
> > +       const struct intel_plane_state *new_plane_state;
> > +       struct intel_plane *plane;
> > +       int i;
> > +
> > +       for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
> > +                                            new_plane_state, i) {
> > +               if (plane->pipe != crtc->pipe)
> > +                       continue;
> > +
> > +               i9xx_wm_compute(new_crtc_state, old_plane_state, new_plane_state);
> > +       }
> > +
> > +       return 0;
> > +}
> > +
> >  /*
> >   * Documentation says:
> >   * "If the line size is small, the TLB fetches can get in the way of the
> > @@ -4056,18 +4126,22 @@ static const struct intel_wm_funcs g4x_wm_funcs = {
> >  };
> >  
> >  static const struct intel_wm_funcs pnv_wm_funcs = {
> > +       .compute_watermarks = i9xx_compute_watermarks,
> >         .update_wm = pnv_update_wm,
> >  };
> >  
> >  static const struct intel_wm_funcs i965_wm_funcs = {
> > +       .compute_watermarks = i9xx_compute_watermarks,
> >         .update_wm = i965_update_wm,
> >  };
> >  
> >  static const struct intel_wm_funcs i9xx_wm_funcs = {
> > +       .compute_watermarks = i9xx_compute_watermarks,
> >         .update_wm = i9xx_update_wm,
> >  };
> >  
> >  static const struct intel_wm_funcs i845_wm_funcs = {
> > +       .compute_watermarks = i9xx_compute_watermarks,
> >         .update_wm = i845_update_wm,
> >  };
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > index 2aeb4cd5b5a1..33fec36ec0bd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > @@ -392,28 +392,6 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> >         plane_state->uapi.visible = false;
> >  }
> >  
> > -/* FIXME nuke when all wm code is atomic */
> > -static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> > -                                const struct intel_plane_state *new_plane_state)
> > -{
> > -       /* Update watermarks on tiling or size changes. */
> > -       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > -               return true;
> > -
> > -       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > -               return false;
> > -
> > -       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > -           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > -           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > >uapi.src) ||
> > -           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > >uapi.src) ||
> > -           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > >uapi.dst) ||
> > -           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > >uapi.dst))
> > -               return true;
> > -
> > -       return false;
> > -}
> > -
> >  static bool intel_plane_is_scaled(const struct intel_plane_state *plane_state)
> >  {
> >         int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > @@ -602,20 +580,6 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state
> > *old_cr
> >                        was_visible, visible,
> >                        turn_off, turn_on, mode_changed);
> >  
> > -       if (turn_on) {
> > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> > -                       new_crtc_state->update_wm_pre = true;
> > -       } else if (turn_off) {
> > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> > -                       new_crtc_state->update_wm_post = true;
> > -       } else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
> > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
> > -                       /* FIXME bollocks */
> > -                       new_crtc_state->update_wm_pre = true;
> > -                       new_crtc_state->update_wm_post = true;
> > -               }
> > -       }
> > -
> 
> With this change, update_wm_pre/post flag will move from intel_atomic_check_planes() to
> intel_atomic_check_crtcs() which will call compute_watermarks() and update the flag. Just wanted to
> clarify if this is expected.

That is the whole point of the patch.

-- 
Ville Syrjälä
Intel

Re: [PATCH 1/7] drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype

[Ville Syrjälä]

On Sun, Sep 22, 2024 at 09:31:10AM +0000, Govindapillai, Vinod wrote:
> On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > intel_sprite_set_colorkey_ioctl() lives in intel_sprice_uapi.{c,h}
> > these days. For some reason the old protoype was left behind
> > in intel_sprite.h and even used by i915_driver.c. Remove the
> > leftovers and switch to including the correct header for the
> > prototype.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_sprite.h | 3 ---
> >  drivers/gpu/drm/i915/i915_driver.c          | 2 +-
> >  2 files changed, 1 insertion(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h
> > b/drivers/gpu/drm/i915/display/intel_sprite.h
> > index 044a032e41b9..f22abeb82032 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sprite.h
> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.h
> > @@ -10,7 +10,6 @@
> >  
> >  struct drm_device;
> >  struct drm_display_mode;
> Not related to this patch, the above seems to be unused as well.

drm_device I should have removed in this patch it seems.
The other one is some older leftover.

I'll see if I can remember to remedy that when applying
the patch...

> 
> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

Ta.


> 
> > -struct drm_file;
> >  struct drm_i915_private;
> >  struct intel_crtc_state;
> >  struct intel_plane_state;
> > @@ -19,8 +18,6 @@ enum pipe;
> >  #ifdef I915
> >  struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
> >                                               enum pipe pipe, int plane);
> > -int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
> > -                                   struct drm_file *file_priv);
> >  int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
> >  int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
> >  
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> > index 943e938040c0..b0ec54a4e033 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -59,7 +59,7 @@
> >  #include "display/intel_overlay.h"
> >  #include "display/intel_pch_refclk.h"
> >  #include "display/intel_pps.h"
> > -#include "display/intel_sprite.h"
> > +#include "display/intel_sprite_uapi.h"
> >  #include "display/skl_watermark.h"
> >  
> >  #include "gem/i915_gem_context.h"
> 

-- 
Ville Syrjälä
Intel

Re: [PATCH 5/7] drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm

[Ville Syrjälä]

On Mon, Sep 23, 2024 at 08:35:06PM +0300, Ville Syrjälä wrote:
> On Sun, Sep 22, 2024 at 10:40:32AM +0000, Govindapillai, Vinod wrote:
> > On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > As with other watermark calculations, the dodgy pre-g4x
> > > update_wm_{pre,post} flag calcultion would like to know
> > Typo: calculation
> > > if a modeset is about to happen or not, and technically
> > > later stages in the atomic_check() may still flag one.
> > > In practice that shouldn't happen as we don't have dynamic
> > > CDCLK implemented for these old platforms.
> > > 
> > > Regardless it'll be nice to move this old cruft out from
> > > the supposedly platform agnostic plane code.
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > > ---
> > >  drivers/gpu/drm/i915/display/i9xx_wm.c        | 74 +++++++++++++++++++
> > >  .../gpu/drm/i915/display/intel_atomic_plane.c | 36 ---------
> > >  2 files changed, 74 insertions(+), 36 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > > index 3151a31a5653..15ed3b810947 100644
> > > --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> > > +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > > @@ -705,6 +705,76 @@ static void pnv_update_wm(struct drm_i915_private *dev_priv)
> > >         }
> > >  }
> > >  
> > > +static bool i9xx_wm_need_update(const struct intel_plane_state *old_plane_state,
> > > +                               const struct intel_plane_state *new_plane_state)
> > > +{
> > > +       /* Update watermarks on tiling or size changes. */
> > > +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > > +               return true;
> > > +
> > > +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > > +               return false;
> > > +
> > > +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > > +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > > +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > > >uapi.src) ||
> > > +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > > >uapi.src) ||
> > > +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > > >uapi.dst) ||
> > > +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > > >uapi.dst))
> > > +               return true;
> > > +
> > > +       return false;
> > > +}
> > > +
> > > +static void i9xx_wm_compute(struct intel_crtc_state *new_crtc_state,
> > > +                           const struct intel_plane_state *old_plane_state,
> > > +                           const struct intel_plane_state *new_plane_state)
> > > +{
> > > +       bool turn_off, turn_on, visible, was_visible, mode_changed;
> > > +
> > > +       mode_changed = intel_crtc_needs_modeset(new_crtc_state);
> > > +       was_visible = old_plane_state->uapi.visible;
> > > +       visible = new_plane_state->uapi.visible;
> > > +
> > > +       if (!was_visible && !visible)
> > > +               return;
> > > +
> > > +       turn_off = was_visible && (!visible || mode_changed);
> > > +       turn_on = visible && (!was_visible || mode_changed);
> > > +
> > > +       /* FIXME nuke when all wm code is atomic */
> > > +       if (turn_on) {
> > > +               new_crtc_state->update_wm_pre = true;
> > > +       } else if (turn_off) {
> > > +               new_crtc_state->update_wm_post = true;
> > > +       } else if (i9xx_wm_need_update(old_plane_state, new_plane_state)) {
> > > +               /* FIXME bollocks */
> > > +               new_crtc_state->update_wm_pre = true;
> > > +               new_crtc_state->update_wm_post = true;
> > > +       }
> > > +}
> > > +
> > > +static int i9xx_compute_watermarks(struct intel_atomic_state *state,
> > > +                                  struct intel_crtc *crtc)
> > > +{
> > > +       struct intel_crtc_state *new_crtc_state =
> > > +               intel_atomic_get_new_crtc_state(state, crtc);
> > > +       const struct intel_plane_state *old_plane_state;
> > > +       const struct intel_plane_state *new_plane_state;
> > > +       struct intel_plane *plane;
> > > +       int i;
> > > +
> > > +       for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
> > > +                                            new_plane_state, i) {
> > > +               if (plane->pipe != crtc->pipe)
> > > +                       continue;
> > > +
> > > +               i9xx_wm_compute(new_crtc_state, old_plane_state, new_plane_state);
> > > +       }
> > > +
> > > +       return 0;
> > > +}
> > > +
> > >  /*
> > >   * Documentation says:
> > >   * "If the line size is small, the TLB fetches can get in the way of the
> > > @@ -4056,18 +4126,22 @@ static const struct intel_wm_funcs g4x_wm_funcs = {
> > >  };
> > >  
> > >  static const struct intel_wm_funcs pnv_wm_funcs = {
> > > +       .compute_watermarks = i9xx_compute_watermarks,
> > >         .update_wm = pnv_update_wm,
> > >  };
> > >  
> > >  static const struct intel_wm_funcs i965_wm_funcs = {
> > > +       .compute_watermarks = i9xx_compute_watermarks,
> > >         .update_wm = i965_update_wm,
> > >  };
> > >  
> > >  static const struct intel_wm_funcs i9xx_wm_funcs = {
> > > +       .compute_watermarks = i9xx_compute_watermarks,
> > >         .update_wm = i9xx_update_wm,
> > >  };
> > >  
> > >  static const struct intel_wm_funcs i845_wm_funcs = {
> > > +       .compute_watermarks = i9xx_compute_watermarks,
> > >         .update_wm = i845_update_wm,
> > >  };
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > index 2aeb4cd5b5a1..33fec36ec0bd 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > @@ -392,28 +392,6 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> > >         plane_state->uapi.visible = false;
> > >  }
> > >  
> > > -/* FIXME nuke when all wm code is atomic */
> > > -static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> > > -                                const struct intel_plane_state *new_plane_state)
> > > -{
> > > -       /* Update watermarks on tiling or size changes. */
> > > -       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > > -               return true;
> > > -
> > > -       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > > -               return false;
> > > -
> > > -       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > > -           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > > -           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > > >uapi.src) ||
> > > -           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > > >uapi.src) ||
> > > -           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > > >uapi.dst) ||
> > > -           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > > >uapi.dst))
> > > -               return true;
> > > -
> > > -       return false;
> > > -}
> > > -
> > >  static bool intel_plane_is_scaled(const struct intel_plane_state *plane_state)
> > >  {
> > >         int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > > @@ -602,20 +580,6 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state
> > > *old_cr
> > >                        was_visible, visible,
> > >                        turn_off, turn_on, mode_changed);
> > >  
> > > -       if (turn_on) {
> > > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> > > -                       new_crtc_state->update_wm_pre = true;
> > > -       } else if (turn_off) {
> > > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> > > -                       new_crtc_state->update_wm_post = true;
> > > -       } else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
> > > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
> > > -                       /* FIXME bollocks */
> > > -                       new_crtc_state->update_wm_pre = true;
> > > -                       new_crtc_state->update_wm_post = true;
> > > -               }
> > > -       }
> > > -
> > 
> > With this change, update_wm_pre/post flag will move from intel_atomic_check_planes() to
> > intel_atomic_check_crtcs() which will call compute_watermarks() and update the flag. Just wanted to
> > clarify if this is expected.
> 
> That is the whole point of the patch.

Well, I suppose not quite the whole point, but most of it.
The other purpose was just to get this stuff out from the
platform agnostic code.

-- 
Ville Syrjälä
Intel

Re: [PATCH 5/7] drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm

[Govindapillai, Vinod]

On Tue, 2024-09-24 at 00:59 +0300, Ville Syrjälä wrote:
> On Mon, Sep 23, 2024 at 08:35:06PM +0300, Ville Syrjälä wrote:
> > On Sun, Sep 22, 2024 at 10:40:32AM +0000, Govindapillai, Vinod wrote:
> > > On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > 
> > > > As with other watermark calculations, the dodgy pre-g4x
> > > > update_wm_{pre,post} flag calcultion would like to know
> > > Typo: calculation
> > > > if a modeset is about to happen or not, and technically
> > > > later stages in the atomic_check() may still flag one.
> > > > In practice that shouldn't happen as we don't have dynamic
> > > > CDCLK implemented for these old platforms.
> > > > 
> > > > Regardless it'll be nice to move this old cruft out from
> > > > the supposedly platform agnostic plane code.
> > > > 
> > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > > ---
> > > >  drivers/gpu/drm/i915/display/i9xx_wm.c        | 74 +++++++++++++++++++
> > > >  .../gpu/drm/i915/display/intel_atomic_plane.c | 36 ---------
> > > >  2 files changed, 74 insertions(+), 36 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > > > index 3151a31a5653..15ed3b810947 100644
> > > > --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> > > > +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > > > @@ -705,6 +705,76 @@ static void pnv_update_wm(struct drm_i915_private *dev_priv)
> > > >         }
> > > >  }
> > > >  
> > > > +static bool i9xx_wm_need_update(const struct intel_plane_state *old_plane_state,
> > > > +                               const struct intel_plane_state *new_plane_state)
> > > > +{
> > > > +       /* Update watermarks on tiling or size changes. */
> > > > +       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > > > +               return true;
> > > > +
> > > > +       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > > > +               return false;
> > > > +
> > > > +       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > > > +           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > > > +           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > > > > uapi.src) ||
> > > > +           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > > > > uapi.src) ||
> > > > +           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > > > > uapi.dst) ||
> > > > +           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > > > > uapi.dst))
> > > > +               return true;
> > > > +
> > > > +       return false;
> > > > +}
> > > > +
> > > > +static void i9xx_wm_compute(struct intel_crtc_state *new_crtc_state,
> > > > +                           const struct intel_plane_state *old_plane_state,
> > > > +                           const struct intel_plane_state *new_plane_state)
> > > > +{
> > > > +       bool turn_off, turn_on, visible, was_visible, mode_changed;
> > > > +
> > > > +       mode_changed = intel_crtc_needs_modeset(new_crtc_state);
> > > > +       was_visible = old_plane_state->uapi.visible;
> > > > +       visible = new_plane_state->uapi.visible;
> > > > +
> > > > +       if (!was_visible && !visible)
> > > > +               return;
> > > > +
> > > > +       turn_off = was_visible && (!visible || mode_changed);
> > > > +       turn_on = visible && (!was_visible || mode_changed);
> > > > +
> > > > +       /* FIXME nuke when all wm code is atomic */
> > > > +       if (turn_on) {
> > > > +               new_crtc_state->update_wm_pre = true;
> > > > +       } else if (turn_off) {
> > > > +               new_crtc_state->update_wm_post = true;
> > > > +       } else if (i9xx_wm_need_update(old_plane_state, new_plane_state)) {
> > > > +               /* FIXME bollocks */
> > > > +               new_crtc_state->update_wm_pre = true;
> > > > +               new_crtc_state->update_wm_post = true;
> > > > +       }
> > > > +}
> > > > +
> > > > +static int i9xx_compute_watermarks(struct intel_atomic_state *state,
> > > > +                                  struct intel_crtc *crtc)
> > > > +{
> > > > +       struct intel_crtc_state *new_crtc_state =
> > > > +               intel_atomic_get_new_crtc_state(state, crtc);
> > > > +       const struct intel_plane_state *old_plane_state;
> > > > +       const struct intel_plane_state *new_plane_state;
> > > > +       struct intel_plane *plane;
> > > > +       int i;
> > > > +
> > > > +       for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
> > > > +                                            new_plane_state, i) {
> > > > +               if (plane->pipe != crtc->pipe)
> > > > +                       continue;
> > > > +
> > > > +               i9xx_wm_compute(new_crtc_state, old_plane_state, new_plane_state);
> > > > +       }
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > > >  /*
> > > >   * Documentation says:
> > > >   * "If the line size is small, the TLB fetches can get in the way of the
> > > > @@ -4056,18 +4126,22 @@ static const struct intel_wm_funcs g4x_wm_funcs = {
> > > >  };
> > > >  
> > > >  static const struct intel_wm_funcs pnv_wm_funcs = {
> > > > +       .compute_watermarks = i9xx_compute_watermarks,
> > > >         .update_wm = pnv_update_wm,
> > > >  };
> > > >  
> > > >  static const struct intel_wm_funcs i965_wm_funcs = {
> > > > +       .compute_watermarks = i9xx_compute_watermarks,
> > > >         .update_wm = i965_update_wm,
> > > >  };
> > > >  
> > > >  static const struct intel_wm_funcs i9xx_wm_funcs = {
> > > > +       .compute_watermarks = i9xx_compute_watermarks,
> > > >         .update_wm = i9xx_update_wm,
> > > >  };
> > > >  
> > > >  static const struct intel_wm_funcs i845_wm_funcs = {
> > > > +       .compute_watermarks = i9xx_compute_watermarks,
> > > >         .update_wm = i845_update_wm,
> > > >  };
> > > >  
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > > index 2aeb4cd5b5a1..33fec36ec0bd 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > > @@ -392,28 +392,6 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> > > >         plane_state->uapi.visible = false;
> > > >  }
> > > >  
> > > > -/* FIXME nuke when all wm code is atomic */
> > > > -static bool intel_wm_need_update(const struct intel_plane_state *old_plane_state,
> > > > -                                const struct intel_plane_state *new_plane_state)
> > > > -{
> > > > -       /* Update watermarks on tiling or size changes. */
> > > > -       if (old_plane_state->uapi.visible != new_plane_state->uapi.visible)
> > > > -               return true;
> > > > -
> > > > -       if (!old_plane_state->hw.fb || !new_plane_state->hw.fb)
> > > > -               return false;
> > > > -
> > > > -       if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier ||
> > > > -           old_plane_state->hw.rotation != new_plane_state->hw.rotation ||
> > > > -           drm_rect_width(&old_plane_state->uapi.src) != drm_rect_width(&new_plane_state-
> > > > > uapi.src) ||
> > > > -           drm_rect_height(&old_plane_state->uapi.src) != drm_rect_height(&new_plane_state-
> > > > > uapi.src) ||
> > > > -           drm_rect_width(&old_plane_state->uapi.dst) != drm_rect_width(&new_plane_state-
> > > > > uapi.dst) ||
> > > > -           drm_rect_height(&old_plane_state->uapi.dst) != drm_rect_height(&new_plane_state-
> > > > > uapi.dst))
> > > > -               return true;
> > > > -
> > > > -       return false;
> > > > -}
> > > > -
> > > >  static bool intel_plane_is_scaled(const struct intel_plane_state *plane_state)
> > > >  {
> > > >         int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > > > @@ -602,20 +580,6 @@ static int intel_plane_atomic_calc_changes(const struct
> > > > intel_crtc_state
> > > > *old_cr
> > > >                        was_visible, visible,
> > > >                        turn_off, turn_on, mode_changed);
> > > >  
> > > > -       if (turn_on) {
> > > > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> > > > -                       new_crtc_state->update_wm_pre = true;
> > > > -       } else if (turn_off) {
> > > > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> > > > -                       new_crtc_state->update_wm_post = true;
> > > > -       } else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
> > > > -               if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
> > > > -                       /* FIXME bollocks */
> > > > -                       new_crtc_state->update_wm_pre = true;
> > > > -                       new_crtc_state->update_wm_post = true;
> > > > -               }
> > > > -       }
> > > > -
> > > 
> > > With this change, update_wm_pre/post flag will move from intel_atomic_check_planes() to
> > > intel_atomic_check_crtcs() which will call compute_watermarks() and update the flag. Just
> > > wanted to
> > > clarify if this is expected.
> > 
> > That is the whole point of the patch.
> 
> Well, I suppose not quite the whole point, but most of it.
> The other purpose was just to get this stuff out from the
> platform agnostic code.
> 
Thanks..

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>