Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nikula, Jani" <jani.nikula@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"Varide, Nischal" <nischal.varide@intel.com>
Subject: Re: [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check
Date: Mon, 22 Feb 2021 09:13:46 +0000	[thread overview]
Message-ID: <a298e970be4842bbb46697dbdaba22f9@intel.com> (raw)
In-Reply-To: <77226d7dbb09090b646e4325d3cf304669a910b7.1613054234.git.jani.nikula@intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Varide, Nischal <nischal.varide@intel.com>
> Subject: [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check
> 
> For starters, we expect the state to be zero, as we don't enable MSO anywhere.
> 
> v2: Refer to splitter.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Nischal Varide <nischal.varide@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index fe9985bd5786..3059a07b8c36 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9326,6 +9326,10 @@ intel_pipe_config_compare(const struct intel_crtc_state
> *current_config,
>  	PIPE_CONF_CHECK_I(dsc.dsc_split);
>  	PIPE_CONF_CHECK_I(dsc.compressed_bpp);
> 
> +	PIPE_CONF_CHECK_BOOL(splitter.enable);
> +	PIPE_CONF_CHECK_I(splitter.link_count);
> +	PIPE_CONF_CHECK_I(splitter.pixel_overlap);
> +
>  	PIPE_CONF_CHECK_I(mst_master_transcoder);
> 
>  	PIPE_CONF_CHECK_BOOL(vrr.enable);
> --
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-02-22  9:13 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-11 14:52 [Intel-gfx] [PATCH v3 0/9] drm/i915/edp: enable eDP Multi-SST Operation (MSO) Jani Nikula
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers Jani Nikula
2021-02-22  5:25   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode Jani Nikula
2021-02-22  5:36   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes() Jani Nikula
2021-02-22  5:50   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+ Jani Nikula
2021-02-22  5:57   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter configuration definitions Jani Nikula
2021-02-22  5:58   ` Shankar, Uma
2021-02-22 16:31     ` Jani Nikula
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it Jani Nikula
2021-02-22  9:09   ` Shankar, Uma
2021-02-22 16:55     ` Jani Nikula
2021-02-22 18:11       ` Shankar, Uma
2021-03-02 10:25       ` Jani Nikula
2021-03-02 10:29         ` Shankar, Uma
2021-03-02 14:57         ` Ville Syrjälä
2021-03-02 17:20           ` Jani Nikula
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check Jani Nikula
2021-02-22  9:13   ` Shankar, Uma [this message]
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 8/9] drm/i915/edp: modify fixed and downclock modes for MSO Jani Nikula
2021-02-22  9:21   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 9/9] drm/i915/edp: enable eDP MSO during link training Jani Nikula
2021-02-22 10:06   ` Shankar, Uma
2021-02-11 15:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/edp: enable eDP Multi-SST Operation (MSO) Patchwork
2021-02-11 16:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-11 17:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a298e970be4842bbb46697dbdaba22f9@intel.com \
    --to=uma.shankar@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=nischal.varide@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox