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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Szymon Morek <szymon.morek@intel.com>, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 3/4] drm/i915/xehp: Add compute engine ABI
Date: Thu, 28 Apr 2022 08:58:04 +0100	[thread overview]
Message-ID: <a55f18bb-0837-aa67-042b-afd0cbe0c124@linux.intel.com> (raw)
In-Reply-To: <20220428041926.1483683-4-matthew.d.roper@intel.com>


On 28/04/2022 05:19, Matt Roper wrote:
> We're now ready to start exposing compute engines to userspace.
> 
> v2:
>   - Move kerneldoc for other engine classes to a separate patch.  (Andi)
> 
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Szymon Morek <szymon.morek@intel.com>
> UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395

If in doubt cut it out. :) Works for me.

The rest looks complete.

Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Anyone cares to smoke test and update intel_gpu_top to display a nice name?

Regards,

Tvrtko

> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +-
>   drivers/gpu/drm/i915/i915_drm_client.c      | 1 +
>   drivers/gpu/drm/i915/i915_drm_client.h      | 2 +-
>   include/uapi/drm/i915_drm.h                 | 9 +++++++++
>   4 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> index 0f6cd96b459f..46a174f8aa00 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> @@ -47,7 +47,7 @@ static const u8 uabi_classes[] = {
>   	[COPY_ENGINE_CLASS] = I915_ENGINE_CLASS_COPY,
>   	[VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
>   	[VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
> -	/* TODO: Add COMPUTE_CLASS mapping once ABI is available */
> +	[COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
>   };
>   
>   static int engine_cmp(void *priv, const struct list_head *A,
> diff --git a/drivers/gpu/drm/i915/i915_drm_client.c b/drivers/gpu/drm/i915/i915_drm_client.c
> index 475a6f824cad..18d38cb59923 100644
> --- a/drivers/gpu/drm/i915/i915_drm_client.c
> +++ b/drivers/gpu/drm/i915/i915_drm_client.c
> @@ -81,6 +81,7 @@ static const char * const uabi_class_names[] = {
>   	[I915_ENGINE_CLASS_COPY] = "copy",
>   	[I915_ENGINE_CLASS_VIDEO] = "video",
>   	[I915_ENGINE_CLASS_VIDEO_ENHANCE] = "video-enhance",
> +	[I915_ENGINE_CLASS_COMPUTE] = "compute",
>   };
>   
>   static u64 busy_add(struct i915_gem_context *ctx, unsigned int class)
> diff --git a/drivers/gpu/drm/i915/i915_drm_client.h b/drivers/gpu/drm/i915/i915_drm_client.h
> index 5f5b02b01ba0..f796c5e8e060 100644
> --- a/drivers/gpu/drm/i915/i915_drm_client.h
> +++ b/drivers/gpu/drm/i915/i915_drm_client.h
> @@ -13,7 +13,7 @@
>   
>   #include "gt/intel_engine_types.h"
>   
> -#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_VIDEO_ENHANCE
> +#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE
>   
>   struct drm_i915_private;
>   
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index ec000fc6c879..a2def7b27009 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -203,6 +203,15 @@ enum drm_i915_gem_engine_class {
>   	 */
>   	I915_ENGINE_CLASS_VIDEO_ENHANCE	= 3,
>   
> +	/**
> +	 * @I915_ENGINE_CLASS_COMPUTE:
> +	 *
> +	 * Compute engines support a subset of the instructions available
> +	 * on render engines:  compute engines support Compute (GPGPU) and
> +	 * programmable media workloads, but do not support the 3D pipeline.
> +	 */
> +	I915_ENGINE_CLASS_COMPUTE	= 4,
> +
>   	/* Values in this enum should be kept compact. */
>   
>   	/**

  reply	other threads:[~2022-04-28  7:58 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-28  4:19 [Intel-gfx] [PATCH v2 0/4] i915: Turn on compute engine support Matt Roper
2022-04-28  4:19 ` [Intel-gfx] [PATCH v2 1/4] drm/i915/uapi: Add kerneldoc for engine class enum Matt Roper
2022-04-28 12:59   ` Andi Shyti
2022-04-28  4:19 ` [Intel-gfx] [PATCH v2 2/4] drm/i915/xehp: Add register for compute engine's MMIO-based TLB invalidation Matt Roper
2022-04-28  8:34   ` Tvrtko Ursulin
2022-04-28 12:13   ` Kumar Valsan, Prathap
2022-04-28  4:19 ` [Intel-gfx] [PATCH v2 3/4] drm/i915/xehp: Add compute engine ABI Matt Roper
2022-04-28  7:58   ` Tvrtko Ursulin [this message]
2022-04-28 13:04   ` Andi Shyti
2022-04-28  4:19 ` [Intel-gfx] [PATCH v2 4/4] drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines Matt Roper
2022-04-28  4:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support (rev4) Patchwork
2022-04-28  4:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-28  6:18 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-04-29 21:47   ` Matt Roper
2022-04-29 21:23 ` [Intel-gfx] [PATCH v2 0/4] i915: Turn on compute engine support Jordan Justen

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