From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
jouni.hogander@intel.com, animesh.manna@intel.com
Subject: Re: [PATCH 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update
Date: Fri, 14 Nov 2025 17:15:45 +0200 [thread overview]
Message-ID: <aRdHoRJaFkanBNt9@intel.com> (raw)
In-Reply-To: <20251114052746.158751-5-ankit.k.nautiyal@intel.com>
On Fri, Nov 14, 2025 at 10:57:45AM +0530, Ankit Nautiyal wrote:
> The pre_plane_update and post_plane_update hooks used slightly different
> conditions for LOBF state changes. Rewrite them to be minimal and
> complementary:
>
> - pre runs only when LOBF is being disabled (old=1 -> new=0)
> - post runs only when LOBF is being enabled (old=0 -> new=1),
> with an early return if PSR is active.
>
> This will help for subsequent changes to handle LOBF during LRR and
> seamless MN transitions.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 5cfb9345776a..db2b9608f7f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -461,7 +461,8 @@ void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
> if (DISPLAY_VER(display) < 20)
> return;
>
> - if (crtc_state->has_lobf || crtc_state->has_lobf == old_crtc_state->has_lobf)
> + if (!old_crtc_state->has_lobf ||
> + crtc_state->has_lobf == old_crtc_state->has_lobf)
> return;
Looks to me like these should be converted into
if (intel_crtc_lobf_disabling(...))
intel_alpm_lobf_disable(...);
and
if (intel_crtc_lobf_enabling(...))
intel_alpm_lobf_enable(...);
and implemented using is_{enabling,disabling}().
>
> for_each_intel_encoder_mask(display->drm, encoder,
> @@ -512,7 +513,10 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
> intel_atomic_get_old_crtc_state(state, crtc);
> struct intel_encoder *encoder;
>
> - if (crtc_state->has_psr || !crtc_state->has_lobf ||
> + if (crtc_state->has_psr)
> + return;
> +
> + if (!crtc_state->has_lobf ||
> crtc_state->has_lobf == old_crtc_state->has_lobf)
> return;
>
> --
> 2.45.2
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-11-14 15:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-14 5:27 [PATCH 0/5] LOBF fixes Ankit Nautiyal
2025-11-14 5:27 ` [PATCH 1/5] drm/i915/alpm: Compute LOBF late after guardband is already determined Ankit Nautiyal
2025-11-14 5:27 ` [PATCH 2/5] drm/i915/alpm: Allow LOBF only if window1 > alpm check_entry lines Ankit Nautiyal
2025-11-14 15:09 ` Ville Syrjälä
2025-11-17 7:34 ` Nautiyal, Ankit K
2025-11-14 5:27 ` [PATCH 3/5] drm/i915/alpm: Allow LOBF only for platform that have Always on VRR TG Ankit Nautiyal
2025-11-14 15:10 ` Ville Syrjälä
2025-11-14 5:27 ` [PATCH 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update Ankit Nautiyal
2025-11-14 15:15 ` Ville Syrjälä [this message]
2025-11-17 7:36 ` Nautiyal, Ankit K
2025-11-14 5:27 ` [PATCH 5/5] drm/i915/alpm: Disable LOBF around transitioning for LRR/seamless MN Ankit Nautiyal
2025-11-14 7:40 ` ✓ i915.CI.BAT: success for LOBF fixes Patchwork
2025-11-14 23:08 ` ✓ i915.CI.Full: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-11-19 13:51 [PATCH 0/5] " Ankit Nautiyal
2025-11-19 13:51 ` [PATCH 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update Ankit Nautiyal
2025-11-20 8:52 ` Michał Grzelak
2025-12-17 13:49 ` Hogander, Jouni
2025-12-18 9:37 ` Nautiyal, Ankit K
2025-12-24 8:48 [PATCH 0/5] LOBF fixes Ankit Nautiyal
2025-12-24 8:48 ` [PATCH 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update Ankit Nautiyal
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