From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [PATCH 08/13] drm/i915/pps: abstract intel_pps_reinit()
Date: Tue, 22 Dec 2020 16:49:48 +0200 [thread overview]
Message-ID: <aa645d7124f995fda140ec594de7203647a784fa.1608648128.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1608648128.git.jani.nikula@intel.com>
Add a "reinit" call to hide some more pps functions, and clean up the
callers. A minor functional change is not holding the pps lock across
the whole operation in intel_dp_encoder_reset, but instead doing it in
two steps.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 20 +++++---------------
drivers/gpu/drm/i915/display/intel_pps.c | 21 +++++++++++++++++++--
drivers/gpu/drm/i915/display/intel_pps.h | 3 +--
3 files changed, 25 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index de2642d5be3b..334ba1775cd3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5859,30 +5859,20 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->dev);
struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
- intel_wakeref_t wakeref;
if (!HAS_DDI(dev_priv))
intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
intel_dp->reset_link_params = true;
- if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) &&
- !intel_dp_is_edp(intel_dp))
- return;
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ intel_wakeref_t wakeref;
- with_intel_pps_lock(intel_dp, wakeref) {
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ with_intel_pps_lock(intel_dp, wakeref)
intel_dp->active_pipe = vlv_active_pipe(intel_dp);
-
- if (intel_dp_is_edp(intel_dp)) {
- /*
- * Reinit the power sequencer, in case BIOS did
- * something nasty with it.
- */
- intel_dp_pps_init(intel_dp);
- intel_pps_vdd_sanitize(intel_dp);
- }
}
+
+ intel_pps_reinit(intel_dp);
}
static int intel_modeset_tile_group(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 651c79ce4bdd..3e62d1450682 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1043,7 +1043,7 @@ void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
intel_dp_init_panel_power_sequencer_registers(intel_dp, true);
}
-void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
+static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -1340,7 +1340,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
(intel_de_read(dev_priv, regs.pp_ctrl) & BXT_POWER_CYCLE_DELAY_MASK));
}
-void intel_dp_pps_init(struct intel_dp *intel_dp)
+static void intel_dp_pps_init(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1352,6 +1352,23 @@ void intel_dp_pps_init(struct intel_dp *intel_dp)
}
}
+void intel_pps_reinit(struct intel_dp *intel_dp)
+{
+ intel_wakeref_t wakeref;
+
+ if (!intel_dp_is_edp(intel_dp))
+ return;
+
+ with_intel_pps_lock(intel_dp, wakeref) {
+ /*
+ * Reinit the power sequencer, in case BIOS did something nasty
+ * with it.
+ */
+ intel_dp_pps_init(intel_dp);
+ intel_pps_vdd_sanitize(intel_dp);
+ }
+}
+
void intel_pps_init(struct intel_dp *intel_dp)
{
intel_wakeref_t wakeref;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index 53c0fafd1440..4780b59a59df 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -32,7 +32,6 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync);
void intel_pps_on_unlocked(struct intel_dp *intel_dp);
void intel_pps_off_unlocked(struct intel_dp *intel_dp);
-void intel_pps_vdd_sanitize(struct intel_dp *intel_dp);
void intel_pps_vdd_on(struct intel_dp *intel_dp);
void intel_pps_on(struct intel_dp *intel_dp);
void intel_pps_off(struct intel_dp *intel_dp);
@@ -42,7 +41,7 @@ bool intel_pps_have_power(struct intel_dp *intel_dp);
void wait_panel_power_cycle(struct intel_dp *intel_dp);
void intel_pps_init(struct intel_dp *intel_dp);
-void intel_dp_pps_init(struct intel_dp *intel_dp);
+void intel_pps_reinit(struct intel_dp *intel_dp);
void intel_power_sequencer_reset(struct drm_i915_private *i915);
void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
--
2.20.1
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next prev parent reply other threads:[~2020-12-22 14:51 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-22 14:49 [Intel-gfx] [PATCH 00/13] drm/i915/dp: split out pps and aux Jani Nikula
2020-12-22 14:49 ` [Intel-gfx] [PATCH 01/13] drm/i915/pps: abstract panel power sequencer from intel_dp.c Jani Nikula
2020-12-28 11:22 ` Gupta, Anshuman
2021-01-04 14:46 ` Jani Nikula
2021-01-08 17:44 ` Jani Nikula
2020-12-22 14:49 ` [Intel-gfx] [PATCH 02/13] drm/i915/pps: rename pps_{, un}lock -> intel_pps_{, un}lock Jani Nikula
2020-12-28 10:57 ` Gupta, Anshuman
2020-12-22 14:49 ` [Intel-gfx] [PATCH 03/13] drm/i915/pps: rename intel_edp_backlight_* to intel_pps_backlight_* Jani Nikula
2020-12-29 6:12 ` Anshuman Gupta
2020-12-22 14:49 ` [Intel-gfx] [PATCH 04/13] drm/i915/pps: rename intel_edp_panel_* to intel_pps_* Jani Nikula
2020-12-29 6:15 ` Anshuman Gupta
2021-01-08 17:45 ` Jani Nikula
2020-12-22 14:49 ` [Intel-gfx] [PATCH 05/13] drm/i915/pps: rename edp_panel_* to intel_pps_*_unlocked Jani Nikula
2020-12-29 6:35 ` Anshuman Gupta
2020-12-22 14:49 ` [Intel-gfx] [PATCH 06/13] drm/i915/pps: abstract intel_pps_vdd_off_sync Jani Nikula
2020-12-29 6:47 ` Anshuman Gupta
2021-01-08 17:46 ` Jani Nikula
2020-12-22 14:49 ` [Intel-gfx] [PATCH 07/13] drm/i915/pps: add higher level intel_pps_init() call Jani Nikula
2020-12-29 6:53 ` Anshuman Gupta
2020-12-22 14:49 ` Jani Nikula [this message]
2020-12-29 6:59 ` [Intel-gfx] [PATCH 08/13] drm/i915/pps: abstract intel_pps_reinit() Anshuman Gupta
2020-12-22 14:49 ` [Intel-gfx] [PATCH 09/13] drm/i915/pps: rename intel_dp_check_edp to intel_pps_check_power_unlocked Jani Nikula
2020-12-29 7:04 ` Anshuman Gupta
2021-01-08 10:33 ` Jani Nikula
2021-01-08 10:59 ` Gupta, Anshuman
2020-12-22 14:49 ` [Intel-gfx] [PATCH 10/13] drm/i915/pps: rename intel_power_sequencer_reset to intel_pps_reset_all Jani Nikula
2020-12-29 7:53 ` Anshuman Gupta
2020-12-22 14:49 ` [Intel-gfx] [PATCH 11/13] drm/i915/pps: add locked intel_pps_wait_power_cycle Jani Nikula
2020-12-29 7:59 ` Anshuman Gupta
2020-12-22 14:49 ` [Intel-gfx] [PATCH 12/13] drm/i915/pps: rename vlv_init_panel_power_sequencer to vlv_pps_init Jani Nikula
2020-12-29 8:01 ` Anshuman Gupta
2020-12-22 14:49 ` [Intel-gfx] [PATCH 13/13] drm/i915/dp: split out aux functionality to intel_dp_aux.c Jani Nikula
2020-12-22 15:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: split out pps and aux Patchwork
2020-12-22 16:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-22 21:02 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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