Re: [PATCH 22/37] drm/i915: program WM_LINETIME on Haswell

[Chris Wilson <chris@chris-wilson.co.uk>]

On Wed, 21 Mar 2012 22:09:57 -0300, Eugeni Dodonov <eugeni.dodonov@intel.com> wrote:
> The line time can be programmed according to the number of horizontal
> pixels vs effective pixel rate ratio.
> 
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 46633fe..e056c32 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6073,6 +6073,17 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>  		   (adjusted_mode->crtc_vsync_start - 1) |
>  		   ((adjusted_mode->crtc_vsync_end - 1) << 16));
>  
> +	if (IS_HASWELL(dev)) {
> +		temp = I915_READ(PIPE_WM_LINETIME(pipe));
> +		temp &= ~PIPE_WM_LINETIME_LINETIME_MASK;
> +
> +		/* Pipe horizontal total number of pixels / pixel rate in MHz. */
That comment really doesn't tell me anything more than the following
line. Ok, perhaps a CLOCK_TO_MHz(x) ((x)/1000), but not a lot else.
/* The WM are automatically computed based on how long it takes to fill a row at the given clock rate */
is slightly better as to start to see the meaning and the why.

Any chance of finding another name for LINETIME, perhaps duration:
PIPE_WM_LINETIME_MASK
PIPE_WM_LINETIME_TIME(x)
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre