[Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Imre Deak]

This is v2 of [1], with the following changes:
- Store the pbn_div value in fixed point format.
- Fix PBN calculation in patch 8.
- Reuse intel_dp_max_data_rate(), intel_dp_effective_data_rate() in
  intel_link_compute_m_n() (Jani).

[1] https://lore.kernel.org/all/20231113201110.510724-1-imre.deak@intel.com

Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Lyude Paul <lyude@redhat.com>

Imre Deak (11):
  drm/dp_mst: Store the MST PBN divider value in fixed point format
  drm/dp_mst: Fix PBN divider calculation for UHBR rates
  drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
  drm/i915/dp: Replace intel_dp_is_uhbr_rate() with
    drm_dp_is_uhbr_rate()
  drm/i915/dp: Account for channel coding efficiency on UHBR links
  drm/i915/dp: Fix UHBR link M/N values
  drm/i915/dp_mst: Calculate the BW overhead in
    intel_dp_mst_find_vcpi_slots_for_bpp()
  drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
  drm/i915/dp: Report a rounded-down value as the maximum data rate
  drm/i915/dp: Simplify intel_dp_max_data_rate()
  drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in
    intel_link_compute_m_n()

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   5 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   3 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   5 +-
 drivers/gpu/drm/display/drm_dp_mst_topology.c |  31 +++-
 drivers/gpu/drm/i915/display/intel_display.c  |  51 ++----
 drivers/gpu/drm/i915/display/intel_dp.c       |  78 +++++++---
 drivers/gpu/drm/i915/display/intel_dp.h       |   5 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  55 +++++--
 drivers/gpu/drm/nouveau/dispnv50/disp.c       |   6 +-
 .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
 include/drm/display/drm_dp_helper.h           |  13 ++
 include/drm/display/drm_dp_mst_helper.h       |   7 +-
 12 files changed, 311 insertions(+), 93 deletions(-)

-- 
2.39.2

[Intel-gfx] [PATCH v2 01/11] drm/dp_mst: Store the MST PBN divider value in fixed point format

[Imre Deak]

On UHBR links the PBN divider is a fractional number, accordingly store
it in fixed point format. For now drm_dp_get_vc_payload_bw() always
returns a whole number and all callers will use only the integer part of
it which should preserve the current behavior. The next patch will fix
drm_dp_get_vc_payload_bw() for UHBR rates returning a fractional number
for those (also accounting for the channel coding efficiency correctly).

Cc: Lyude Paul <lyude@redhat.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  5 +++--
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  3 ++-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  5 +++--
 drivers/gpu/drm/display/drm_dp_mst_topology.c | 22 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 ++-
 drivers/gpu/drm/nouveau/dispnv50/disp.c       |  6 +++--
 include/drm/display/drm_dp_mst_helper.h       |  7 +++---
 7 files changed, 33 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 74f9f02abcdec..12346b21d0b05 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -85,6 +85,7 @@
 #include <drm/drm_atomic_uapi.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_blend.h>
+#include <drm/drm_fixed.h>
 #include <drm/drm_fourcc.h>
 #include <drm/drm_edid.h>
 #include <drm/drm_eld.h>
@@ -6909,8 +6910,8 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
 	if (IS_ERR(mst_state))
 		return PTR_ERR(mst_state);
 
-	if (!mst_state->pbn_div)
-		mst_state->pbn_div = dm_mst_get_pbn_divider(aconnector->mst_root->dc_link);
+	if (!mst_state->pbn_div.full)
+		mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));
 
 	if (!state->duplicated) {
 		int max_bpc = conn_state->max_requested_bpc;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index ed784cf27d396..63024393b516e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -31,6 +31,7 @@
 #include <drm/drm_probe_helper.h>
 #include <drm/amdgpu_drm.h>
 #include <drm/drm_edid.h>
+#include <drm/drm_fixed.h>
 
 #include "dm_services.h"
 #include "amdgpu.h"
@@ -210,7 +211,7 @@ static void dm_helpers_construct_old_payload(
 			struct drm_dp_mst_atomic_payload *old_payload)
 {
 	struct drm_dp_mst_atomic_payload *pos;
-	int pbn_per_slot = mst_state->pbn_div;
+	int pbn_per_slot = dfixed_trunc(mst_state->pbn_div);
 	u8 next_payload_vc_start = mgr->next_start_slot;
 	u8 payload_vc_start = new_payload->vc_start_slot;
 	u8 allocated_time_slots;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 9a58e1a4c5f49..d1ba3ae228b08 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -27,6 +27,7 @@
 #include <drm/display/drm_dp_mst_helper.h>
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
+#include <drm/drm_fixed.h>
 #include "dm_services.h"
 #include "amdgpu.h"
 #include "amdgpu_dm.h"
@@ -941,10 +942,10 @@ static int increase_dsc_bpp(struct drm_atomic_state *state,
 		link_timeslots_used = 0;
 
 		for (i = 0; i < count; i++)
-			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, mst_state->pbn_div);
+			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, dfixed_trunc(mst_state->pbn_div));
 
 		fair_pbn_alloc =
-			(63 - link_timeslots_used) / remaining_to_increase * mst_state->pbn_div;
+			(63 - link_timeslots_used) / remaining_to_increase * dfixed_trunc(mst_state->pbn_div);
 
 		if (initial_slack[next_index] > fair_pbn_alloc) {
 			vars[next_index].pbn += fair_pbn_alloc;
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 4d72c9a32026e..000d05e80352a 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -43,6 +43,7 @@
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_drv.h>
 #include <drm/drm_edid.h>
+#include <drm/drm_fixed.h>
 #include <drm/drm_print.h>
 #include <drm/drm_probe_helper.h>
 
@@ -3578,16 +3579,22 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
  * value is in units of PBNs/(timeslots/1 MTP). This value can be used to
  * convert the number of PBNs required for a given stream to the number of
  * timeslots this stream requires in each MTP.
+ *
+ * Returns the BW / timeslot value in 20.12 fixed point format.
  */
-int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
-			     int link_rate, int link_lane_count)
+fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
+				    int link_rate, int link_lane_count)
 {
+	fixed20_12 ret;
+
 	if (link_rate == 0 || link_lane_count == 0)
 		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
 			    link_rate, link_lane_count);
 
 	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
-	return link_rate * link_lane_count / 54000;
+	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
+
+	return ret;
 }
 EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
 
@@ -4335,7 +4342,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
 		}
 	}
 
-	req_slots = DIV_ROUND_UP(pbn, topology_state->pbn_div);
+	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
 
 	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
 		       port->connector->base.id, port->connector->name,
@@ -4872,7 +4879,8 @@ void drm_dp_mst_dump_topology(struct seq_file *m,
 	state = to_drm_dp_mst_topology_state(mgr->base.state);
 	seq_printf(m, "\n*** Atomic state info ***\n");
 	seq_printf(m, "payload_mask: %x, max_payloads: %d, start_slot: %u, pbn_div: %d\n",
-		   state->payload_mask, mgr->max_payloads, state->start_slot, state->pbn_div);
+		   state->payload_mask, mgr->max_payloads, state->start_slot,
+		   dfixed_trunc(state->pbn_div));
 
 	seq_printf(m, "\n| idx | port | vcpi | slots | pbn | dsc | status |     sink name     |\n");
 	for (i = 0; i < mgr->max_payloads; i++) {
@@ -5330,10 +5338,10 @@ drm_dp_mst_atomic_check_payload_alloc_limits(struct drm_dp_mst_topology_mgr *mgr
 	}
 
 	if (!payload_count)
-		mst_state->pbn_div = 0;
+		mst_state->pbn_div.full = dfixed_const(0);
 
 	drm_dbg_atomic(mgr->dev, "[MST MGR:%p] mst state %p TU pbn_div=%d avail=%d used=%d\n",
-		       mgr, mst_state, mst_state->pbn_div, avail_slots,
+		       mgr, mst_state, dfixed_trunc(mst_state->pbn_div), avail_slots,
 		       mst_state->total_avail_slots - avail_slots);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0cb9405f59eaa..e5d6b811c22ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -26,6 +26,7 @@
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_edid.h>
+#include <drm/drm_fixed.h>
 #include <drm/drm_probe_helper.h>
 
 #include "i915_drv.h"
@@ -202,7 +203,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		 */
 		drm_WARN_ON(&i915->drm, remote_m_n.tu < crtc_state->dp_m_n.tu);
 		crtc_state->dp_m_n.tu = remote_m_n.tu;
-		crtc_state->pbn = remote_m_n.tu * mst_state->pbn_div;
+		crtc_state->pbn = remote_m_n.tu * dfixed_trunc(mst_state->pbn_div);
 
 		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
 						      connector->port,
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 493fe4660f651..11fe75b68e95c 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -40,6 +40,7 @@
 #include <drm/drm_edid.h>
 #include <drm/drm_eld.h>
 #include <drm/drm_fb_helper.h>
+#include <drm/drm_fixed.h>
 #include <drm/drm_probe_helper.h>
 #include <drm/drm_vblank.h>
 
@@ -946,7 +947,8 @@ nv50_msto_prepare(struct drm_atomic_state *state,
 	if (ret == 0) {
 		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index,
 				      payload->vc_start_slot, payload->time_slots,
-				      payload->pbn, payload->time_slots * mst_state->pbn_div);
+				      payload->pbn,
+				      payload->time_slots * dfixed_trunc(mst_state->pbn_div));
 	} else {
 		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0);
 	}
@@ -990,7 +992,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
 	if (IS_ERR(mst_state))
 		return PTR_ERR(mst_state);
 
-	if (!mst_state->pbn_div) {
+	if (!mst_state->pbn_div.full) {
 		struct nouveau_encoder *outp = mstc->mstm->outp;
 
 		mst_state->pbn_div = drm_dp_get_vc_payload_bw(&mstm->mgr,
diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h
index a4aad6df71f18..9b19d8bd520af 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -25,6 +25,7 @@
 #include <linux/types.h>
 #include <drm/display/drm_dp_helper.h>
 #include <drm/drm_atomic.h>
+#include <drm/drm_fixed.h>
 
 #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
 #include <linux/stackdepot.h>
@@ -617,7 +618,7 @@ struct drm_dp_mst_topology_state {
 	 * @pbn_div: The current PBN divisor for this topology. The driver is expected to fill this
 	 * out itself.
 	 */
-	int pbn_div;
+	fixed20_12 pbn_div;
 };
 
 #define to_dp_mst_topology_mgr(x) container_of(x, struct drm_dp_mst_topology_mgr, base)
@@ -839,8 +840,8 @@ struct edid *drm_dp_mst_get_edid(struct drm_connector *connector,
 				 struct drm_dp_mst_topology_mgr *mgr,
 				 struct drm_dp_mst_port *port);
 
-int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
-			     int link_rate, int link_lane_count);
+fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
+				    int link_rate, int link_lane_count);
 
 int drm_dp_calc_pbn_mode(int clock, int bpp);
 
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 01/11] drm/dp_mst: Store the MST PBN divider value in fixed point format

[Ville Syrjälä]

On Thu, Nov 16, 2023 at 03:18:31PM +0200, Imre Deak wrote:
> On UHBR links the PBN divider is a fractional number, accordingly store
> it in fixed point format. For now drm_dp_get_vc_payload_bw() always
> returns a whole number and all callers will use only the integer part of
> it which should preserve the current behavior. The next patch will fix
> drm_dp_get_vc_payload_bw() for UHBR rates returning a fractional number
> for those (also accounting for the channel coding efficiency correctly).
> 
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Wayne Lin <wayne.lin@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  5 +++--
>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  3 ++-
>  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  5 +++--
>  drivers/gpu/drm/display/drm_dp_mst_topology.c | 22 +++++++++++++------
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 ++-
>  drivers/gpu/drm/nouveau/dispnv50/disp.c       |  6 +++--
>  include/drm/display/drm_dp_mst_helper.h       |  7 +++---
>  7 files changed, 33 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 74f9f02abcdec..12346b21d0b05 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -85,6 +85,7 @@
>  #include <drm/drm_atomic_uapi.h>
>  #include <drm/drm_atomic_helper.h>
>  #include <drm/drm_blend.h>
> +#include <drm/drm_fixed.h>
>  #include <drm/drm_fourcc.h>
>  #include <drm/drm_edid.h>
>  #include <drm/drm_eld.h>
> @@ -6909,8 +6910,8 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
>  	if (IS_ERR(mst_state))
>  		return PTR_ERR(mst_state);
>  
> -	if (!mst_state->pbn_div)
> -		mst_state->pbn_div = dm_mst_get_pbn_divider(aconnector->mst_root->dc_link);
> +	if (!mst_state->pbn_div.full)
> +		mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));

Why doesn't that dfixed stuff return the correct type?

Anyways looks mostly mechanical
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  
>  	if (!state->duplicated) {
>  		int max_bpc = conn_state->max_requested_bpc;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> index ed784cf27d396..63024393b516e 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> @@ -31,6 +31,7 @@
>  #include <drm/drm_probe_helper.h>
>  #include <drm/amdgpu_drm.h>
>  #include <drm/drm_edid.h>
> +#include <drm/drm_fixed.h>
>  
>  #include "dm_services.h"
>  #include "amdgpu.h"
> @@ -210,7 +211,7 @@ static void dm_helpers_construct_old_payload(
>  			struct drm_dp_mst_atomic_payload *old_payload)
>  {
>  	struct drm_dp_mst_atomic_payload *pos;
> -	int pbn_per_slot = mst_state->pbn_div;
> +	int pbn_per_slot = dfixed_trunc(mst_state->pbn_div);
>  	u8 next_payload_vc_start = mgr->next_start_slot;
>  	u8 payload_vc_start = new_payload->vc_start_slot;
>  	u8 allocated_time_slots;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 9a58e1a4c5f49..d1ba3ae228b08 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -27,6 +27,7 @@
>  #include <drm/display/drm_dp_mst_helper.h>
>  #include <drm/drm_atomic.h>
>  #include <drm/drm_atomic_helper.h>
> +#include <drm/drm_fixed.h>
>  #include "dm_services.h"
>  #include "amdgpu.h"
>  #include "amdgpu_dm.h"
> @@ -941,10 +942,10 @@ static int increase_dsc_bpp(struct drm_atomic_state *state,
>  		link_timeslots_used = 0;
>  
>  		for (i = 0; i < count; i++)
> -			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, mst_state->pbn_div);
> +			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, dfixed_trunc(mst_state->pbn_div));
>  
>  		fair_pbn_alloc =
> -			(63 - link_timeslots_used) / remaining_to_increase * mst_state->pbn_div;
> +			(63 - link_timeslots_used) / remaining_to_increase * dfixed_trunc(mst_state->pbn_div);
>  
>  		if (initial_slack[next_index] > fair_pbn_alloc) {
>  			vars[next_index].pbn += fair_pbn_alloc;
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 4d72c9a32026e..000d05e80352a 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -43,6 +43,7 @@
>  #include <drm/drm_atomic_helper.h>
>  #include <drm/drm_drv.h>
>  #include <drm/drm_edid.h>
> +#include <drm/drm_fixed.h>
>  #include <drm/drm_print.h>
>  #include <drm/drm_probe_helper.h>
>  
> @@ -3578,16 +3579,22 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
>   * value is in units of PBNs/(timeslots/1 MTP). This value can be used to
>   * convert the number of PBNs required for a given stream to the number of
>   * timeslots this stream requires in each MTP.
> + *
> + * Returns the BW / timeslot value in 20.12 fixed point format.
>   */
> -int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> -			     int link_rate, int link_lane_count)
> +fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> +				    int link_rate, int link_lane_count)
>  {
> +	fixed20_12 ret;
> +
>  	if (link_rate == 0 || link_lane_count == 0)
>  		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
>  			    link_rate, link_lane_count);
>  
>  	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> -	return link_rate * link_lane_count / 54000;
> +	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
> +
> +	return ret;
>  }
>  EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
>  
> @@ -4335,7 +4342,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
>  		}
>  	}
>  
> -	req_slots = DIV_ROUND_UP(pbn, topology_state->pbn_div);
> +	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
>  
>  	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
>  		       port->connector->base.id, port->connector->name,
> @@ -4872,7 +4879,8 @@ void drm_dp_mst_dump_topology(struct seq_file *m,
>  	state = to_drm_dp_mst_topology_state(mgr->base.state);
>  	seq_printf(m, "\n*** Atomic state info ***\n");
>  	seq_printf(m, "payload_mask: %x, max_payloads: %d, start_slot: %u, pbn_div: %d\n",
> -		   state->payload_mask, mgr->max_payloads, state->start_slot, state->pbn_div);
> +		   state->payload_mask, mgr->max_payloads, state->start_slot,
> +		   dfixed_trunc(state->pbn_div));
>  
>  	seq_printf(m, "\n| idx | port | vcpi | slots | pbn | dsc | status |     sink name     |\n");
>  	for (i = 0; i < mgr->max_payloads; i++) {
> @@ -5330,10 +5338,10 @@ drm_dp_mst_atomic_check_payload_alloc_limits(struct drm_dp_mst_topology_mgr *mgr
>  	}
>  
>  	if (!payload_count)
> -		mst_state->pbn_div = 0;
> +		mst_state->pbn_div.full = dfixed_const(0);
>  
>  	drm_dbg_atomic(mgr->dev, "[MST MGR:%p] mst state %p TU pbn_div=%d avail=%d used=%d\n",
> -		       mgr, mst_state, mst_state->pbn_div, avail_slots,
> +		       mgr, mst_state, dfixed_trunc(mst_state->pbn_div), avail_slots,
>  		       mst_state->total_avail_slots - avail_slots);
>  
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 0cb9405f59eaa..e5d6b811c22ef 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -26,6 +26,7 @@
>  #include <drm/drm_atomic.h>
>  #include <drm/drm_atomic_helper.h>
>  #include <drm/drm_edid.h>
> +#include <drm/drm_fixed.h>
>  #include <drm/drm_probe_helper.h>
>  
>  #include "i915_drv.h"
> @@ -202,7 +203,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
>  		 */
>  		drm_WARN_ON(&i915->drm, remote_m_n.tu < crtc_state->dp_m_n.tu);
>  		crtc_state->dp_m_n.tu = remote_m_n.tu;
> -		crtc_state->pbn = remote_m_n.tu * mst_state->pbn_div;
> +		crtc_state->pbn = remote_m_n.tu * dfixed_trunc(mst_state->pbn_div);
>  
>  		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
>  						      connector->port,
> diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
> index 493fe4660f651..11fe75b68e95c 100644
> --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
> +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
> @@ -40,6 +40,7 @@
>  #include <drm/drm_edid.h>
>  #include <drm/drm_eld.h>
>  #include <drm/drm_fb_helper.h>
> +#include <drm/drm_fixed.h>
>  #include <drm/drm_probe_helper.h>
>  #include <drm/drm_vblank.h>
>  
> @@ -946,7 +947,8 @@ nv50_msto_prepare(struct drm_atomic_state *state,
>  	if (ret == 0) {
>  		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index,
>  				      payload->vc_start_slot, payload->time_slots,
> -				      payload->pbn, payload->time_slots * mst_state->pbn_div);
> +				      payload->pbn,
> +				      payload->time_slots * dfixed_trunc(mst_state->pbn_div));
>  	} else {
>  		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0);
>  	}
> @@ -990,7 +992,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
>  	if (IS_ERR(mst_state))
>  		return PTR_ERR(mst_state);
>  
> -	if (!mst_state->pbn_div) {
> +	if (!mst_state->pbn_div.full) {
>  		struct nouveau_encoder *outp = mstc->mstm->outp;
>  
>  		mst_state->pbn_div = drm_dp_get_vc_payload_bw(&mstm->mgr,
> diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h
> index a4aad6df71f18..9b19d8bd520af 100644
> --- a/include/drm/display/drm_dp_mst_helper.h
> +++ b/include/drm/display/drm_dp_mst_helper.h
> @@ -25,6 +25,7 @@
>  #include <linux/types.h>
>  #include <drm/display/drm_dp_helper.h>
>  #include <drm/drm_atomic.h>
> +#include <drm/drm_fixed.h>
>  
>  #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
>  #include <linux/stackdepot.h>
> @@ -617,7 +618,7 @@ struct drm_dp_mst_topology_state {
>  	 * @pbn_div: The current PBN divisor for this topology. The driver is expected to fill this
>  	 * out itself.
>  	 */
> -	int pbn_div;
> +	fixed20_12 pbn_div;
>  };
>  
>  #define to_dp_mst_topology_mgr(x) container_of(x, struct drm_dp_mst_topology_mgr, base)
> @@ -839,8 +840,8 @@ struct edid *drm_dp_mst_get_edid(struct drm_connector *connector,
>  				 struct drm_dp_mst_topology_mgr *mgr,
>  				 struct drm_dp_mst_port *port);
>  
> -int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> -			     int link_rate, int link_lane_count);
> +fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> +				    int link_rate, int link_lane_count);
>  
>  int drm_dp_calc_pbn_mode(int clock, int bpp);
>  
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v2 01/11] drm/dp_mst: Store the MST PBN divider value in fixed point format

[Imre Deak]

On Fri, Nov 17, 2023 at 12:56:36PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 03:18:31PM +0200, Imre Deak wrote:
> > On UHBR links the PBN divider is a fractional number, accordingly store
> > it in fixed point format. For now drm_dp_get_vc_payload_bw() always
> > returns a whole number and all callers will use only the integer part of
> > it which should preserve the current behavior. The next patch will fix
> > drm_dp_get_vc_payload_bw() for UHBR rates returning a fractional number
> > for those (also accounting for the channel coding efficiency correctly).
> > 
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Alex Deucher <alexander.deucher@amd.com>
> > Cc: Wayne Lin <wayne.lin@amd.com>
> > Cc: amd-gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  5 +++--
> >  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  3 ++-
> >  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  5 +++--
> >  drivers/gpu/drm/display/drm_dp_mst_topology.c | 22 +++++++++++++------
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 ++-
> >  drivers/gpu/drm/nouveau/dispnv50/disp.c       |  6 +++--
> >  include/drm/display/drm_dp_mst_helper.h       |  7 +++---
> >  7 files changed, 33 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 74f9f02abcdec..12346b21d0b05 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -85,6 +85,7 @@
> >  #include <drm/drm_atomic_uapi.h>
> >  #include <drm/drm_atomic_helper.h>
> >  #include <drm/drm_blend.h>
> > +#include <drm/drm_fixed.h>
> >  #include <drm/drm_fourcc.h>
> >  #include <drm/drm_edid.h>
> >  #include <drm/drm_eld.h>
> > @@ -6909,8 +6910,8 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
> >  	if (IS_ERR(mst_state))
> >  		return PTR_ERR(mst_state);
> >  
> > -	if (!mst_state->pbn_div)
> > -		mst_state->pbn_div = dm_mst_get_pbn_divider(aconnector->mst_root->dc_link);
> > +	if (!mst_state->pbn_div.full)
> > +		mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));
> 
> Why doesn't that dfixed stuff return the correct type?

AFAICS a follow up change could make dfixed_init() return the correct
type and then change all

fp.full = dfixed_const(A)

to

fp = dfixed_init(A)

> 
> Anyways looks mostly mechanical
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> >  
> >  	if (!state->duplicated) {
> >  		int max_bpc = conn_state->max_requested_bpc;
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> > index ed784cf27d396..63024393b516e 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> > @@ -31,6 +31,7 @@
> >  #include <drm/drm_probe_helper.h>
> >  #include <drm/amdgpu_drm.h>
> >  #include <drm/drm_edid.h>
> > +#include <drm/drm_fixed.h>
> >  
> >  #include "dm_services.h"
> >  #include "amdgpu.h"
> > @@ -210,7 +211,7 @@ static void dm_helpers_construct_old_payload(
> >  			struct drm_dp_mst_atomic_payload *old_payload)
> >  {
> >  	struct drm_dp_mst_atomic_payload *pos;
> > -	int pbn_per_slot = mst_state->pbn_div;
> > +	int pbn_per_slot = dfixed_trunc(mst_state->pbn_div);
> >  	u8 next_payload_vc_start = mgr->next_start_slot;
> >  	u8 payload_vc_start = new_payload->vc_start_slot;
> >  	u8 allocated_time_slots;
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> > index 9a58e1a4c5f49..d1ba3ae228b08 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> > @@ -27,6 +27,7 @@
> >  #include <drm/display/drm_dp_mst_helper.h>
> >  #include <drm/drm_atomic.h>
> >  #include <drm/drm_atomic_helper.h>
> > +#include <drm/drm_fixed.h>
> >  #include "dm_services.h"
> >  #include "amdgpu.h"
> >  #include "amdgpu_dm.h"
> > @@ -941,10 +942,10 @@ static int increase_dsc_bpp(struct drm_atomic_state *state,
> >  		link_timeslots_used = 0;
> >  
> >  		for (i = 0; i < count; i++)
> > -			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, mst_state->pbn_div);
> > +			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, dfixed_trunc(mst_state->pbn_div));
> >  
> >  		fair_pbn_alloc =
> > -			(63 - link_timeslots_used) / remaining_to_increase * mst_state->pbn_div;
> > +			(63 - link_timeslots_used) / remaining_to_increase * dfixed_trunc(mst_state->pbn_div);
> >  
> >  		if (initial_slack[next_index] > fair_pbn_alloc) {
> >  			vars[next_index].pbn += fair_pbn_alloc;
> > diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > index 4d72c9a32026e..000d05e80352a 100644
> > --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > @@ -43,6 +43,7 @@
> >  #include <drm/drm_atomic_helper.h>
> >  #include <drm/drm_drv.h>
> >  #include <drm/drm_edid.h>
> > +#include <drm/drm_fixed.h>
> >  #include <drm/drm_print.h>
> >  #include <drm/drm_probe_helper.h>
> >  
> > @@ -3578,16 +3579,22 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
> >   * value is in units of PBNs/(timeslots/1 MTP). This value can be used to
> >   * convert the number of PBNs required for a given stream to the number of
> >   * timeslots this stream requires in each MTP.
> > + *
> > + * Returns the BW / timeslot value in 20.12 fixed point format.
> >   */
> > -int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> > -			     int link_rate, int link_lane_count)
> > +fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> > +				    int link_rate, int link_lane_count)
> >  {
> > +	fixed20_12 ret;
> > +
> >  	if (link_rate == 0 || link_lane_count == 0)
> >  		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
> >  			    link_rate, link_lane_count);
> >  
> >  	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> > -	return link_rate * link_lane_count / 54000;
> > +	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
> > +
> > +	return ret;
> >  }
> >  EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
> >  
> > @@ -4335,7 +4342,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
> >  		}
> >  	}
> >  
> > -	req_slots = DIV_ROUND_UP(pbn, topology_state->pbn_div);
> > +	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
> >  
> >  	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
> >  		       port->connector->base.id, port->connector->name,
> > @@ -4872,7 +4879,8 @@ void drm_dp_mst_dump_topology(struct seq_file *m,
> >  	state = to_drm_dp_mst_topology_state(mgr->base.state);
> >  	seq_printf(m, "\n*** Atomic state info ***\n");
> >  	seq_printf(m, "payload_mask: %x, max_payloads: %d, start_slot: %u, pbn_div: %d\n",
> > -		   state->payload_mask, mgr->max_payloads, state->start_slot, state->pbn_div);
> > +		   state->payload_mask, mgr->max_payloads, state->start_slot,
> > +		   dfixed_trunc(state->pbn_div));
> >  
> >  	seq_printf(m, "\n| idx | port | vcpi | slots | pbn | dsc | status |     sink name     |\n");
> >  	for (i = 0; i < mgr->max_payloads; i++) {
> > @@ -5330,10 +5338,10 @@ drm_dp_mst_atomic_check_payload_alloc_limits(struct drm_dp_mst_topology_mgr *mgr
> >  	}
> >  
> >  	if (!payload_count)
> > -		mst_state->pbn_div = 0;
> > +		mst_state->pbn_div.full = dfixed_const(0);
> >  
> >  	drm_dbg_atomic(mgr->dev, "[MST MGR:%p] mst state %p TU pbn_div=%d avail=%d used=%d\n",
> > -		       mgr, mst_state, mst_state->pbn_div, avail_slots,
> > +		       mgr, mst_state, dfixed_trunc(mst_state->pbn_div), avail_slots,
> >  		       mst_state->total_avail_slots - avail_slots);
> >  
> >  	return 0;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 0cb9405f59eaa..e5d6b811c22ef 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -26,6 +26,7 @@
> >  #include <drm/drm_atomic.h>
> >  #include <drm/drm_atomic_helper.h>
> >  #include <drm/drm_edid.h>
> > +#include <drm/drm_fixed.h>
> >  #include <drm/drm_probe_helper.h>
> >  
> >  #include "i915_drv.h"
> > @@ -202,7 +203,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> >  		 */
> >  		drm_WARN_ON(&i915->drm, remote_m_n.tu < crtc_state->dp_m_n.tu);
> >  		crtc_state->dp_m_n.tu = remote_m_n.tu;
> > -		crtc_state->pbn = remote_m_n.tu * mst_state->pbn_div;
> > +		crtc_state->pbn = remote_m_n.tu * dfixed_trunc(mst_state->pbn_div);
> >  
> >  		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
> >  						      connector->port,
> > diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
> > index 493fe4660f651..11fe75b68e95c 100644
> > --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
> > +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
> > @@ -40,6 +40,7 @@
> >  #include <drm/drm_edid.h>
> >  #include <drm/drm_eld.h>
> >  #include <drm/drm_fb_helper.h>
> > +#include <drm/drm_fixed.h>
> >  #include <drm/drm_probe_helper.h>
> >  #include <drm/drm_vblank.h>
> >  
> > @@ -946,7 +947,8 @@ nv50_msto_prepare(struct drm_atomic_state *state,
> >  	if (ret == 0) {
> >  		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index,
> >  				      payload->vc_start_slot, payload->time_slots,
> > -				      payload->pbn, payload->time_slots * mst_state->pbn_div);
> > +				      payload->pbn,
> > +				      payload->time_slots * dfixed_trunc(mst_state->pbn_div));
> >  	} else {
> >  		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0);
> >  	}
> > @@ -990,7 +992,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
> >  	if (IS_ERR(mst_state))
> >  		return PTR_ERR(mst_state);
> >  
> > -	if (!mst_state->pbn_div) {
> > +	if (!mst_state->pbn_div.full) {
> >  		struct nouveau_encoder *outp = mstc->mstm->outp;
> >  
> >  		mst_state->pbn_div = drm_dp_get_vc_payload_bw(&mstm->mgr,
> > diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h
> > index a4aad6df71f18..9b19d8bd520af 100644
> > --- a/include/drm/display/drm_dp_mst_helper.h
> > +++ b/include/drm/display/drm_dp_mst_helper.h
> > @@ -25,6 +25,7 @@
> >  #include <linux/types.h>
> >  #include <drm/display/drm_dp_helper.h>
> >  #include <drm/drm_atomic.h>
> > +#include <drm/drm_fixed.h>
> >  
> >  #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
> >  #include <linux/stackdepot.h>
> > @@ -617,7 +618,7 @@ struct drm_dp_mst_topology_state {
> >  	 * @pbn_div: The current PBN divisor for this topology. The driver is expected to fill this
> >  	 * out itself.
> >  	 */
> > -	int pbn_div;
> > +	fixed20_12 pbn_div;
> >  };
> >  
> >  #define to_dp_mst_topology_mgr(x) container_of(x, struct drm_dp_mst_topology_mgr, base)
> > @@ -839,8 +840,8 @@ struct edid *drm_dp_mst_get_edid(struct drm_connector *connector,
> >  				 struct drm_dp_mst_topology_mgr *mgr,
> >  				 struct drm_dp_mst_port *port);
> >  
> > -int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> > -			     int link_rate, int link_lane_count);
> > +fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> > +				    int link_rate, int link_lane_count);
> >  
> >  int drm_dp_calc_pbn_mode(int clock, int bpp);
> >  
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel

Re: [Intel-gfx] [PATCH v2 01/11] drm/dp_mst: Store the MST PBN divider value in fixed point format

[Imre Deak]

On Thu, Nov 16, 2023 at 03:18:31PM +0200, Imre Deak wrote:
[...]
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> index ed784cf27d396..63024393b516e 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> @@ -31,6 +31,7 @@
>  #include <drm/drm_probe_helper.h>
>  #include <drm/amdgpu_drm.h>
>  #include <drm/drm_edid.h>
> +#include <drm/drm_fixed.h>
>  
>  #include "dm_services.h"
>  #include "amdgpu.h"
> @@ -210,7 +211,7 @@ static void dm_helpers_construct_old_payload(
>  			struct drm_dp_mst_atomic_payload *old_payload)
>  {
>  	struct drm_dp_mst_atomic_payload *pos;
> -	int pbn_per_slot = mst_state->pbn_div;
> +	int pbn_per_slot = dfixed_trunc(mst_state->pbn_div);
>  	u8 next_payload_vc_start = mgr->next_start_slot;
>  	u8 payload_vc_start = new_payload->vc_start_slot;
>  	u8 allocated_time_slots;

I'm planning to merge this patchset today via drm-intel-next and for
that I'll need to rebase the above change to:

@@ -205,13 +206,14 @@ void dm_helpers_dp_update_branch_info(

 static void dm_helpers_construct_old_payload(
                        struct dc_link *link,
-                       int pbn_per_slot,
+                       fixed20_12 pbn_per_slot_fp,
                        struct drm_dp_mst_atomic_payload *new_payload,
                        struct drm_dp_mst_atomic_payload *old_payload)
 {
        struct link_mst_stream_allocation_table current_link_table =
                                                                        link->mst_stream_alloc_table;
        struct link_mst_stream_allocation *dc_alloc;
+       int pbn_per_slot = dfixed_trunc(pbn_per_slot_fp);
        int i;

        *old_payload = *new_payload;

and then apply the original changes in the patch above while merging
drm-intel-next to drm-tip. This is required due to

commit 9031e0013f819c ("drm/amd/display: Fix mst hub unplug warning")

being only in drm-misc-next, but not yet in drm-intel-next.

Let me know if you have a concern with this.

--Imre

[Intel-gfx] [PATCH v2 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Imre Deak]

The current way of calculating the pbn_div value, the link BW per each
MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
rates calculating with the correct channel coding efficiency based on
the link rate.

v2:
- Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().

Cc: Lyude Paul <lyude@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/display/drm_dp_mst_topology.c | 13 ++++++++++---
 include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 000d05e80352a..3fbd5585d5e6c 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
 fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
 				    int link_rate, int link_lane_count)
 {
+	int ch_coding_efficiency =
+		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
 	fixed20_12 ret;
 
 	if (link_rate == 0 || link_lane_count == 0)
 		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
 			    link_rate, link_lane_count);
 
-	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
-	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
+	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
+	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
+						  ch_coding_efficiency),
+				      (1000000ULL * 8 * 5400) >> 12);
 
 	return ret;
 }
@@ -4315,6 +4319,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
 	struct drm_dp_mst_atomic_payload *payload = NULL;
 	struct drm_connector_state *conn_state;
 	int prev_slots = 0, prev_bw = 0, req_slots;
+	fixed20_12 req_slots_fp;
 
 	topology_state = drm_atomic_get_mst_topology_state(state, mgr);
 	if (IS_ERR(topology_state))
@@ -4342,7 +4347,9 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
 		}
 	}
 
-	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
+	req_slots_fp.full = dfixed_div((fixed20_12)dfixed_init(pbn), topology_state->pbn_div);
+	req_slots_fp.full = dfixed_ceil(req_slots_fp);
+	req_slots = dfixed_trunc(req_slots_fp);
 
 	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
 		       port->connector->base.id, port->connector->name,
diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
index c5f1079acb3b1..863b2e7add29e 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
 	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
 }
 
+/**
+ * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
+ * @link_rate: link rate in 10kbits/s units
+ *
+ * Determine if the provided link rate is an UHBR rate.
+ *
+ * Returns: %True if @link_rate is an UHBR rate.
+ */
+static inline bool drm_dp_is_uhbr_rate(int link_rate)
+{
+	return link_rate >= 1000000;
+}
+
 /*
  * DisplayPort AUX channel
  */
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Ville Syrjälä]

On Thu, Nov 16, 2023 at 03:18:32PM +0200, Imre Deak wrote:
> The current way of calculating the pbn_div value, the link BW per each
> MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> rates calculating with the correct channel coding efficiency based on
> the link rate.
> 
> v2:
> - Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().
> 
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/display/drm_dp_mst_topology.c | 13 ++++++++++---
>  include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
>  2 files changed, 23 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 000d05e80352a..3fbd5585d5e6c 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
>  fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
>  				    int link_rate, int link_lane_count)
>  {
> +	int ch_coding_efficiency =
> +		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
>  	fixed20_12 ret;
>  
>  	if (link_rate == 0 || link_lane_count == 0)
>  		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
>  			    link_rate, link_lane_count);
>  
> -	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> -	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
> +	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> +	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
> +						  ch_coding_efficiency),
> +				      (1000000ULL * 8 * 5400) >> 12);

Seems to produce the correct numbers.

>  
>  	return ret;
>  }
> @@ -4315,6 +4319,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
>  	struct drm_dp_mst_atomic_payload *payload = NULL;
>  	struct drm_connector_state *conn_state;
>  	int prev_slots = 0, prev_bw = 0, req_slots;
> +	fixed20_12 req_slots_fp;
>  
>  	topology_state = drm_atomic_get_mst_topology_state(state, mgr);
>  	if (IS_ERR(topology_state))
> @@ -4342,7 +4347,9 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
>  		}
>  	}
>  
> -	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
> +	req_slots_fp.full = dfixed_div((fixed20_12)dfixed_init(pbn), topology_state->pbn_div);

dfixed_div() looks super dodgy. It seems to have some kind of hand
rolled round to closest behaviour, which would imply that this can
return a rounded down result.

> +	req_slots_fp.full = dfixed_ceil(req_slots_fp);
> +	req_slots = dfixed_trunc(req_slots_fp);
>  
>  	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
>  		       port->connector->base.id, port->connector->name,
> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
> index c5f1079acb3b1..863b2e7add29e 100644
> --- a/include/drm/display/drm_dp_helper.h
> +++ b/include/drm/display/drm_dp_helper.h
> @@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
>  	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
>  }
>  
> +/**
> + * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
> + * @link_rate: link rate in 10kbits/s units
> + *
> + * Determine if the provided link rate is an UHBR rate.
> + *
> + * Returns: %True if @link_rate is an UHBR rate.
> + */
> +static inline bool drm_dp_is_uhbr_rate(int link_rate)
> +{
> +	return link_rate >= 1000000;
> +}
> +
>  /*
>   * DisplayPort AUX channel
>   */
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v2 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Imre Deak]

On Fri, Nov 17, 2023 at 01:00:58PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 03:18:32PM +0200, Imre Deak wrote:
> > The current way of calculating the pbn_div value, the link BW per each
> > MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> > rates calculating with the correct channel coding efficiency based on
> > the link rate.
> > 
> > v2:
> > - Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().
> > 
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: dri-devel@lists.freedesktop.org
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/display/drm_dp_mst_topology.c | 13 ++++++++++---
> >  include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
> >  2 files changed, 23 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > index 000d05e80352a..3fbd5585d5e6c 100644
> > --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > @@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
> >  fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> >  				    int link_rate, int link_lane_count)
> >  {
> > +	int ch_coding_efficiency =
> > +		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
> >  	fixed20_12 ret;
> >  
> >  	if (link_rate == 0 || link_lane_count == 0)
> >  		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
> >  			    link_rate, link_lane_count);
> >  
> > -	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> > -	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
> > +	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> > +	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
> > +						  ch_coding_efficiency),
> > +				      (1000000ULL * 8 * 5400) >> 12);
> 
> Seems to produce the correct numbers.
> 
> >  
> >  	return ret;
> >  }
> > @@ -4315,6 +4319,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
> >  	struct drm_dp_mst_atomic_payload *payload = NULL;
> >  	struct drm_connector_state *conn_state;
> >  	int prev_slots = 0, prev_bw = 0, req_slots;
> > +	fixed20_12 req_slots_fp;
> >  
> >  	topology_state = drm_atomic_get_mst_topology_state(state, mgr);
> >  	if (IS_ERR(topology_state))
> > @@ -4342,7 +4347,9 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
> >  		}
> >  	}
> >  
> > -	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
> > +	req_slots_fp.full = dfixed_div((fixed20_12)dfixed_init(pbn), topology_state->pbn_div);
> 
> dfixed_div() looks super dodgy. It seems to have some kind of hand
> rolled round to closest behaviour, which would imply that this can
> return a rounded down result.

Yes, dfixed_ceil(dfixed_div(..)) doesn't actually round up the result,
thanks for spotting that. It should be instead:

	req_slots = DIV_ROUND_UP(dfixed_const(pbn), topology_state->pbn_div.full);

Fixing the division similarly in patch 8.

> 
> > +	req_slots_fp.full = dfixed_ceil(req_slots_fp);
> > +	req_slots = dfixed_trunc(req_slots_fp);
> >  
> >  	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
> >  		       port->connector->base.id, port->connector->name,
> > diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
> > index c5f1079acb3b1..863b2e7add29e 100644
> > --- a/include/drm/display/drm_dp_helper.h
> > +++ b/include/drm/display/drm_dp_helper.h
> > @@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
> >  	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
> >  }
> >  
> > +/**
> > + * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
> > + * @link_rate: link rate in 10kbits/s units
> > + *
> > + * Determine if the provided link rate is an UHBR rate.
> > + *
> > + * Returns: %True if @link_rate is an UHBR rate.
> > + */
> > +static inline bool drm_dp_is_uhbr_rate(int link_rate)
> > +{
> > +	return link_rate >= 1000000;
> > +}
> > +
> >  /*
> >   * DisplayPort AUX channel
> >   */
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel

[Intel-gfx] [PATCH v3 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Imre Deak]

The current way of calculating the pbn_div value, the link BW per each
MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
rates calculating with the correct channel coding efficiency based on
the link rate.

v2:
- Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().
v3:
- Fix rounding up quotient while calculating req_slots. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/display/drm_dp_mst_topology.c | 10 +++++++---
 include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 000d05e80352a..8ca01a6bf645d 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
 fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
 				    int link_rate, int link_lane_count)
 {
+	int ch_coding_efficiency =
+		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
 	fixed20_12 ret;
 
 	if (link_rate == 0 || link_lane_count == 0)
 		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
 			    link_rate, link_lane_count);
 
-	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
-	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
+	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
+	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
+						  ch_coding_efficiency),
+				      (1000000ULL * 8 * 5400) >> 12);
 
 	return ret;
 }
@@ -4342,7 +4346,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
 		}
 	}
 
-	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
+	req_slots = DIV_ROUND_UP(dfixed_const(pbn), topology_state->pbn_div.full);
 
 	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
 		       port->connector->base.id, port->connector->name,
diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
index c5f1079acb3b1..863b2e7add29e 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
 	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
 }
 
+/**
+ * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
+ * @link_rate: link rate in 10kbits/s units
+ *
+ * Determine if the provided link rate is an UHBR rate.
+ *
+ * Returns: %True if @link_rate is an UHBR rate.
+ */
+static inline bool drm_dp_is_uhbr_rate(int link_rate)
+{
+	return link_rate >= 1000000;
+}
+
 /*
  * DisplayPort AUX channel
  */
-- 
2.39.2

Re: [Intel-gfx] [PATCH v3 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Ville Syrjälä]

On Fri, Nov 17, 2023 at 05:09:27PM +0200, Imre Deak wrote:
> The current way of calculating the pbn_div value, the link BW per each
> MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> rates calculating with the correct channel coding efficiency based on
> the link rate.
> 
> v2:
> - Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().
> v3:
> - Fix rounding up quotient while calculating req_slots. (Ville)
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/display/drm_dp_mst_topology.c | 10 +++++++---
>  include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
>  2 files changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 000d05e80352a..8ca01a6bf645d 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
>  fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
>  				    int link_rate, int link_lane_count)
>  {
> +	int ch_coding_efficiency =
> +		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
>  	fixed20_12 ret;
>  
>  	if (link_rate == 0 || link_lane_count == 0)
>  		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
>  			    link_rate, link_lane_count);
>  
> -	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> -	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
> +	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> +	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
> +						  ch_coding_efficiency),
> +				      (1000000ULL * 8 * 5400) >> 12);
>  
>  	return ret;
>  }
> @@ -4342,7 +4346,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
>  		}
>  	}
>  
> -	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
> +	req_slots = DIV_ROUND_UP(dfixed_const(pbn), topology_state->pbn_div.full);
>  
>  	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
>  		       port->connector->base.id, port->connector->name,
> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
> index c5f1079acb3b1..863b2e7add29e 100644
> --- a/include/drm/display/drm_dp_helper.h
> +++ b/include/drm/display/drm_dp_helper.h
> @@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
>  	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
>  }
>  
> +/**
> + * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
> + * @link_rate: link rate in 10kbits/s units
> + *
> + * Determine if the provided link rate is an UHBR rate.
> + *
> + * Returns: %True if @link_rate is an UHBR rate.
> + */
> +static inline bool drm_dp_is_uhbr_rate(int link_rate)
> +{
> +	return link_rate >= 1000000;
> +}
> +
>  /*
>   * DisplayPort AUX channel
>   */
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v3 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Rodrigo Vivi]

On Fri, Nov 17, 2023 at 06:21:07PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 05:09:27PM +0200, Imre Deak wrote:
> > The current way of calculating the pbn_div value, the link BW per each
> > MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> > rates calculating with the correct channel coding efficiency based on
> > the link rate.
> > 
> > v2:
> > - Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().
> > v3:
> > - Fix rounding up quotient while calculating req_slots. (Ville)
> > 
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: dri-devel@lists.freedesktop.org
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Dave, Sima, it looks like this whole series is ready for getting merged:

https://patchwork.freedesktop.org/series/126526/

But it has these 3 drm/dp_mst here.
Ack to merge them through drm-intel?

> 
> > ---
> >  drivers/gpu/drm/display/drm_dp_mst_topology.c | 10 +++++++---
> >  include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
> >  2 files changed, 20 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > index 000d05e80352a..8ca01a6bf645d 100644
> > --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > @@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
> >  fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> >  				    int link_rate, int link_lane_count)
> >  {
> > +	int ch_coding_efficiency =
> > +		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
> >  	fixed20_12 ret;
> >  
> >  	if (link_rate == 0 || link_lane_count == 0)
> >  		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
> >  			    link_rate, link_lane_count);
> >  
> > -	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> > -	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
> > +	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
> > +	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
> > +						  ch_coding_efficiency),
> > +				      (1000000ULL * 8 * 5400) >> 12);
> >  
> >  	return ret;
> >  }
> > @@ -4342,7 +4346,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
> >  		}
> >  	}
> >  
> > -	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
> > +	req_slots = DIV_ROUND_UP(dfixed_const(pbn), topology_state->pbn_div.full);
> >  
> >  	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
> >  		       port->connector->base.id, port->connector->name,
> > diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
> > index c5f1079acb3b1..863b2e7add29e 100644
> > --- a/include/drm/display/drm_dp_helper.h
> > +++ b/include/drm/display/drm_dp_helper.h
> > @@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
> >  	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
> >  }
> >  
> > +/**
> > + * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
> > + * @link_rate: link rate in 10kbits/s units
> > + *
> > + * Determine if the provided link rate is an UHBR rate.
> > + *
> > + * Returns: %True if @link_rate is an UHBR rate.
> > + */
> > +static inline bool drm_dp_is_uhbr_rate(int link_rate)
> > +{
> > +	return link_rate >= 1000000;
> > +}
> > +
> >  /*
> >   * DisplayPort AUX channel
> >   */
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel

Re: [Intel-gfx] [PATCH v3 02/11] drm/dp_mst: Fix PBN divider calculation for UHBR rates

[Maarten Lankhorst]

On 2023-11-17 20:40, Rodrigo Vivi wrote:
> On Fri, Nov 17, 2023 at 06:21:07PM +0200, Ville Syrjälä wrote:
>> On Fri, Nov 17, 2023 at 05:09:27PM +0200, Imre Deak wrote:
>>> The current way of calculating the pbn_div value, the link BW per each
>>> MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
>>> rates calculating with the correct channel coding efficiency based on
>>> the link rate.
>>>
>>> v2:
>>> - Return the fractional pbn_div value from drm_dp_get_vc_payload_bw().
>>> v3:
>>> - Fix rounding up quotient while calculating req_slots. (Ville)
>>>
>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> Cc: Lyude Paul <lyude@redhat.com>
>>> Cc: dri-devel@lists.freedesktop.org
>>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>>
>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dave, Sima, it looks like this whole series is ready for getting merged:
> 
> https://patchwork.freedesktop.org/series/126526/
> 
> But it has these 3 drm/dp_mst here.
> Ack to merge them through drm-intel?
Well, as drm-misc maintainer:

Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

> 
>>
>>> ---
>>>   drivers/gpu/drm/display/drm_dp_mst_topology.c | 10 +++++++---
>>>   include/drm/display/drm_dp_helper.h           | 13 +++++++++++++
>>>   2 files changed, 20 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
>>> index 000d05e80352a..8ca01a6bf645d 100644
>>> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
>>> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
>>> @@ -3585,14 +3585,18 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
>>>   fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
>>>   				    int link_rate, int link_lane_count)
>>>   {
>>> +	int ch_coding_efficiency =
>>> +		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));
>>>   	fixed20_12 ret;
>>>   
>>>   	if (link_rate == 0 || link_lane_count == 0)
>>>   		drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d / %d)\n",
>>>   			    link_rate, link_lane_count);
>>>   
>>> -	/* See DP v2.0 2.6.4.2, VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
>>> -	ret.full = dfixed_const(link_rate * link_lane_count / 54000);
>>> +	/* See DP v2.0 2.6.4.2, 2.7.6.3 VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
>>> +	ret.full = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_rate * link_lane_count,
>>> +						  ch_coding_efficiency),
>>> +				      (1000000ULL * 8 * 5400) >> 12);
>>>   
>>>   	return ret;
>>>   }
>>> @@ -4342,7 +4346,7 @@ int drm_dp_atomic_find_time_slots(struct drm_atomic_state *state,
>>>   		}
>>>   	}
>>>   
>>> -	req_slots = DIV_ROUND_UP(pbn, dfixed_trunc(topology_state->pbn_div));
>>> +	req_slots = DIV_ROUND_UP(dfixed_const(pbn), topology_state->pbn_div.full);
>>>   
>>>   	drm_dbg_atomic(mgr->dev, "[CONNECTOR:%d:%s] [MST PORT:%p] TU %d -> %d\n",
>>>   		       port->connector->base.id, port->connector->name,
>>> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
>>> index c5f1079acb3b1..863b2e7add29e 100644
>>> --- a/include/drm/display/drm_dp_helper.h
>>> +++ b/include/drm/display/drm_dp_helper.h
>>> @@ -252,6 +252,19 @@ drm_edp_backlight_supported(const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
>>>   	return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
>>>   }
>>>   
>>> +/**
>>> + * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
>>> + * @link_rate: link rate in 10kbits/s units
>>> + *
>>> + * Determine if the provided link rate is an UHBR rate.
>>> + *
>>> + * Returns: %True if @link_rate is an UHBR rate.
>>> + */
>>> +static inline bool drm_dp_is_uhbr_rate(int link_rate)
>>> +{
>>> +	return link_rate >= 1000000;
>>> +}
>>> +
>>>   /*
>>>    * DisplayPort AUX channel
>>>    */
>>> -- 
>>> 2.39.2
>>
>> -- 
>> Ville Syrjälä
>> Intel

[Intel-gfx] [PATCH v2 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Imre Deak]

Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
and UHBR link configurations.

Cc: Lyude Paul <lyude@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
 1 file changed, 145 insertions(+)

diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
index e3c818dfc0e6d..cafb463124f71 100644
--- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
+++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
@@ -68,6 +68,150 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
 KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
 		  dp_mst_calc_pbn_mode_desc);
 
+struct drm_dp_mst_calc_pbn_div_test {
+	int link_rate;
+	int lane_count;
+	fixed20_12 expected;
+};
+
+#define fp_init(__int, __frac) { \
+	.full = (__int) * (1 << 12) + \
+		(__frac) * (1 << 12) / 100000 \
+}
+
+static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
+	/*
+	 * DP1.4 rates:
+	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
+	 * UHBR rates:
+	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
+	 * truncated to 5 decimal places.
+	 */
+	{
+		.link_rate = 162000,
+		.lane_count = 1,
+		.expected = fp_init(3, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 2,
+		.expected = fp_init(6, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 4,
+		.expected = fp_init(12, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 1,
+		.expected = fp_init(5, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 2,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 4,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 1,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 2,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 4,
+		.expected = fp_init(40, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 1,
+		.expected = fp_init(15, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 2,
+		.expected = fp_init(30, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 4,
+		.expected = fp_init(60, 0),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 1,
+		.expected = fp_init(22, 38657),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 2,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 4,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 1,
+		.expected = fp_init(30, 22187),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 2,
+		.expected = fp_init(60, 44375),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 4,
+		.expected = fp_init(120, 88750),
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 1,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 2,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 4,
+		.expected = fp_init(179,  9259),  /* 179.09259 */
+	},
+};
+
+static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
+{
+	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
+	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
+	struct drm_dp_mst_topology_mgr mgr = {};
+
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
+			params->expected.full);
+}
+
+static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
+{
+	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
+}
+
+KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
+		  dp_mst_calc_pbn_div_desc);
+
 static u8 data[] = { 0xff, 0x00, 0xdd };
 
 struct drm_dp_mst_sideband_msg_req_test {
@@ -416,6 +560,7 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
 
 static struct kunit_case drm_dp_mst_helper_tests[] = {
 	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
+	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
 	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
 			 drm_dp_mst_sideband_msg_req_gen_params),
 	{ }
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Ville Syrjälä]

On Thu, Nov 16, 2023 at 03:18:33PM +0200, Imre Deak wrote:
> Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
> and UHBR link configurations.
> 
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
>  1 file changed, 145 insertions(+)
> 
> diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> index e3c818dfc0e6d..cafb463124f71 100644
> --- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> +++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> @@ -68,6 +68,150 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
>  KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
>  		  dp_mst_calc_pbn_mode_desc);
>  
> +struct drm_dp_mst_calc_pbn_div_test {
> +	int link_rate;
> +	int lane_count;
> +	fixed20_12 expected;
> +};
> +
> +#define fp_init(__int, __frac) { \
> +	.full = (__int) * (1 << 12) + \
> +		(__frac) * (1 << 12) / 100000 \
> +}
> +
> +static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
> +	/*
> +	 * DP1.4 rates:
> +	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
> +	 * UHBR rates:
> +	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
> +	 * truncated to 5 decimal places.
> +	 */
> +	{
> +		.link_rate = 162000,
> +		.lane_count = 1,
> +		.expected = fp_init(3, 0),
> +	},

Would be nice to sort this to match the tables in the spec.
A bit hard to do a quick visual comparison now.

> +	{
> +		.link_rate = 162000,
> +		.lane_count = 2,
> +		.expected = fp_init(6, 0),
> +	},
> +	{
> +		.link_rate = 162000,
> +		.lane_count = 4,
> +		.expected = fp_init(12, 0),
> +	},
> +	{
> +		.link_rate = 270000,
> +		.lane_count = 1,
> +		.expected = fp_init(5, 0),
> +	},
> +	{
> +		.link_rate = 270000,
> +		.lane_count = 2,
> +		.expected = fp_init(10, 0),
> +	},
> +	{
> +		.link_rate = 270000,
> +		.lane_count = 4,
> +		.expected = fp_init(20, 0),
> +	},
> +	{
> +		.link_rate = 540000,
> +		.lane_count = 1,
> +		.expected = fp_init(10, 0),
> +	},
> +	{
> +		.link_rate = 540000,
> +		.lane_count = 2,
> +		.expected = fp_init(20, 0),
> +	},
> +	{
> +		.link_rate = 540000,
> +		.lane_count = 4,
> +		.expected = fp_init(40, 0),
> +	},
> +	{
> +		.link_rate = 810000,
> +		.lane_count = 1,
> +		.expected = fp_init(15, 0),
> +	},
> +	{
> +		.link_rate = 810000,
> +		.lane_count = 2,
> +		.expected = fp_init(30, 0),
> +	},
> +	{
> +		.link_rate = 810000,
> +		.lane_count = 4,
> +		.expected = fp_init(60, 0),
> +	},
> +	{
> +		.link_rate = 1000000,
> +		.lane_count = 1,
> +		.expected = fp_init(22, 38657),
> +	},
> +	{
> +		.link_rate = 1000000,
> +		.lane_count = 2,
> +		.expected = fp_init(44, 77314),
> +	},
> +	{
> +		.link_rate = 1000000,
> +		.lane_count = 4,
> +		.expected = fp_init(89, 54629),
> +	},
> +	{
> +		.link_rate = 1350000,
> +		.lane_count = 1,
> +		.expected = fp_init(30, 22187),
> +	},
> +	{
> +		.link_rate = 1350000,
> +		.lane_count = 2,
> +		.expected = fp_init(60, 44375),
> +	},
> +	{
> +		.link_rate = 1350000,
> +		.lane_count = 4,
> +		.expected = fp_init(120, 88750),
> +	},
> +	{
> +		.link_rate = 2000000,
> +		.lane_count = 1,
> +		.expected = fp_init(44, 77314),
> +	},
> +	{
> +		.link_rate = 2000000,
> +		.lane_count = 2,
> +		.expected = fp_init(89, 54629),
> +	},
> +	{
> +		.link_rate = 2000000,
> +		.lane_count = 4,
> +		.expected = fp_init(179,  9259),  /* 179.09259 */
> +	},
> +};
> +
> +static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
> +{
> +	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
> +	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
> +	struct drm_dp_mst_topology_mgr mgr = {};
> +
> +	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
> +			params->expected.full);
> +}
> +
> +static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
> +{
> +	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
> +}
> +
> +KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
> +		  dp_mst_calc_pbn_div_desc);
> +
>  static u8 data[] = { 0xff, 0x00, 0xdd };
>  
>  struct drm_dp_mst_sideband_msg_req_test {
> @@ -416,6 +560,7 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
>  
>  static struct kunit_case drm_dp_mst_helper_tests[] = {
>  	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
> +	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
>  	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
>  			 drm_dp_mst_sideband_msg_req_gen_params),
>  	{ }
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v2 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Imre Deak]

On Fri, Nov 17, 2023 at 01:04:02PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 03:18:33PM +0200, Imre Deak wrote:
> > Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
> > and UHBR link configurations.
> > 
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: dri-devel@lists.freedesktop.org
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
> >  1 file changed, 145 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> > index e3c818dfc0e6d..cafb463124f71 100644
> > --- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> > +++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> > @@ -68,6 +68,150 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
> >  KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
> >  		  dp_mst_calc_pbn_mode_desc);
> >  
> > +struct drm_dp_mst_calc_pbn_div_test {
> > +	int link_rate;
> > +	int lane_count;
> > +	fixed20_12 expected;
> > +};
> > +
> > +#define fp_init(__int, __frac) { \
> > +	.full = (__int) * (1 << 12) + \
> > +		(__frac) * (1 << 12) / 100000 \
> > +}
> > +
> > +static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
> > +	/*
> > +	 * DP1.4 rates:
> > +	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
> > +	 * UHBR rates:
> > +	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
> > +	 * truncated to 5 decimal places.
> > +	 */
> > +	{
> > +		.link_rate = 162000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(3, 0),
> > +	},
> 
> Would be nice to sort this to match the tables in the spec.
> A bit hard to do a quick visual comparison now.

Ok, makes sense.

> > +	{
> > +		.link_rate = 162000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(6, 0),
> > +	},
> > +	{
> > +		.link_rate = 162000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(12, 0),
> > +	},
> > +	{
> > +		.link_rate = 270000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(5, 0),
> > +	},
> > +	{
> > +		.link_rate = 270000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(10, 0),
> > +	},
> > +	{
> > +		.link_rate = 270000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(20, 0),
> > +	},
> > +	{
> > +		.link_rate = 540000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(10, 0),
> > +	},
> > +	{
> > +		.link_rate = 540000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(20, 0),
> > +	},
> > +	{
> > +		.link_rate = 540000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(40, 0),
> > +	},
> > +	{
> > +		.link_rate = 810000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(15, 0),
> > +	},
> > +	{
> > +		.link_rate = 810000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(30, 0),
> > +	},
> > +	{
> > +		.link_rate = 810000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(60, 0),
> > +	},
> > +	{
> > +		.link_rate = 1000000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(22, 38657),
> > +	},
> > +	{
> > +		.link_rate = 1000000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(44, 77314),
> > +	},
> > +	{
> > +		.link_rate = 1000000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(89, 54629),
> > +	},
> > +	{
> > +		.link_rate = 1350000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(30, 22187),
> > +	},
> > +	{
> > +		.link_rate = 1350000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(60, 44375),
> > +	},
> > +	{
> > +		.link_rate = 1350000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(120, 88750),
> > +	},
> > +	{
> > +		.link_rate = 2000000,
> > +		.lane_count = 1,
> > +		.expected = fp_init(44, 77314),
> > +	},
> > +	{
> > +		.link_rate = 2000000,
> > +		.lane_count = 2,
> > +		.expected = fp_init(89, 54629),
> > +	},
> > +	{
> > +		.link_rate = 2000000,
> > +		.lane_count = 4,
> > +		.expected = fp_init(179,  9259),  /* 179.09259 */
> > +	},
> > +};
> > +
> > +static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
> > +{
> > +	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
> > +	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
> > +	struct drm_dp_mst_topology_mgr mgr = {};
> > +
> > +	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
> > +			params->expected.full);
> > +}
> > +
> > +static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
> > +{
> > +	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
> > +}
> > +
> > +KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
> > +		  dp_mst_calc_pbn_div_desc);
> > +
> >  static u8 data[] = { 0xff, 0x00, 0xdd };
> >  
> >  struct drm_dp_mst_sideband_msg_req_test {
> > @@ -416,6 +560,7 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
> >  
> >  static struct kunit_case drm_dp_mst_helper_tests[] = {
> >  	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
> > +	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
> >  	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
> >  			 drm_dp_mst_sideband_msg_req_gen_params),
> >  	{ }
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel

[Intel-gfx] [PATCH v3 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Imre Deak]

Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
and UHBR link configurations.

v2:
- List test cases in decreasing rate,lane count order matching the
  corresponding DP Standard tables. (Ville)
- Add references to the DP Standard tables.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 146 ++++++++++++++++++
 1 file changed, 146 insertions(+)

diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
index e3c818dfc0e6d..df3f703e4f09a 100644
--- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
+++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
@@ -68,6 +68,151 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
 KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
 		  dp_mst_calc_pbn_mode_desc);
 
+struct drm_dp_mst_calc_pbn_div_test {
+	int link_rate;
+	int lane_count;
+	fixed20_12 expected;
+};
+
+#define fp_init(__int, __frac) { \
+	.full = (__int) * (1 << 12) + \
+		(__frac) * (1 << 12) / 100000 \
+}
+
+static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
+	/*
+	 * UHBR rates: (DP Standard v2.1 2.7.6.3)
+	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
+	 * DP1.4 rates: (DP Standard v2.1 2.6.4.2)
+	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
+	 *
+	 * truncated to 5 decimal places.
+	 */
+	{
+		.link_rate = 2000000,
+		.lane_count = 4,
+		.expected = fp_init(179,  9259),  /* 179.09259 */
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 2,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 1,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 4,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 2,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 1,
+		.expected = fp_init(22, 38657),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 4,
+		.expected = fp_init(120, 88750),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 2,
+		.expected = fp_init(60, 44375),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 1,
+		.expected = fp_init(30, 22187),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 4,
+		.expected = fp_init(60, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 2,
+		.expected = fp_init(30, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 1,
+		.expected = fp_init(15, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 4,
+		.expected = fp_init(40, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 2,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 1,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 4,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 2,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 1,
+		.expected = fp_init(5, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 4,
+		.expected = fp_init(12, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 2,
+		.expected = fp_init(6, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 1,
+		.expected = fp_init(3, 0),
+	},
+};
+
+static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
+{
+	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
+	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
+	struct drm_dp_mst_topology_mgr mgr = {};
+
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
+			params->expected.full);
+}
+
+static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
+{
+	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
+}
+
+KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
+		  dp_mst_calc_pbn_div_desc);
+
 static u8 data[] = { 0xff, 0x00, 0xdd };
 
 struct drm_dp_mst_sideband_msg_req_test {
@@ -416,6 +561,7 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
 
 static struct kunit_case drm_dp_mst_helper_tests[] = {
 	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
+	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
 	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
 			 drm_dp_mst_sideband_msg_req_gen_params),
 	{ }
-- 
2.39.2

[Intel-gfx] [PATCH v4 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Imre Deak]

Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
and UHBR link configurations.

v2:
- List test cases in decreasing rate,lane count order matching the
  corresponding DP Standard tables. (Ville)
- Add references to the DP Standard tables.
v3:
- Sort the testcases properly.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 147 ++++++++++++++++++
 1 file changed, 147 insertions(+)

diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
index e3c818dfc0e6d..98d57d28aab6f 100644
--- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
+++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
@@ -68,6 +68,152 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
 KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
 		  dp_mst_calc_pbn_mode_desc);
 
+struct drm_dp_mst_calc_pbn_div_test {
+	int link_rate;
+	int lane_count;
+	fixed20_12 expected;
+};
+
+#define fp_init(__int, __frac) { \
+	.full = (__int) * (1 << 12) + \
+		(__frac) * (1 << 12) / 100000 \
+}
+
+static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
+	/*
+	 * UHBR rates (DP Standard v2.1 2.7.6.3, specifying the rounded to
+	 *             closest value to 2 decimal places):
+	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
+	 * DP1.4 rates (DP Standard v2.1 2.6.4.2):
+	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
+	 *
+	 * truncated to 5 decimal places.
+	 */
+	{
+		.link_rate = 2000000,
+		.lane_count = 4,
+		.expected = fp_init(179,  9259),  /* 179.09259 */
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 2,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 1,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 4,
+		.expected = fp_init(120, 88750),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 2,
+		.expected = fp_init(60, 44375),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 1,
+		.expected = fp_init(30, 22187),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 4,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 2,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 1,
+		.expected = fp_init(22, 38657),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 4,
+		.expected = fp_init(60, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 2,
+		.expected = fp_init(30, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 1,
+		.expected = fp_init(15, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 4,
+		.expected = fp_init(40, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 2,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 1,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 4,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 2,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 1,
+		.expected = fp_init(5, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 4,
+		.expected = fp_init(12, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 2,
+		.expected = fp_init(6, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 1,
+		.expected = fp_init(3, 0),
+	},
+};
+
+static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
+{
+	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
+	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
+	struct drm_dp_mst_topology_mgr mgr = {};
+
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
+			params->expected.full);
+}
+
+static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
+{
+	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
+}
+
+KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
+		  dp_mst_calc_pbn_div_desc);
+
 static u8 data[] = { 0xff, 0x00, 0xdd };
 
 struct drm_dp_mst_sideband_msg_req_test {
@@ -416,6 +562,7 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
 
 static struct kunit_case drm_dp_mst_helper_tests[] = {
 	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
+	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
 	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
 			 drm_dp_mst_sideband_msg_req_gen_params),
 	{ }
-- 
2.39.2

Re: [Intel-gfx] [PATCH v4 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Ville Syrjälä]

On Fri, Nov 17, 2023 at 05:27:37PM +0200, Imre Deak wrote:
> Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
> and UHBR link configurations.
> 
> v2:
> - List test cases in decreasing rate,lane count order matching the
>   corresponding DP Standard tables. (Ville)
> - Add references to the DP Standard tables.
> v3:
> - Sort the testcases properly.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 147 ++++++++++++++++++
>  1 file changed, 147 insertions(+)
> 
> diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> index e3c818dfc0e6d..98d57d28aab6f 100644
> --- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> +++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
> @@ -68,6 +68,152 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
>  KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
>  		  dp_mst_calc_pbn_mode_desc);
>  
> +struct drm_dp_mst_calc_pbn_div_test {
> +	int link_rate;
> +	int lane_count;
> +	fixed20_12 expected;
> +};
> +
> +#define fp_init(__int, __frac) { \
> +	.full = (__int) * (1 << 12) + \
> +		(__frac) * (1 << 12) / 100000 \
> +}
> +
> +static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
> +	/*
> +	 * UHBR rates (DP Standard v2.1 2.7.6.3, specifying the rounded to
> +	 *             closest value to 2 decimal places):
> +	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
> +	 * DP1.4 rates (DP Standard v2.1 2.6.4.2):
> +	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
> +	 *
> +	 * truncated to 5 decimal places.
> +	 */
> +	{
> +		.link_rate = 2000000,
> +		.lane_count = 4,
> +		.expected = fp_init(179,  9259),  /* 179.09259 */
> +	},
> +	{
> +		.link_rate = 2000000,
> +		.lane_count = 2,
> +		.expected = fp_init(89, 54629),
> +	},
> +	{
> +		.link_rate = 2000000,
> +		.lane_count = 1,
> +		.expected = fp_init(44, 77314),
> +	},
> +	{
> +		.link_rate = 1350000,
> +		.lane_count = 4,
> +		.expected = fp_init(120, 88750),
> +	},
> +	{
> +		.link_rate = 1350000,
> +		.lane_count = 2,
> +		.expected = fp_init(60, 44375),
> +	},
> +	{
> +		.link_rate = 1350000,
> +		.lane_count = 1,
> +		.expected = fp_init(30, 22187),
> +	},
> +	{
> +		.link_rate = 1000000,
> +		.lane_count = 4,
> +		.expected = fp_init(89, 54629),
> +	},
> +	{
> +		.link_rate = 1000000,
> +		.lane_count = 2,
> +		.expected = fp_init(44, 77314),
> +	},
> +	{
> +		.link_rate = 1000000,
> +		.lane_count = 1,
> +		.expected = fp_init(22, 38657),
> +	},
> +	{
> +		.link_rate = 810000,
> +		.lane_count = 4,
> +		.expected = fp_init(60, 0),
> +	},
> +	{
> +		.link_rate = 810000,
> +		.lane_count = 2,
> +		.expected = fp_init(30, 0),
> +	},
> +	{
> +		.link_rate = 810000,
> +		.lane_count = 1,
> +		.expected = fp_init(15, 0),
> +	},
> +	{
> +		.link_rate = 540000,
> +		.lane_count = 4,
> +		.expected = fp_init(40, 0),
> +	},
> +	{
> +		.link_rate = 540000,
> +		.lane_count = 2,
> +		.expected = fp_init(20, 0),
> +	},
> +	{
> +		.link_rate = 540000,
> +		.lane_count = 1,
> +		.expected = fp_init(10, 0),
> +	},
> +	{
> +		.link_rate = 270000,
> +		.lane_count = 4,
> +		.expected = fp_init(20, 0),
> +	},
> +	{
> +		.link_rate = 270000,
> +		.lane_count = 2,
> +		.expected = fp_init(10, 0),
> +	},
> +	{
> +		.link_rate = 270000,
> +		.lane_count = 1,
> +		.expected = fp_init(5, 0),
> +	},
> +	{
> +		.link_rate = 162000,
> +		.lane_count = 4,
> +		.expected = fp_init(12, 0),
> +	},
> +	{
> +		.link_rate = 162000,
> +		.lane_count = 2,
> +		.expected = fp_init(6, 0),
> +	},
> +	{
> +		.link_rate = 162000,
> +		.lane_count = 1,
> +		.expected = fp_init(3, 0),
> +	},
> +};
> +
> +static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
> +{
> +	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
> +	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
> +	struct drm_dp_mst_topology_mgr mgr = {};
> +
> +	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
> +			params->expected.full);
> +}
> +
> +static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
> +{
> +	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
> +}
> +
> +KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
> +		  dp_mst_calc_pbn_div_desc);
> +
>  static u8 data[] = { 0xff, 0x00, 0xdd };
>  
>  struct drm_dp_mst_sideband_msg_req_test {
> @@ -416,6 +562,7 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
>  
>  static struct kunit_case drm_dp_mst_helper_tests[] = {
>  	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
> +	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
>  	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
>  			 drm_dp_mst_sideband_msg_req_gen_params),
>  	{ }
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

[Intel-gfx] [PATCH v5 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[Imre Deak]

Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
and UHBR link configurations.

v2:
- List test cases in decreasing rate,lane count order matching the
  corresponding DP Standard tables. (Ville)
- Add references to the DP Standard tables.
v3:
- Sort the testcases properly.
v4:
- Avoid 'stack frame size x exceeds limit y in
  drm_test_dp_mst_calc_pbn_div()' compiler warn. (LKP)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Cc: kernel test robot <lkp@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v3)
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 160 ++++++++++++++++++
 1 file changed, 160 insertions(+)

diff --git a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
index e3c818dfc0e6d..d916e548fcb12 100644
--- a/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
+++ b/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
@@ -68,6 +68,152 @@ static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test
 KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
 		  dp_mst_calc_pbn_mode_desc);
 
+struct drm_dp_mst_calc_pbn_div_test {
+	int link_rate;
+	int lane_count;
+	fixed20_12 expected;
+};
+
+#define fp_init(__int, __frac) { \
+	.full = (__int) * (1 << 12) + \
+		(__frac) * (1 << 12) / 100000 \
+}
+
+static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
+	/*
+	 * UHBR rates (DP Standard v2.1 2.7.6.3, specifying the rounded to
+	 *             closest value to 2 decimal places):
+	 * .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
+	 * DP1.4 rates (DP Standard v2.1 2.6.4.2):
+	 * .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
+	 *
+	 * truncated to 5 decimal places.
+	 */
+	{
+		.link_rate = 2000000,
+		.lane_count = 4,
+		.expected = fp_init(179,  9259),  /* 179.09259 */
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 2,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 2000000,
+		.lane_count = 1,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 4,
+		.expected = fp_init(120, 88750),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 2,
+		.expected = fp_init(60, 44375),
+	},
+	{
+		.link_rate = 1350000,
+		.lane_count = 1,
+		.expected = fp_init(30, 22187),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 4,
+		.expected = fp_init(89, 54629),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 2,
+		.expected = fp_init(44, 77314),
+	},
+	{
+		.link_rate = 1000000,
+		.lane_count = 1,
+		.expected = fp_init(22, 38657),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 4,
+		.expected = fp_init(60, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 2,
+		.expected = fp_init(30, 0),
+	},
+	{
+		.link_rate = 810000,
+		.lane_count = 1,
+		.expected = fp_init(15, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 4,
+		.expected = fp_init(40, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 2,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 540000,
+		.lane_count = 1,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 4,
+		.expected = fp_init(20, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 2,
+		.expected = fp_init(10, 0),
+	},
+	{
+		.link_rate = 270000,
+		.lane_count = 1,
+		.expected = fp_init(5, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 4,
+		.expected = fp_init(12, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 2,
+		.expected = fp_init(6, 0),
+	},
+	{
+		.link_rate = 162000,
+		.lane_count = 1,
+		.expected = fp_init(3, 0),
+	},
+};
+
+static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
+{
+	const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
+	/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
+	struct drm_dp_mst_topology_mgr *mgr = test->priv;
+
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(mgr, params->link_rate, params->lane_count).full,
+			params->expected.full);
+}
+
+static void dp_mst_calc_pbn_div_desc(const struct drm_dp_mst_calc_pbn_div_test *t, char *desc)
+{
+	sprintf(desc, "Link rate %d lane count %d", t->link_rate, t->lane_count);
+}
+
+KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_dp1_4_cases,
+		  dp_mst_calc_pbn_div_desc);
+
 static u8 data[] = { 0xff, 0x00, 0xdd };
 
 struct drm_dp_mst_sideband_msg_req_test {
@@ -416,13 +562,27 @@ KUNIT_ARRAY_PARAM(drm_dp_mst_sideband_msg_req, drm_dp_mst_sideband_msg_req_cases
 
 static struct kunit_case drm_dp_mst_helper_tests[] = {
 	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_gen_params),
+	KUNIT_CASE_PARAM(drm_test_dp_mst_calc_pbn_div, drm_dp_mst_calc_pbn_div_gen_params),
 	KUNIT_CASE_PARAM(drm_test_dp_mst_sideband_msg_req_decode,
 			 drm_dp_mst_sideband_msg_req_gen_params),
 	{ }
 };
 
+static int drm_dp_mst_helper_tests_init(struct kunit *test)
+{
+	struct drm_dp_mst_topology_mgr *mgr;
+
+	mgr = kunit_kzalloc(test, sizeof(*mgr), GFP_KERNEL);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, mgr);
+
+	test->priv = mgr;
+
+	return 0;
+}
+
 static struct kunit_suite drm_dp_mst_helper_test_suite = {
 	.name = "drm_dp_mst_helper",
+	.init = drm_dp_mst_helper_tests_init,
 	.test_cases = drm_dp_mst_helper_tests,
 };
 
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

[kernel test robot]

Hi Imre,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-tip/drm-tip]

url:    https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-dp_mst-Store-the-MST-PBN-divider-value-in-fixed-point-format/20231116-212936
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:    https://lore.kernel.org/r/20231116131841.1588781-4-imre.deak%40intel.com
patch subject: [Intel-gfx] [PATCH v2 03/11] drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
config: hexagon-allyesconfig (https://download.01.org/0day-ci/archive/20231119/202311190743.K2U2VXVT-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231119/202311190743.K2U2VXVT-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311190743.K2U2VXVT-lkp@intel.com/

All warnings (new ones prefixed by >>):

   In file included from drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:10:
   In file included from include/drm/display/drm_dp_mst_helper.h:26:
   In file included from include/drm/display/drm_dp_helper.h:27:
   In file included from include/linux/i2c.h:19:
   In file included from include/linux/regulator/consumer.h:35:
   In file included from include/linux/suspend.h:5:
   In file included from include/linux/swap.h:9:
   In file included from include/linux/memcontrol.h:13:
   In file included from include/linux/cgroup.h:26:
   In file included from include/linux/kernel_stat.h:9:
   In file included from include/linux/interrupt.h:11:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/hexagon/include/asm/io.h:337:
   include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     547 |         val = __raw_readb(PCI_IOBASE + addr);
         |                           ~~~~~~~~~~ ^
   include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     560 |         val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:37:51: note: expanded from macro '__le16_to_cpu'
      37 | #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
         |                                                   ^
   In file included from drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:10:
   In file included from include/drm/display/drm_dp_mst_helper.h:26:
   In file included from include/drm/display/drm_dp_helper.h:27:
   In file included from include/linux/i2c.h:19:
   In file included from include/linux/regulator/consumer.h:35:
   In file included from include/linux/suspend.h:5:
   In file included from include/linux/swap.h:9:
   In file included from include/linux/memcontrol.h:13:
   In file included from include/linux/cgroup.h:26:
   In file included from include/linux/kernel_stat.h:9:
   In file included from include/linux/interrupt.h:11:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/hexagon/include/asm/io.h:337:
   include/asm-generic/io.h:573:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     573 |         val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:35:51: note: expanded from macro '__le32_to_cpu'
      35 | #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
         |                                                   ^
   In file included from drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:10:
   In file included from include/drm/display/drm_dp_mst_helper.h:26:
   In file included from include/drm/display/drm_dp_helper.h:27:
   In file included from include/linux/i2c.h:19:
   In file included from include/linux/regulator/consumer.h:35:
   In file included from include/linux/suspend.h:5:
   In file included from include/linux/swap.h:9:
   In file included from include/linux/memcontrol.h:13:
   In file included from include/linux/cgroup.h:26:
   In file included from include/linux/kernel_stat.h:9:
   In file included from include/linux/interrupt.h:11:
   In file included from include/linux/hardirq.h:11:
   In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
   In file included from include/asm-generic/hardirq.h:17:
   In file included from include/linux/irq.h:20:
   In file included from include/linux/io.h:13:
   In file included from arch/hexagon/include/asm/io.h:337:
   include/asm-generic/io.h:584:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     584 |         __raw_writeb(value, PCI_IOBASE + addr);
         |                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:594:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     594 |         __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:604:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     604 |         __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
>> drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:197:13: warning: stack frame size (1664) exceeds limit (1024) in 'drm_test_dp_mst_calc_pbn_div' [-Wframe-larger-than]
     197 | static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
         |             ^
   7 warnings generated.


vim +/drm_test_dp_mst_calc_pbn_div +197 drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

   196	
 > 197	static void drm_test_dp_mst_calc_pbn_div(struct kunit *test)
   198	{
   199		const struct drm_dp_mst_calc_pbn_div_test *params = test->param_value;
   200		/* mgr->dev is only needed by drm_dbg_kms(), but it's not called for the test cases. */
   201		struct drm_dp_mst_topology_mgr mgr = {};
   202	
   203		KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,
   204				params->expected.full);
   205	}
   206	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

[Intel-gfx] [PATCH v2 04/11] drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()

[Imre Deak]

Replace intel_dp_is_uhbr_rate() with the recently added
drm_dp_is_uhbr_rate().

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 2 +-
 drivers/gpu/drm/i915/display/intel_dp.c      | 7 +------
 drivers/gpu/drm/i915/display/intel_dp.h      | 1 -
 3 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 125903007a292..1e045e4fbe582 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2394,7 +2394,7 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead,
 		      int pixel_data_rate, int link_data_rate,
 		      u32 *data_m, u32 *data_n)
 {
-	bool is_uhbr = intel_dp_is_uhbr_rate(link_clock);
+	bool is_uhbr = drm_dp_is_uhbr_rate(link_clock);
 	int ch_coding_efficiency =
 		drm_dp_bw_channel_coding_efficiency(is_uhbr);
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 54bd0bffa9f08..1b80747044a80 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -121,15 +121,10 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
 
 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
 
-bool intel_dp_is_uhbr_rate(int rate)
-{
-	return rate >= 1000000;
-}
-
 /* Is link rate UHBR and thus 128b/132b? */
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state)
 {
-	return intel_dp_is_uhbr_rate(crtc_state->port_clock);
+	return drm_dp_is_uhbr_rate(crtc_state->port_clock);
 }
 
 static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index e80da67554196..664fa93bbf534 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -80,7 +80,6 @@ void intel_dp_audio_compute_config(struct intel_encoder *encoder,
 				   struct drm_connector_state *conn_state);
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
-bool intel_dp_is_uhbr_rate(int rate);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 04/11] drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()

[Murthy, Arun R]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, November 16, 2023 6:49 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 04/11] drm/i915/dp: Replace
> intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
> 
> Replace intel_dp_is_uhbr_rate() with the recently added
> drm_dp_is_uhbr_rate().
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
--------------------
>  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c      | 7 +------
>  drivers/gpu/drm/i915/display/intel_dp.h      | 1 -
>  3 files changed, 2 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 125903007a292..1e045e4fbe582 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2394,7 +2394,7 @@ add_bw_alloc_overhead(int link_clock, int
> bw_overhead,
>  		      int pixel_data_rate, int link_data_rate,
>  		      u32 *data_m, u32 *data_n)
>  {
> -	bool is_uhbr = intel_dp_is_uhbr_rate(link_clock);
> +	bool is_uhbr = drm_dp_is_uhbr_rate(link_clock);
>  	int ch_coding_efficiency =
>  		drm_dp_bw_channel_coding_efficiency(is_uhbr);
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 54bd0bffa9f08..1b80747044a80 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -121,15 +121,10 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
> 
>  static void intel_dp_unset_edid(struct intel_dp *intel_dp);
> 
> -bool intel_dp_is_uhbr_rate(int rate)
> -{
> -	return rate >= 1000000;
> -}
> -
>  /* Is link rate UHBR and thus 128b/132b? */  bool intel_dp_is_uhbr(const
> struct intel_crtc_state *crtc_state)  {
> -	return intel_dp_is_uhbr_rate(crtc_state->port_clock);
> +	return drm_dp_is_uhbr_rate(crtc_state->port_clock);
>  }
> 
>  static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp) diff --git
> a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index e80da67554196..664fa93bbf534 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -80,7 +80,6 @@ void intel_dp_audio_compute_config(struct intel_encoder
> *encoder,
>  				   struct drm_connector_state *conn_state);
> bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);  bool
> intel_dp_is_edp(struct intel_dp *intel_dp); -bool intel_dp_is_uhbr_rate(int
> rate);  bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);  bool
> intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
> enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
> --
> 2.39.2

[Intel-gfx] [PATCH v2 05/11] drm/i915/dp: Account for channel coding efficiency on UHBR links

[Imre Deak]

Apply the correct BW allocation overhead and channel coding efficiency
on UHBR link rates, similarly to DP1.4 link rates.

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1e045e4fbe582..9755e0a5042c4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2398,16 +2398,6 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead,
 	int ch_coding_efficiency =
 		drm_dp_bw_channel_coding_efficiency(is_uhbr);
 
-	/*
-	 * TODO: adjust for actual UHBR channel coding efficiency and BW
-	 * overhead.
-	 */
-	if (is_uhbr) {
-		*data_m = pixel_data_rate;
-		*data_n = link_data_rate * 8 / 10;
-		return;
-	}
-
 	*data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead),
 				   1000000);
 	*data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate, ch_coding_efficiency),
-- 
2.39.2

[Intel-gfx] [PATCH v2 06/11] drm/i915/dp: Fix UHBR link M/N values

[Imre Deak]

The link M/N ratio is the data rate / link symbol clock rate, fix things
up accordingly. On DP 1.4 this ratio was correct as the link symbol clock
rate in that case matched the link data rate (in bytes/sec units, the
symbol size being 8 bits), however it wasn't correct for UHBR rates
where the symbol size is 32 bits.

Kudos to Arun noticing in Bspec the incorrect use of link data rate in
the ratio's N value.

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++-----
 drivers/gpu/drm/i915/display/intel_dp.c      | 24 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h      |  2 ++
 3 files changed, 36 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9755e0a5042c4..744c321792fcf 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2411,6 +2411,7 @@ intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
 		       struct intel_link_m_n *m_n)
 {
 	u32 data_clock = DIV_ROUND_UP(bits_per_pixel_x16 * pixel_clock, 16);
+	u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
 	u32 data_m;
 	u32 data_n;
 
@@ -2431,7 +2432,7 @@ intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
 		    0x8000000);
 
 	compute_m_n(&m_n->link_m, &m_n->link_n,
-		    pixel_clock, link_clock,
+		    pixel_clock, link_symbol_clock,
 		    0x80000);
 }
 
@@ -3943,20 +3944,23 @@ int intel_dotclock_calculate(int link_freq,
 			     const struct intel_link_m_n *m_n)
 {
 	/*
-	 * The calculation for the data clock is:
+	 * The calculation for the data clock -> pixel clock is:
 	 * pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
 	 * But we want to avoid losing precison if possible, so:
 	 * pixel_clock = ((m * link_clock * nr_lanes)/(n*bpp))
 	 *
-	 * and the link clock is simpler:
-	 * link_clock = (m * link_clock) / n
+	 * and for link freq (10kbs units) -> pixel clock it is:
+	 * link_symbol_clock = link_freq * 10 / link_symbol_size
+	 * pixel_clock = (m * link_symbol_clock) / n
+	 *    or for more precision:
+	 * pixel_clock = (m * link_freq * 10) / (n * link_symbol_size)
 	 */
 
 	if (!m_n->link_n)
 		return 0;
 
-	return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq),
-				m_n->link_n);
+	return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq * 10),
+				m_n->link_n * intel_dp_link_symbol_size(link_freq));
 }
 
 int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 1b80747044a80..521838caa1979 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -127,6 +127,30 @@ bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state)
 	return drm_dp_is_uhbr_rate(crtc_state->port_clock);
 }
 
+/**
+ * intel_dp_link_symbol_size - get the link symbol size for a given link rate
+ * @rate: link rate in 10kbit/s units
+ *
+ * Returns the link symbol size in bits/symbol units depending on the link
+ * rate -> channel coding.
+ */
+int intel_dp_link_symbol_size(int rate)
+{
+	return drm_dp_is_uhbr_rate(rate) ? 32 : 10;
+}
+
+/**
+ * intel_dp_link_symbol_clock - convert link rate to link symbol clock
+ * @rate: link rate in 10kbit/s units
+ *
+ * Returns the link symbol clock frequency in kHz units depending on the
+ * link rate and channel coding.
+ */
+int intel_dp_link_symbol_clock(int rate)
+{
+	return DIV_ROUND_CLOSEST(rate * 10, intel_dp_link_symbol_size(rate));
+}
+
 static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp)
 {
 	intel_dp->sink_rates[0] = 162000;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 664fa93bbf534..777aa858f899c 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -81,6 +81,8 @@ void intel_dp_audio_compute_config(struct intel_encoder *encoder,
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
+int intel_dp_link_symbol_size(int rate);
+int intel_dp_link_symbol_clock(int rate);
 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
 				  bool long_hpd);
-- 
2.39.2

[Intel-gfx] [PATCH v2 07/11] drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()

[Imre Deak]

The next patch will calculate the PBN value directly from the pixel data
rate and the BW allocation overhead, not requiring the data, link M/N
and TU values for this. To prepare for that move the calculation of BW
overheads from intel_dp_mst_compute_m_n() to
intel_dp_mst_find_vcpi_slots_for_bpp().

While at it store link_bpp in a .4 fixed point format.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 27 ++++++++++++++-------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index e5d6b811c22ef..a5ddd1781969d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -108,15 +108,12 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state,
 
 static void intel_dp_mst_compute_m_n(const struct intel_crtc_state *crtc_state,
 				     const struct intel_connector *connector,
-				     bool ssc, bool dsc,
+				     int overhead,
 				     int bpp_x16,
 				     struct intel_link_m_n *m_n)
 {
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
-	int overhead = intel_dp_mst_bw_overhead(crtc_state,
-						connector,
-						ssc, dsc, bpp_x16);
 
 	intel_link_compute_m_n(bpp_x16, crtc_state->lane_count,
 			       adjusted_mode->crtc_clock,
@@ -171,7 +168,9 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 
 	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
 		struct intel_link_m_n remote_m_n;
-		int link_bpp;
+		int local_bw_overhead;
+		int remote_bw_overhead;
+		int link_bpp_x16;
 
 		drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
 
@@ -179,12 +178,22 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		if (ret)
 			continue;
 
-		link_bpp = dsc ? bpp :
-			intel_dp_output_bpp(crtc_state->output_format, bpp);
+		link_bpp_x16 = to_bpp_x16(dsc ? bpp :
+					  intel_dp_output_bpp(crtc_state->output_format, bpp));
 
-		intel_dp_mst_compute_m_n(crtc_state, connector, false, dsc, to_bpp_x16(link_bpp),
+		local_bw_overhead = intel_dp_mst_bw_overhead(crtc_state, connector,
+							     false, dsc, link_bpp_x16);
+		remote_bw_overhead = intel_dp_mst_bw_overhead(crtc_state, connector,
+							      true, dsc, link_bpp_x16);
+
+		intel_dp_mst_compute_m_n(crtc_state, connector,
+					 local_bw_overhead,
+					 link_bpp_x16,
 					 &crtc_state->dp_m_n);
-		intel_dp_mst_compute_m_n(crtc_state, connector, true, dsc, to_bpp_x16(link_bpp),
+
+		intel_dp_mst_compute_m_n(crtc_state, connector,
+					 remote_bw_overhead,
+					 link_bpp_x16,
 					 &remote_m_n);
 
 		/*
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 07/11] drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()

[Murthy, Arun R]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, November 16, 2023 6:49 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 07/11] drm/i915/dp_mst: Calculate the BW
> overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
> 
> The next patch will calculate the PBN value directly from the pixel data rate and
> the BW allocation overhead, not requiring the data, link M/N and TU values for
> this. To prepare for that move the calculation of BW overheads from
> intel_dp_mst_compute_m_n() to intel_dp_mst_find_vcpi_slots_for_bpp().
> 
> While at it store link_bpp in a .4 fixed point format.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 27 ++++++++++++++-------
>  1 file changed, 18 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index e5d6b811c22ef..a5ddd1781969d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -108,15 +108,12 @@ static int intel_dp_mst_bw_overhead(const struct
> intel_crtc_state *crtc_state,
> 
>  static void intel_dp_mst_compute_m_n(const struct intel_crtc_state
> *crtc_state,
>  				     const struct intel_connector *connector,
> -				     bool ssc, bool dsc,
> +				     int overhead,
>  				     int bpp_x16,
>  				     struct intel_link_m_n *m_n)
>  {
>  	const struct drm_display_mode *adjusted_mode =
>  		&crtc_state->hw.adjusted_mode;
> -	int overhead = intel_dp_mst_bw_overhead(crtc_state,
> -						connector,
> -						ssc, dsc, bpp_x16);
> 
>  	intel_link_compute_m_n(bpp_x16, crtc_state->lane_count,
>  			       adjusted_mode->crtc_clock,
> @@ -171,7 +168,9 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
> intel_encoder *encoder,
> 
>  	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
>  		struct intel_link_m_n remote_m_n;
> -		int link_bpp;
> +		int local_bw_overhead;
> +		int remote_bw_overhead;
> +		int link_bpp_x16;
> 
>  		drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
> 
> @@ -179,12 +178,22 @@ static int
> intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
>  		if (ret)
>  			continue;
> 
> -		link_bpp = dsc ? bpp :
> -			intel_dp_output_bpp(crtc_state->output_format, bpp);
> +		link_bpp_x16 = to_bpp_x16(dsc ? bpp :
> +					  intel_dp_output_bpp(crtc_state-
> >output_format, bpp));
> 
> -		intel_dp_mst_compute_m_n(crtc_state, connector, false, dsc,
> to_bpp_x16(link_bpp),
> +		local_bw_overhead = intel_dp_mst_bw_overhead(crtc_state,
> connector,
> +							     false, dsc,
> link_bpp_x16);
> +		remote_bw_overhead = intel_dp_mst_bw_overhead(crtc_state,
> connector,
> +							      true, dsc,
> link_bpp_x16);
> +
> +		intel_dp_mst_compute_m_n(crtc_state, connector,
> +					 local_bw_overhead,
> +					 link_bpp_x16,
>  					 &crtc_state->dp_m_n);
> -		intel_dp_mst_compute_m_n(crtc_state, connector, true, dsc,
> to_bpp_x16(link_bpp),
> +
> +		intel_dp_mst_compute_m_n(crtc_state, connector,
> +					 remote_bw_overhead,
> +					 link_bpp_x16,
>  					 &remote_m_n);
> 
>  		/*
> --
> 2.39.2

[Intel-gfx] [PATCH v2 08/11] drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates

[Imre Deak]

Atm the allocated MST PBN value is calculated from the TU size (number
of allocated MTP slots) as

  PBN = TU * pbn_div

pbn_div being the link BW for each MTP slot. For DP 1.4 link rates this
worked, as pbn_div there is guraranteed to be an integer number, however
on UHBR this isn't the case. To get a PBN, TU pair where TU is a
properly rounded-up value covering all the BW corresponding to PBN,
calculate first PBN and from PBN the TU value.

Calculate PBN directly from the effective pixel data rate, instead of
calculating it indirectly from the corresponding TU and pbn_div values
(which are in turn derived from the pixel data rate and BW overhead).

Add a helper function to calculate the effective data rate, also adding
a note that callers of intel_dp_link_required() may also need to check
the effective data rate (vs. the data rate w/o the BW overhead).

While at it add a note to check if WA#14013163432 is applicable.

v2:
- Fix PBN calculation, deriving it from the effective data rate directly
  instead of using the indirect TU and pbn_div values for this.
- Add a note about WA#14013163432. (Arun)

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 19 +++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h     |  2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 35 +++++++++++++++------
 3 files changed, 46 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 521838caa1979..120d435d27ff1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -355,6 +355,9 @@ int intel_dp_max_lane_count(struct intel_dp *intel_dp)
 /*
  * The required data bandwidth for a mode with given pixel clock and bpp. This
  * is the required net bandwidth independent of the data bandwidth efficiency.
+ *
+ * TODO: check if callers of this functions should use
+ * intel_dp_effective_data_rate() instead.
  */
 int
 intel_dp_link_required(int pixel_clock, int bpp)
@@ -363,6 +366,22 @@ intel_dp_link_required(int pixel_clock, int bpp)
 	return DIV_ROUND_UP(pixel_clock * bpp, 8);
 }
 
+/**
+ * intel_dp_effective_data_rate - Return the pixel data rate accounting for BW allocation overhead
+ * @pixel_clock: pixel clock in kHz
+ * @bpp_x16: bits per pixel .4 fixed point format
+ * @bw_overhead: BW allocation overhead in 1ppm units
+ *
+ * Return the effective pixel data rate in kB/sec units taking into account
+ * the provided SSC, FEC, DSC BW allocation overhead.
+ */
+int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
+				 int bw_overhead)
+{
+	return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_clock * bpp_x16, bw_overhead),
+				1000000 * 16 * 8);
+}
+
 /*
  * Given a link rate and lanes, get the data bandwidth.
  *
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 777aa858f899c..05db46b111f21 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -103,6 +103,8 @@ bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
 
 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 int intel_dp_link_required(int pixel_clock, int bpp);
+int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
+				 int bw_overhead);
 int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index a5ddd1781969d..297d8c5f88a8b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -115,6 +115,7 @@ static void intel_dp_mst_compute_m_n(const struct intel_crtc_state *crtc_state,
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
 
+	/* TODO: Check WA 14013163432 to set data M/N for full BW utilization. */
 	intel_link_compute_m_n(bpp_x16, crtc_state->lane_count,
 			       adjusted_mode->crtc_clock,
 			       crtc_state->port_clock,
@@ -124,6 +125,18 @@ static void intel_dp_mst_compute_m_n(const struct intel_crtc_state *crtc_state,
 	m_n->tu = DIV_ROUND_UP_ULL(mul_u32_u32(m_n->data_m, 64), m_n->data_n);
 }
 
+static int intel_dp_mst_calc_pbn(int pixel_clock, int bpp_x16, int bw_overhead)
+{
+	int effective_data_rate =
+		intel_dp_effective_data_rate(pixel_clock, bpp_x16, bw_overhead);
+
+	/*
+	 * TODO: Use drm_dp_calc_pbn_mode() instead, once it's converted
+	 * to calculate PBN with the BW overhead passed to it.
+	 */
+	return DIV_ROUND_UP(effective_data_rate * 64, 54 * 1000);
+}
+
 static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 						struct intel_crtc_state *crtc_state,
 						int max_bpp,
@@ -167,10 +180,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		    min_bpp, max_bpp);
 
 	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
-		struct intel_link_m_n remote_m_n;
 		int local_bw_overhead;
 		int remote_bw_overhead;
 		int link_bpp_x16;
+		fixed20_12 remote_tu;
 
 		drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
 
@@ -191,11 +204,6 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 					 link_bpp_x16,
 					 &crtc_state->dp_m_n);
 
-		intel_dp_mst_compute_m_n(crtc_state, connector,
-					 remote_bw_overhead,
-					 link_bpp_x16,
-					 &remote_m_n);
-
 		/*
 		 * The TU size programmed to the HW determines which slots in
 		 * an MTP frame are used for this stream, which needs to match
@@ -210,9 +218,16 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		 * crtc_state->dp_m_n.tu), provided that the driver doesn't
 		 * enable SSC on the corresponding link.
 		 */
-		drm_WARN_ON(&i915->drm, remote_m_n.tu < crtc_state->dp_m_n.tu);
-		crtc_state->dp_m_n.tu = remote_m_n.tu;
-		crtc_state->pbn = remote_m_n.tu * dfixed_trunc(mst_state->pbn_div);
+		crtc_state->pbn = intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock,
+							link_bpp_x16,
+							remote_bw_overhead);
+
+		remote_tu.full = dfixed_div((fixed20_12)dfixed_init(crtc_state->pbn),
+					    mst_state->pbn_div);
+		remote_tu.full = dfixed_ceil(remote_tu);
+
+		drm_WARN_ON(&i915->drm, dfixed_trunc(remote_tu) < crtc_state->dp_m_n.tu);
+		crtc_state->dp_m_n.tu = dfixed_trunc(remote_tu);
 
 		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
 						      connector->port,
@@ -221,7 +236,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 			return slots;
 
 		if (slots >= 0) {
-			drm_WARN_ON(&i915->drm, slots != remote_m_n.tu);
+			drm_WARN_ON(&i915->drm, slots != crtc_state->dp_m_n.tu);
 
 			break;
 		}
-- 
2.39.2

[Intel-gfx] [PATCH v3 08/11] drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates

[Imre Deak]

Atm the allocated MST PBN value is calculated from the TU size (number
of allocated MTP slots) as

  PBN = TU * pbn_div

pbn_div being the link BW for each MTP slot. For DP 1.4 link rates this
worked, as pbn_div there is guraranteed to be an integer number, however
on UHBR this isn't the case. To get a PBN, TU pair where TU is a
properly rounded-up value covering all the BW corresponding to PBN,
calculate first PBN and from PBN the TU value.

Calculate PBN directly from the effective pixel data rate, instead of
calculating it indirectly from the corresponding TU and pbn_div values
(which are in turn derived from the pixel data rate and BW overhead).

Add a helper function to calculate the effective data rate, also adding
a note that callers of intel_dp_link_required() may also need to check
the effective data rate (vs. the data rate w/o the BW overhead).

While at it add a note to check if WA#14013163432 is applicable.

v2:
- Fix PBN calculation, deriving it from the effective data rate directly
  instead of using the indirect TU and pbn_div values for this.
- Add a note about WA#14013163432. (Arun)
v3:
- Fix rounding up quotient while calculating remote_tu. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 19 ++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h     |  2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 33 ++++++++++++++-------
 3 files changed, 44 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 521838caa1979..120d435d27ff1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -355,6 +355,9 @@ int intel_dp_max_lane_count(struct intel_dp *intel_dp)
 /*
  * The required data bandwidth for a mode with given pixel clock and bpp. This
  * is the required net bandwidth independent of the data bandwidth efficiency.
+ *
+ * TODO: check if callers of this functions should use
+ * intel_dp_effective_data_rate() instead.
  */
 int
 intel_dp_link_required(int pixel_clock, int bpp)
@@ -363,6 +366,22 @@ intel_dp_link_required(int pixel_clock, int bpp)
 	return DIV_ROUND_UP(pixel_clock * bpp, 8);
 }
 
+/**
+ * intel_dp_effective_data_rate - Return the pixel data rate accounting for BW allocation overhead
+ * @pixel_clock: pixel clock in kHz
+ * @bpp_x16: bits per pixel .4 fixed point format
+ * @bw_overhead: BW allocation overhead in 1ppm units
+ *
+ * Return the effective pixel data rate in kB/sec units taking into account
+ * the provided SSC, FEC, DSC BW allocation overhead.
+ */
+int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
+				 int bw_overhead)
+{
+	return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_clock * bpp_x16, bw_overhead),
+				1000000 * 16 * 8);
+}
+
 /*
  * Given a link rate and lanes, get the data bandwidth.
  *
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 777aa858f899c..05db46b111f21 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -103,6 +103,8 @@ bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
 
 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 int intel_dp_link_required(int pixel_clock, int bpp);
+int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
+				 int bw_overhead);
 int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index a5ddd1781969d..d3d53e1b44891 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -115,6 +115,7 @@ static void intel_dp_mst_compute_m_n(const struct intel_crtc_state *crtc_state,
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
 
+	/* TODO: Check WA 14013163432 to set data M/N for full BW utilization. */
 	intel_link_compute_m_n(bpp_x16, crtc_state->lane_count,
 			       adjusted_mode->crtc_clock,
 			       crtc_state->port_clock,
@@ -124,6 +125,18 @@ static void intel_dp_mst_compute_m_n(const struct intel_crtc_state *crtc_state,
 	m_n->tu = DIV_ROUND_UP_ULL(mul_u32_u32(m_n->data_m, 64), m_n->data_n);
 }
 
+static int intel_dp_mst_calc_pbn(int pixel_clock, int bpp_x16, int bw_overhead)
+{
+	int effective_data_rate =
+		intel_dp_effective_data_rate(pixel_clock, bpp_x16, bw_overhead);
+
+	/*
+	 * TODO: Use drm_dp_calc_pbn_mode() instead, once it's converted
+	 * to calculate PBN with the BW overhead passed to it.
+	 */
+	return DIV_ROUND_UP(effective_data_rate * 64, 54 * 1000);
+}
+
 static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 						struct intel_crtc_state *crtc_state,
 						int max_bpp,
@@ -167,10 +180,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		    min_bpp, max_bpp);
 
 	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
-		struct intel_link_m_n remote_m_n;
 		int local_bw_overhead;
 		int remote_bw_overhead;
 		int link_bpp_x16;
+		int remote_tu;
 
 		drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
 
@@ -191,11 +204,6 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 					 link_bpp_x16,
 					 &crtc_state->dp_m_n);
 
-		intel_dp_mst_compute_m_n(crtc_state, connector,
-					 remote_bw_overhead,
-					 link_bpp_x16,
-					 &remote_m_n);
-
 		/*
 		 * The TU size programmed to the HW determines which slots in
 		 * an MTP frame are used for this stream, which needs to match
@@ -210,9 +218,14 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		 * crtc_state->dp_m_n.tu), provided that the driver doesn't
 		 * enable SSC on the corresponding link.
 		 */
-		drm_WARN_ON(&i915->drm, remote_m_n.tu < crtc_state->dp_m_n.tu);
-		crtc_state->dp_m_n.tu = remote_m_n.tu;
-		crtc_state->pbn = remote_m_n.tu * dfixed_trunc(mst_state->pbn_div);
+		crtc_state->pbn = intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock,
+							link_bpp_x16,
+							remote_bw_overhead);
+
+		remote_tu = DIV_ROUND_UP(dfixed_const(crtc_state->pbn), mst_state->pbn_div.full);
+
+		drm_WARN_ON(&i915->drm, remote_tu < crtc_state->dp_m_n.tu);
+		crtc_state->dp_m_n.tu = remote_tu;
 
 		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
 						      connector->port,
@@ -221,7 +234,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 			return slots;
 
 		if (slots >= 0) {
-			drm_WARN_ON(&i915->drm, slots != remote_m_n.tu);
+			drm_WARN_ON(&i915->drm, slots != crtc_state->dp_m_n.tu);
 
 			break;
 		}
-- 
2.39.2

[Intel-gfx] [PATCH v2 09/11] drm/i915/dp: Report a rounded-down value as the maximum data rate

[Imre Deak]

Callers of intel_dp_max_data_rate() use the return value as an upper
bound for the BW a given mode requires. As such the rounding shouldn't
result in a bigger value than the actual upper bound. Use round-down
instead of -closest accordingly.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 120d435d27ff1..209c27167e057 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -413,7 +413,7 @@ intel_dp_max_data_rate(int max_link_rate, int max_lanes)
 		 */
 		int max_link_rate_kbps = max_link_rate * 10;
 
-		max_link_rate_kbps = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);
+		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);
 		max_link_rate = max_link_rate_kbps / 8;
 	}
 
@@ -423,7 +423,7 @@ intel_dp_max_data_rate(int max_link_rate, int max_lanes)
 	 * out to be a nop by coincidence, and can be skipped:
 	 *
 	 *	int max_link_rate_kbps = max_link_rate * 10;
-	 *	max_link_rate_kbps = DIV_ROUND_CLOSEST_ULL(max_link_rate_kbps * 8, 10);
+	 *	max_link_rate_kbps = DIV_ROUND_DOWN_ULL(max_link_rate_kbps * 8, 10);
 	 *	max_link_rate = max_link_rate_kbps / 8;
 	 */
 
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 09/11] drm/i915/dp: Report a rounded-down value as the maximum data rate

[Lisovskiy, Stanislav]

On Thu, Nov 16, 2023 at 03:18:39PM +0200, Imre Deak wrote:
> Callers of intel_dp_max_data_rate() use the return value as an upper
> bound for the BW a given mode requires. As such the rounding shouldn't
> result in a bigger value than the actual upper bound. Use round-down
> instead of -closest accordingly.
> 
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

LGTM,

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 120d435d27ff1..209c27167e057 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -413,7 +413,7 @@ intel_dp_max_data_rate(int max_link_rate, int max_lanes)
>  		 */
>  		int max_link_rate_kbps = max_link_rate * 10;
>  
> -		max_link_rate_kbps = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);
> +		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);
>  		max_link_rate = max_link_rate_kbps / 8;
>  	}
>  
> @@ -423,7 +423,7 @@ intel_dp_max_data_rate(int max_link_rate, int max_lanes)
>  	 * out to be a nop by coincidence, and can be skipped:
>  	 *
>  	 *	int max_link_rate_kbps = max_link_rate * 10;
> -	 *	max_link_rate_kbps = DIV_ROUND_CLOSEST_ULL(max_link_rate_kbps * 8, 10);
> +	 *	max_link_rate_kbps = DIV_ROUND_DOWN_ULL(max_link_rate_kbps * 8, 10);
>  	 *	max_link_rate = max_link_rate_kbps / 8;
>  	 */
>  
> -- 
> 2.39.2
> 

[Intel-gfx] [PATCH v2 10/11] drm/i915/dp: Simplify intel_dp_max_data_rate()

[Imre Deak]

Simplify intel_dp_max_data_rate() using
drm_dp_bw_channel_coding_efficiency() to calculate the max data rate for
both DP1.4 and UHBR link rates. This trades a redundant multiply/divide
for readability.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 26 ++++++++++++-------------
 1 file changed, 12 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 209c27167e057..a93e8f6429d85 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -405,29 +405,27 @@ int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
 int
 intel_dp_max_data_rate(int max_link_rate, int max_lanes)
 {
-	if (max_link_rate >= 1000000) {
-		/*
-		 * UHBR rates always use 128b/132b channel encoding, and have
-		 * 97.71% data bandwidth efficiency. Consider max_link_rate the
-		 * link bit rate in units of 10000 bps.
-		 */
-		int max_link_rate_kbps = max_link_rate * 10;
-
-		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);
-		max_link_rate = max_link_rate_kbps / 8;
-	}
+	int ch_coding_efficiency =
+		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(max_link_rate));
+	int max_link_rate_kbps = max_link_rate * 10;
 
+	/*
+	 * UHBR rates always use 128b/132b channel encoding, and have
+	 * 97.71% data bandwidth efficiency. Consider max_link_rate the
+	 * link bit rate in units of 10000 bps.
+	 */
 	/*
 	 * Lower than UHBR rates always use 8b/10b channel encoding, and have
 	 * 80% data bandwidth efficiency for SST non-FEC. However, this turns
-	 * out to be a nop by coincidence, and can be skipped:
+	 * out to be a nop by coincidence:
 	 *
 	 *	int max_link_rate_kbps = max_link_rate * 10;
 	 *	max_link_rate_kbps = DIV_ROUND_DOWN_ULL(max_link_rate_kbps * 8, 10);
 	 *	max_link_rate = max_link_rate_kbps / 8;
 	 */
-
-	return max_link_rate * max_lanes;
+	return DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps * max_lanes,
+					      ch_coding_efficiency),
+				  1000000 * 8);
 }
 
 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp)
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 10/11] drm/i915/dp: Simplify intel_dp_max_data_rate()

[Ville Syrjälä]

On Thu, Nov 16, 2023 at 03:18:40PM +0200, Imre Deak wrote:
> Simplify intel_dp_max_data_rate() using
> drm_dp_bw_channel_coding_efficiency() to calculate the max data rate for
> both DP1.4 and UHBR link rates. This trades a redundant multiply/divide
> for readability.
> 
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 26 ++++++++++++-------------
>  1 file changed, 12 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 209c27167e057..a93e8f6429d85 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -405,29 +405,27 @@ int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
>  int
>  intel_dp_max_data_rate(int max_link_rate, int max_lanes)
>  {
> -	if (max_link_rate >= 1000000) {
> -		/*
> -		 * UHBR rates always use 128b/132b channel encoding, and have
> -		 * 97.71% data bandwidth efficiency. Consider max_link_rate the
> -		 * link bit rate in units of 10000 bps.
> -		 */
> -		int max_link_rate_kbps = max_link_rate * 10;
> -
> -		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);
> -		max_link_rate = max_link_rate_kbps / 8;
> -	}
> +	int ch_coding_efficiency =
> +		drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(max_link_rate));
> +	int max_link_rate_kbps = max_link_rate * 10;
>  
> +	/*
> +	 * UHBR rates always use 128b/132b channel encoding, and have
> +	 * 97.71% data bandwidth efficiency. Consider max_link_rate the
> +	 * link bit rate in units of 10000 bps.
> +	 */
>  	/*
>  	 * Lower than UHBR rates always use 8b/10b channel encoding, and have
>  	 * 80% data bandwidth efficiency for SST non-FEC. However, this turns
> -	 * out to be a nop by coincidence, and can be skipped:
> +	 * out to be a nop by coincidence:
>  	 *
>  	 *	int max_link_rate_kbps = max_link_rate * 10;
>  	 *	max_link_rate_kbps = DIV_ROUND_DOWN_ULL(max_link_rate_kbps * 8, 10);
>  	 *	max_link_rate = max_link_rate_kbps / 8;
>  	 */
> -
> -	return max_link_rate * max_lanes;
> +	return DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps * max_lanes,
> +					      ch_coding_efficiency),
> +				  1000000 * 8);
>  }
>  
>  bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp)
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

[Intel-gfx] [PATCH v2 11/11] drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()

[Imre Deak]

Reuse intel_dp_max_data_rate() and intel_dp_effective_data_rate() in
intel_link_compute_m_n(), instead of open-coding the equivalent. Note
the kbit/sec -> kByte/sec unit change in the M/N values, but this not
reducing the precision, as the link rate value is based anyway on a less
precise 10 kbit/sec value.

Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 25 +++-----------------
 1 file changed, 3 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 744c321792fcf..199ecd8879461 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2389,36 +2389,17 @@ static void compute_m_n(u32 *ret_m, u32 *ret_n,
 	intel_reduce_m_n_ratio(ret_m, ret_n);
 }
 
-static void
-add_bw_alloc_overhead(int link_clock, int bw_overhead,
-		      int pixel_data_rate, int link_data_rate,
-		      u32 *data_m, u32 *data_n)
-{
-	bool is_uhbr = drm_dp_is_uhbr_rate(link_clock);
-	int ch_coding_efficiency =
-		drm_dp_bw_channel_coding_efficiency(is_uhbr);
-
-	*data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead),
-				   1000000);
-	*data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate, ch_coding_efficiency),
-				     1000000);
-}
-
 void
 intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
 		       int pixel_clock, int link_clock,
 		       int bw_overhead,
 		       struct intel_link_m_n *m_n)
 {
-	u32 data_clock = DIV_ROUND_UP(bits_per_pixel_x16 * pixel_clock, 16);
 	u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
-	u32 data_m;
-	u32 data_n;
+	u32 data_m = intel_dp_effective_data_rate(pixel_clock, bits_per_pixel_x16,
+						  bw_overhead);
+	u32 data_n = intel_dp_max_data_rate(link_clock, nlanes);
 
-	add_bw_alloc_overhead(link_clock, bw_overhead,
-			      data_clock,
-			      link_clock * 10 * nlanes,
-			      &data_m, &data_n);
 	/*
 	 * Windows/BIOS uses fixed M/N values always. Follow suit.
 	 *
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2 11/11] drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()

[Ville Syrjälä]

On Thu, Nov 16, 2023 at 03:18:41PM +0200, Imre Deak wrote:
> Reuse intel_dp_max_data_rate() and intel_dp_effective_data_rate() in
> intel_link_compute_m_n(), instead of open-coding the equivalent. Note
> the kbit/sec -> kByte/sec unit change in the M/N values, but this not
> reducing the precision, as the link rate value is based anyway on a less
> precise 10 kbit/sec value.
> 
> Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 25 +++-----------------
>  1 file changed, 3 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 744c321792fcf..199ecd8879461 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2389,36 +2389,17 @@ static void compute_m_n(u32 *ret_m, u32 *ret_n,
>  	intel_reduce_m_n_ratio(ret_m, ret_n);
>  }
>  
> -static void
> -add_bw_alloc_overhead(int link_clock, int bw_overhead,
> -		      int pixel_data_rate, int link_data_rate,
> -		      u32 *data_m, u32 *data_n)
> -{
> -	bool is_uhbr = drm_dp_is_uhbr_rate(link_clock);
> -	int ch_coding_efficiency =
> -		drm_dp_bw_channel_coding_efficiency(is_uhbr);
> -
> -	*data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead),
> -				   1000000);
> -	*data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate, ch_coding_efficiency),
> -				     1000000);
> -}
> -
>  void
>  intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
>  		       int pixel_clock, int link_clock,
>  		       int bw_overhead,
>  		       struct intel_link_m_n *m_n)
>  {
> -	u32 data_clock = DIV_ROUND_UP(bits_per_pixel_x16 * pixel_clock, 16);
>  	u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
> -	u32 data_m;
> -	u32 data_n;
> +	u32 data_m = intel_dp_effective_data_rate(pixel_clock, bits_per_pixel_x16,
> +						  bw_overhead);
> +	u32 data_n = intel_dp_max_data_rate(link_clock, nlanes);
>  
> -	add_bw_alloc_overhead(link_clock, bw_overhead,
> -			      data_clock,
> -			      link_clock * 10 * nlanes,
> -			      &data_m, &data_n);
>  	/*
>  	 * Windows/BIOS uses fixed M/N values always. Follow suit.
>  	 *
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Patchwork]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values
URL   : https://patchwork.freedesktop.org/series/126526/
State : warning

== Summary ==

Error: dim checkpatch failed
e043aedaf8b4 drm/dp_mst: Store the MST PBN divider value in fixed point format
-:41: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#41: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:6914:
+		mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));

-:83: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#83: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c:945:
+			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, dfixed_trunc(mst_state->pbn_div));

-:87: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#87: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c:948:
+			(63 - link_timeslots_used) / remaining_to_increase * dfixed_trunc(mst_state->pbn_div);

total: 0 errors, 3 warnings, 0 checks, 176 lines checked
2b4643e1140c drm/dp_mst: Fix PBN divider calculation for UHBR rates
60f98fe6a386 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
-:153: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#153: FILE: drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:203:
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,

total: 0 errors, 1 warnings, 0 checks, 157 lines checked
55ff224d316a drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
9a610aba69db drm/i915/dp: Account for channel coding efficiency on UHBR links
801127193ae8 drm/i915/dp: Fix UHBR link M/N values
25e9a9e09a01 drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
fa1b00b259c2 drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
d0a563ba6ce8 drm/i915/dp: Report a rounded-down value as the maximum data rate
-:24: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#24: FILE: drivers/gpu/drm/i915/display/intel_dp.c:416:
+		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);

total: 0 errors, 1 warnings, 0 checks, 16 lines checked
da1dcca49782 drm/i915/dp: Simplify intel_dp_max_data_rate()
0bbf7c8df6d7 drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Patchwork]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values
URL   : https://patchwork.freedesktop.org/series/126526/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10225 bytes --]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values
URL   : https://patchwork.freedesktop.org/series/126526/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13884 -> Patchwork_126526v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/index.html

Participating hosts (39 -> 35)
------------------------------

  Additional (1): bat-dg2-9 
  Missing    (5): fi-bsw-n3050 fi-snb-2520m bat-jsl-3 bat-rpls-1 bat-mtlp-8 

Known issues
------------

  Here are the changes found in Patchwork_126526v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s0@smem:
    - bat-dg2-8:          [PASS][1] -> [INCOMPLETE][2] ([i915#8797] / [i915#9275])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/bat-dg2-8/igt@gem_exec_suspend@basic-s0@smem.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-8/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@gem_mmap@basic:
    - bat-dg2-9:          NOTRUN -> [SKIP][3] ([i915#4083])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@gem_mmap@basic.html

  * igt@gem_mmap_gtt@basic:
    - bat-dg2-9:          NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@gem_mmap_gtt@basic.html

  * igt@gem_render_tiled_blits@basic:
    - bat-dg2-9:          NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@gem_render_tiled_blits@basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg2-9:          NOTRUN -> [SKIP][6] ([i915#6621])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@gt_timelines:
    - fi-hsw-4770:        [PASS][7] -> [INCOMPLETE][8] ([i915#9527])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/fi-hsw-4770/igt@i915_selftest@live@gt_timelines.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/fi-hsw-4770/igt@i915_selftest@live@gt_timelines.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-dg2-9:          NOTRUN -> [SKIP][9] ([i915#5190])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg2-9:          NOTRUN -> [SKIP][10] ([i915#4215] / [i915#5190])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - bat-dg2-9:          NOTRUN -> [SKIP][11] ([i915#4212]) +6 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
    - bat-dg2-9:          NOTRUN -> [SKIP][12] ([i915#4212] / [i915#5608])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_addfb_basic@tile-pitch-mismatch.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-dg2-9:          NOTRUN -> [SKIP][13] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-dg2-9:          NOTRUN -> [SKIP][14] ([fdo#109285])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - bat-dg2-9:          NOTRUN -> [SKIP][15] ([i915#5274])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         NOTRUN -> [SKIP][16] ([i915#1845] / [i915#9197]) +3 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-dg2-9:          NOTRUN -> [SKIP][17] ([i915#3555] / [i915#4098])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-dg2-9:          NOTRUN -> [SKIP][18] ([i915#3708])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
    - bat-dg2-9:          NOTRUN -> [SKIP][19] ([i915#3708] / [i915#4077]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-write:
    - bat-dg2-9:          NOTRUN -> [SKIP][20] ([i915#3291] / [i915#3708]) +2 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-dg2-9/igt@prime_vgem@basic-write.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-apl-guc:         [DMESG-FAIL][21] ([i915#5334]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_hdmi_inject@inject-audio:
    - fi-kbl-guc:         [FAIL][23] ([IGT#3]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
    - bat-rplp-1:         [ABORT][25] ([i915#8668]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html

  * {igt@kms_psr@psr_cursor_plane_move@edp-1}:
    - bat-jsl-1:          [SKIP][27] ([i915#9648]) -> [PASS][28] +2 other tests pass
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/bat-jsl-1/igt@kms_psr@psr_cursor_plane_move@edp-1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/bat-jsl-1/igt@kms_psr@psr_cursor_plane_move@edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#8797]: https://gitlab.freedesktop.org/drm/intel/issues/8797
  [i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
  [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
  [i915#9527]: https://gitlab.freedesktop.org/drm/intel/issues/9527
  [i915#9648]: https://gitlab.freedesktop.org/drm/intel/issues/9648
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673


Build changes
-------------

  * Linux: CI_DRM_13884 -> Patchwork_126526v1

  CI-20190529: 20190529
  CI_DRM_13884: 9739fd04dfe62f6b46eb8f6af604decabb45a87b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7590: c484e1422184a3183d11f1595e53a6715574520f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_126526v1: 9739fd04dfe62f6b46eb8f6af604decabb45a87b @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

0fa83886da70 drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()
1c2f35d7d283 drm/i915/dp: Simplify intel_dp_max_data_rate()
66ed0f5da509 drm/i915/dp: Report a rounded-down value as the maximum data rate
7847a7837e95 drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
43361075d1e0 drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
c9377e356f79 drm/i915/dp: Fix UHBR link M/N values
9088871fcaf3 drm/i915/dp: Account for channel coding efficiency on UHBR links
a18ac6318440 drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
6538251c8da9 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
5812e2f581c8 drm/dp_mst: Fix PBN divider calculation for UHBR rates
65b2795ca84d drm/dp_mst: Store the MST PBN divider value in fixed point format

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/index.html

[-- Attachment #2: Type: text/html, Size: 11714 bytes --]

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 100278 bytes --]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values
URL   : https://patchwork.freedesktop.org/series/126526/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13884_full -> Patchwork_126526v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_126526v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126526v1_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
------------------------------

  Additional (1): shard-rkl0 
  Missing    (1): shard-tglu0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_126526v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_draw_crc@draw-method-blt@xrgb2101010-ytiled:
    - shard-glk:          [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-glk5/igt@kms_draw_crc@draw-method-blt@xrgb2101010-ytiled.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-glk5/igt@kms_draw_crc@draw-method-blt@xrgb2101010-ytiled.html

  
#### Warnings ####

  * igt@gem_pxp@create-protected-buffer:
    - shard-glk:          [SKIP][3] ([fdo#109271]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-glk4/igt@gem_pxp@create-protected-buffer.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-glk2/igt@gem_pxp@create-protected-buffer.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_pathological}:
    - shard-mtlp:         [PASS][5] -> [TIMEOUT][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-7/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_pathological.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_pathological.html

  * {igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0}:
    - shard-tglu:         [WARN][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-4/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html

  * {igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0}:
    - shard-dg1:          [PASS][9] -> [FAIL][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html

  * {igt@kms_psr@pr_basic}:
    - shard-mtlp:         NOTRUN -> [SKIP][11] +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_psr@pr_basic.html

  * {igt@kms_selftest@drm_format@drm_test_format_block_height_tiled}:
    - shard-snb:          [PASS][12] -> [TIMEOUT][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-snb6/igt@kms_selftest@drm_format@drm_test_format_block_height_tiled.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-snb6/igt@kms_selftest@drm_format@drm_test_format_block_height_tiled.html

  * {igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state}:
    - shard-rkl:          NOTRUN -> [TIMEOUT][14]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
    - shard-dg1:          [PASS][15] -> [TIMEOUT][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-15/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
    - shard-snb:          NOTRUN -> [TIMEOUT][17]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-snb5/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
    - shard-tglu:         [PASS][18] -> [TIMEOUT][19] +1 other test timeout
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-2/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html

  
New tests
---------

  New tests have been introduced between CI_DRM_13884_full and Patchwork_126526v1_full:

### New IGT tests (1) ###

  * igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_calc_pbn_div:
    - Statuses : 7 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_126526v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-purge-cache:
    - shard-mtlp:         NOTRUN -> [SKIP][20] ([i915#8411])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@api_intel_bb@blit-reloc-purge-cache.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          [PASS][21] -> [SKIP][22] ([i915#8411])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@api_intel_bb@object-reloc-purge-cache.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@api_intel_bb@render-ccs:
    - shard-dg2:          NOTRUN -> [FAIL][23] ([i915#6122])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@api_intel_bb@render-ccs.html

  * igt@debugfs_test@basic-hwmon:
    - shard-mtlp:         NOTRUN -> [SKIP][24] ([i915#9318])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@debugfs_test@basic-hwmon.html

  * igt@drm_fdinfo@busy-check-all@bcs0:
    - shard-dg1:          NOTRUN -> [SKIP][25] ([i915#8414]) +10 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@drm_fdinfo@busy-check-all@bcs0.html

  * igt@drm_fdinfo@busy-hang@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][26] ([i915#8414]) +12 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@drm_fdinfo@busy-hang@rcs0.html

  * igt@drm_fdinfo@busy-idle@bcs0:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#8414]) +19 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@drm_fdinfo@busy-idle@bcs0.html

  * igt@drm_fdinfo@idle@rcs0:
    - shard-rkl:          [PASS][28] -> [FAIL][29] ([i915#7742])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@drm_fdinfo@idle@rcs0.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@drm_fdinfo@idle@rcs0.html

  * igt@fbdev@unaligned-read:
    - shard-rkl:          [PASS][30] -> [SKIP][31] ([i915#2582])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@fbdev@unaligned-read.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@fbdev@unaligned-read.html

  * igt@gem_bad_reloc@negative-reloc-lut:
    - shard-rkl:          [PASS][32] -> [SKIP][33] ([i915#3281]) +7 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@gem_bad_reloc@negative-reloc-lut.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@gem_bad_reloc@negative-reloc-lut.html

  * igt@gem_basic@multigpu-create-close:
    - shard-mtlp:         NOTRUN -> [SKIP][34] ([i915#7697])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#4098] / [i915#9323])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
    - shard-dg1:          NOTRUN -> [SKIP][36] ([i915#9323])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][37] ([i915#9364])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_ctx_persistence@hang:
    - shard-mtlp:         NOTRUN -> [SKIP][38] ([i915#8555]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@gem_ctx_persistence@hang.html

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1:
    - shard-mtlp:         NOTRUN -> [SKIP][39] ([i915#5882]) +5 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1.html

  * igt@gem_exec_balancer@bonded-false-hang:
    - shard-dg1:          NOTRUN -> [SKIP][40] ([i915#4812])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gem_exec_balancer@bonded-false-hang.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-mtlp:         NOTRUN -> [SKIP][41] ([i915#4771]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@gem_exec_balancer@bonded-pair.html
    - shard-dg2:          NOTRUN -> [SKIP][42] ([i915#4771])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@sliced:
    - shard-dg2:          NOTRUN -> [SKIP][43] ([i915#4812]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_exec_balancer@sliced.html

  * igt@gem_exec_capture@many-4k-zero:
    - shard-dg2:          NOTRUN -> [FAIL][44] ([i915#9606])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_exec_capture@many-4k-zero.html

  * igt@gem_exec_endless@dispatch@bcs0:
    - shard-rkl:          [PASS][45] -> [SKIP][46] ([i915#9591])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-6/igt@gem_exec_endless@dispatch@bcs0.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_exec_endless@dispatch@bcs0.html

  * igt@gem_exec_fair@basic-flow:
    - shard-mtlp:         NOTRUN -> [SKIP][47] ([i915#4473] / [i915#4771])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_exec_fair@basic-flow.html

  * igt@gem_exec_fair@basic-none-vip:
    - shard-dg1:          NOTRUN -> [SKIP][48] ([i915#3539] / [i915#4852])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-13/igt@gem_exec_fair@basic-none-vip.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][49] -> [FAIL][50] ([i915#2842]) +1 other test fail
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-throttle:
    - shard-dg2:          NOTRUN -> [SKIP][51] ([i915#3539]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_exec_fair@basic-throttle.html

  * igt@gem_exec_fence@submit67:
    - shard-mtlp:         NOTRUN -> [SKIP][52] ([i915#4812])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@gem_exec_fence@submit67.html

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#3539] / [i915#4852]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@gem_exec_flush@basic-wb-prw-default.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-dg2:          NOTRUN -> [SKIP][54] ([fdo#109283] / [i915#5107])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_exec_params@secure-non-root:
    - shard-dg2:          NOTRUN -> [SKIP][55] ([fdo#112283])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_exec_params@secure-non-root.html

  * igt@gem_exec_reloc@basic-concurrent0:
    - shard-rkl:          NOTRUN -> [SKIP][56] ([i915#3281]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gem_exec_reloc@basic-concurrent0.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg2:          NOTRUN -> [SKIP][57] ([i915#3281]) +13 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-cpu-read-noreloc:
    - shard-dg1:          NOTRUN -> [SKIP][58] ([i915#3281] / [i915#4423])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@gem_exec_reloc@basic-cpu-read-noreloc.html

  * igt@gem_exec_reloc@basic-write-cpu-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][59] ([i915#3281]) +4 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_exec_reloc@basic-write-cpu-noreloc.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-dg1:          NOTRUN -> [SKIP][60] ([i915#3281]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-13/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#4537] / [i915#4812])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_exec_schedule@preempt-queue-contexts-chain.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy:
    - shard-dg1:          NOTRUN -> [SKIP][62] ([i915#4860])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html
    - shard-mtlp:         NOTRUN -> [SKIP][63] ([i915#4860])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html

  * igt@gem_lmem_swapping@heavy-multi:
    - shard-apl:          NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#4613]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl6/igt@gem_lmem_swapping@heavy-multi.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-tglu:         NOTRUN -> [SKIP][65] ([i915#4613])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@gem_lmem_swapping@heavy-verify-random.html
    - shard-mtlp:         NOTRUN -> [SKIP][66] ([i915#4613])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@random-engines@lmem0:
    - shard-dg1:          NOTRUN -> [DMESG-WARN][67] ([i915#4391] / [i915#4423])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@gem_lmem_swapping@random-engines@lmem0.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2:          [PASS][68] -> [DMESG-WARN][69] ([i915#4936] / [i915#5493])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-11/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-2/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_media_fill@media-fill:
    - shard-mtlp:         NOTRUN -> [SKIP][70] ([i915#8289])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_media_fill@media-fill.html

  * igt@gem_media_vme:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#284])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_media_vme.html

  * igt@gem_mmap@basic-small-bo:
    - shard-dg1:          NOTRUN -> [SKIP][72] ([i915#4083])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gem_mmap@basic-small-bo.html

  * igt@gem_mmap_gtt@bad-object:
    - shard-dg1:          NOTRUN -> [SKIP][73] ([i915#4077]) +4 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gem_mmap_gtt@bad-object.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#4077]) +7 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_mmap_gtt@cpuset-big-copy-odd.html

  * igt@gem_mmap_gtt@cpuset-medium-copy:
    - shard-mtlp:         NOTRUN -> [SKIP][75] ([i915#4077]) +3 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_mmap_gtt@cpuset-medium-copy.html

  * igt@gem_mmap_wc@close:
    - shard-mtlp:         NOTRUN -> [SKIP][76] ([i915#4083]) +2 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@gem_mmap_wc@close.html

  * igt@gem_mmap_wc@write-cpu-read-wc:
    - shard-dg2:          NOTRUN -> [SKIP][77] ([i915#4083]) +2 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_mmap_wc@write-cpu-read-wc.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-dg2:          NOTRUN -> [SKIP][78] ([i915#3282]) +7 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_partial_pwrite_pread@reads.html
    - shard-rkl:          [PASS][79] -> [SKIP][80] ([i915#3282]) +5 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@gem_partial_pwrite_pread@reads.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_partial_pwrite_pread@reads-display:
    - shard-mtlp:         NOTRUN -> [SKIP][81] ([i915#3282]) +2 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@gem_partial_pwrite_pread@reads-display.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-dg1:          NOTRUN -> [SKIP][82] ([i915#3282]) +2 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_partial_pwrite_pread@write-uncached:
    - shard-rkl:          NOTRUN -> [SKIP][83] ([i915#3282])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gem_partial_pwrite_pread@write-uncached.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-apl:          NOTRUN -> [WARN][84] ([i915#2658])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl6/igt@gem_pwrite@basic-exhaustion.html
    - shard-snb:          NOTRUN -> [WARN][85] ([i915#2658])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-snb5/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-dg1:          NOTRUN -> [SKIP][86] ([i915#4270]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
    - shard-tglu:         NOTRUN -> [SKIP][87] ([i915#4270]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
    - shard-mtlp:         NOTRUN -> [SKIP][88] ([i915#4270]) +2 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_pxp@fail-invalid-protected-context:
    - shard-rkl:          NOTRUN -> [SKIP][89] ([i915#4270])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gem_pxp@fail-invalid-protected-context.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-dg2:          NOTRUN -> [SKIP][90] ([i915#4270]) +3 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][91] ([i915#8428]) +3 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html

  * igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([i915#768]) +4 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-dg1:          NOTRUN -> [SKIP][93] ([i915#4079])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gem_render_tiled_blits@basic.html

  * igt@gem_softpin@evict-snoop:
    - shard-tglu:         NOTRUN -> [SKIP][94] ([fdo#109312])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@gem_softpin@evict-snoop.html
    - shard-mtlp:         NOTRUN -> [SKIP][95] ([i915#4885])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_softpin@evict-snoop.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][96] ([i915#3297])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg1:          NOTRUN -> [SKIP][97] ([i915#3297]) +1 other test skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@gem_userptr_blits@create-destroy-unsync.html
    - shard-tglu:         NOTRUN -> [SKIP][98] ([i915#3297])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@gem_userptr_blits@create-destroy-unsync.html
    - shard-mtlp:         NOTRUN -> [SKIP][99] ([i915#3297]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-dg2:          NOTRUN -> [SKIP][100] ([i915#3297] / [i915#4880])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gen3_render_mixed_blits:
    - shard-dg1:          NOTRUN -> [SKIP][101] ([fdo#109289]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gen3_render_mixed_blits.html

  * igt@gen7_exec_parse@basic-offset:
    - shard-dg2:          NOTRUN -> [SKIP][102] ([fdo#109289]) +3 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gen7_exec_parse@basic-offset.html
    - shard-mtlp:         NOTRUN -> [SKIP][103] ([fdo#109289])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@gen7_exec_parse@basic-offset.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-rkl:          [PASS][104] -> [SKIP][105] ([i915#2527])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@gen9_exec_parse@allowed-all.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@bb-chained:
    - shard-tglu:         NOTRUN -> [SKIP][106] ([i915#2527] / [i915#2856])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@gen9_exec_parse@bb-chained.html

  * igt@gen9_exec_parse@bb-start-out:
    - shard-dg2:          NOTRUN -> [SKIP][107] ([i915#2856]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gen9_exec_parse@bb-start-out.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#2527])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gen9_exec_parse@bb-start-param.html
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#2527])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@gen9_exec_parse@bb-start-param.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-mtlp:         NOTRUN -> [SKIP][110] ([i915#2856]) +4 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_hangman@gt-engine-error@bcs0:
    - shard-rkl:          [PASS][111] -> [SKIP][112] ([i915#9588])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@i915_hangman@gt-engine-error@bcs0.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@i915_hangman@gt-engine-error@bcs0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [PASS][113] -> [DMESG-WARN][114] ([i915#9559])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-1/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_freq_api@freq-basic-api:
    - shard-apl:          NOTRUN -> [SKIP][115] ([fdo#109271]) +156 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl7/igt@i915_pm_freq_api@freq-basic-api.html

  * igt@i915_pm_rps@basic-api:
    - shard-mtlp:         NOTRUN -> [SKIP][116] ([i915#6621])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@i915_pm_rps@basic-api.html

  * igt@i915_pm_rps@engine-order:
    - shard-apl:          NOTRUN -> [FAIL][117] ([i915#6537])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl4/igt@i915_pm_rps@engine-order.html

  * igt@i915_pm_rps@thresholds-idle-park@gt0:
    - shard-dg1:          NOTRUN -> [SKIP][118] ([i915#8925])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@i915_pm_rps@thresholds-idle-park@gt0.html

  * igt@i915_pm_sseu@full-enable:
    - shard-rkl:          NOTRUN -> [SKIP][119] ([i915#4387])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@i915_pm_sseu@full-enable.html
    - shard-dg1:          NOTRUN -> [SKIP][120] ([i915#4387])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@i915_pm_sseu@full-enable.html

  * igt@i915_suspend@forcewake:
    - shard-tglu:         [PASS][121] -> [INCOMPLETE][122] ([i915#8797])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-2/igt@i915_suspend@forcewake.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-4/igt@i915_suspend@forcewake.html

  * igt@kms_addfb_basic@addfb25-x-tiled-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][123] ([i915#4212]) +3 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][124] ([i915#4212])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_async_flips@crc@pipe-d-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][125] ([i915#8247]) +3 other tests fail
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-18/igt@kms_async_flips@crc@pipe-d-hdmi-a-4.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-dg2:          NOTRUN -> [SKIP][126] ([i915#9531])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][127] ([fdo#111614]) +3 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
    - shard-tglu:         NOTRUN -> [SKIP][128] ([fdo#111615] / [i915#5286])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][129] ([i915#5286])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-dg1:          NOTRUN -> [SKIP][130] ([i915#5286])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-13/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-mtlp:         [PASS][131] -> [FAIL][132] ([i915#5138])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][133] ([i915#4538] / [i915#5286]) +3 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         NOTRUN -> [FAIL][134] ([i915#5138])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-tglu:         NOTRUN -> [SKIP][135] ([fdo#111614])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][136] ([i915#3638]) +2 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
    - shard-rkl:          [PASS][137] -> [SKIP][138] ([i915#1845] / [i915#4098]) +34 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([fdo#111614] / [i915#3638])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#5190]) +14 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][141] ([i915#4538]) +2 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
    - shard-tglu:         NOTRUN -> [SKIP][142] ([fdo#111615])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-rkl:          NOTRUN -> [SKIP][143] ([fdo#110723])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([i915#4538] / [i915#5190])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg1:          NOTRUN -> [SKIP][145] ([fdo#111615])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][146] ([fdo#111615]) +6 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_joiner@basic:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#2705])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_big_joiner@basic.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-mtlp:         NOTRUN -> [SKIP][148] ([i915#7213])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][149] ([i915#7213]) +3 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-2/igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-2.html

  * igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][150] ([i915#4087]) +3 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([fdo#111827])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_chamelium_color@ctm-max.html
    - shard-dg1:          NOTRUN -> [SKIP][152] ([fdo#111827]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-tglu:         NOTRUN -> [SKIP][153] ([fdo#111827])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_chamelium_color@ctm-red-to-blue.html
    - shard-mtlp:         NOTRUN -> [SKIP][154] ([fdo#111827])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-rkl:          NOTRUN -> [SKIP][155] ([i915#7828]) +1 other test skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][156] ([i915#7828]) +7 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#7828]) +8 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
    - shard-tglu:         NOTRUN -> [SKIP][158] ([i915#7828]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html
    - shard-mtlp:         NOTRUN -> [SKIP][159] ([i915#7828]) +3 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html

  * igt@kms_color@deep-color@pipe-a-hdmi-a-2-gamma:
    - shard-rkl:          NOTRUN -> [FAIL][160] ([i915#6892]) +1 other test fail
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_color@deep-color@pipe-a-hdmi-a-2-gamma.html

  * igt@kms_content_protection@atomic@pipe-a-dp-1:
    - shard-apl:          NOTRUN -> [TIMEOUT][161] ([i915#7173])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl6/igt@kms_content_protection@atomic@pipe-a-dp-1.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-dg1:          NOTRUN -> [SKIP][162] ([i915#3299])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-13/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-tglu:         NOTRUN -> [SKIP][163] ([i915#3116] / [i915#3299])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_content_protection@dp-mst-type-0.html
    - shard-mtlp:         NOTRUN -> [SKIP][164] ([i915#3299])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@legacy@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [TIMEOUT][165] ([i915#7173])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_content_protection@legacy@pipe-a-dp-4.html

  * igt@kms_content_protection@uevent:
    - shard-mtlp:         NOTRUN -> [SKIP][166] ([i915#6944])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([i915#3555]) +4 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-tglu:         NOTRUN -> [SKIP][168] ([i915#3555])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-mtlp:         NOTRUN -> [SKIP][169] ([i915#3555] / [i915#8814]) +2 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-random-256x256:
    - shard-rkl:          NOTRUN -> [SKIP][170] ([i915#1845] / [i915#4098]) +24 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_cursor_crc@cursor-random-256x256.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-dg1:          NOTRUN -> [SKIP][171] ([i915#3555]) +5 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][172] ([i915#3359])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-tglu:         NOTRUN -> [SKIP][173] ([i915#4103])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
    - shard-mtlp:         NOTRUN -> [SKIP][174] ([i915#4213])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-tglu:         NOTRUN -> [SKIP][175] ([fdo#109274])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
    - shard-mtlp:         NOTRUN -> [SKIP][176] ([i915#3546]) +2 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][177] ([fdo#109274] / [i915#5354]) +2 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-apl:          NOTRUN -> [SKIP][178] ([fdo#109271] / [fdo#111767]) +1 other test skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl7/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_dirtyfb@dirtyfb-ioctl:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#3555]) +13 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_dirtyfb@dirtyfb-ioctl.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-dg2:          NOTRUN -> [SKIP][180] ([i915#8588])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_draw_crc@draw-method-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][181] ([i915#4098]) +10 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_draw_crc@draw-method-mmap-gtt.html
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#8812])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_draw_crc@draw-method-mmap-gtt.html

  * igt@kms_dsc@dsc-basic:
    - shard-mtlp:         NOTRUN -> [SKIP][183] ([i915#3555] / [i915#3840] / [i915#9159])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-dg1:          NOTRUN -> [SKIP][184] ([i915#3555] / [i915#3840])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][185] ([i915#3469])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-rkl:          NOTRUN -> [SKIP][186] ([fdo#111825])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
    - shard-snb:          NOTRUN -> [SKIP][187] ([fdo#109271] / [fdo#111767]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-snb5/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@2x-flip-vs-rmfb:
    - shard-mtlp:         NOTRUN -> [SKIP][188] ([i915#3637]) +3 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@kms_flip@2x-flip-vs-rmfb.html

  * igt@kms_flip@2x-flip-vs-rmfb-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][189] ([fdo#109274] / [fdo#111767])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][190] ([fdo#109274] / [i915#3637]) +2 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-dg2:          NOTRUN -> [SKIP][191] ([fdo#109274]) +4 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@dpms-off-confusion-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][192] ([i915#3637] / [i915#4098]) +8 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_flip@dpms-off-confusion-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][193] ([i915#2672]) +4 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][194] ([i915#2587] / [i915#2672]) +2 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][195] ([i915#2672]) +2 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][196] ([i915#2672]) +1 other test skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][197] ([i915#3555] / [i915#8810]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#2672] / [i915#3555])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-mtlp:         NOTRUN -> [SKIP][199] ([i915#5274])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([fdo#111825] / [i915#1825]) +8 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][201] ([fdo#111825]) +18 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][202] ([i915#8708]) +12 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-rkl:          [PASS][203] -> [SKIP][204] ([i915#1849] / [i915#4098] / [i915#5354]) +16 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][205] ([i915#3458]) +10 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-render.html
    - shard-tglu:         NOTRUN -> [SKIP][206] ([fdo#110189]) +5 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][207] ([i915#3458]) +10 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][208] ([i915#8708]) +4 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-tglu:         NOTRUN -> [SKIP][209] ([fdo#109280]) +9 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
    - shard-mtlp:         NOTRUN -> [SKIP][210] ([i915#1825]) +17 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
    - shard-rkl:          NOTRUN -> [SKIP][211] ([i915#3023]) +5 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][212] ([i915#4423] / [i915#8708])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt:
    - shard-dg2:          NOTRUN -> [SKIP][213] ([i915#5354]) +30 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][214] ([i915#8708]) +13 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-tglu:         NOTRUN -> [SKIP][215] ([i915#433])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][216] ([i915#3555] / [i915#8228])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-2/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@invalid-hdr:
    - shard-tglu:         NOTRUN -> [SKIP][217] ([i915#3555] / [i915#8228])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-toggle:
    - shard-rkl:          NOTRUN -> [SKIP][218] ([i915#3555] / [i915#8228])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_hdr@static-toggle.html
    - shard-dg1:          NOTRUN -> [SKIP][219] ([i915#3555] / [i915#8228])
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_hdr@static-toggle.html

  * igt@kms_invalid_mode@int-max-clock:
    - shard-rkl:          NOTRUN -> [SKIP][220] ([i915#3555] / [i915#4098]) +3 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_invalid_mode@int-max-clock.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-mtlp:         NOTRUN -> [SKIP][221] ([i915#4816])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
    - shard-dg2:          NOTRUN -> [SKIP][222] ([i915#4816])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-1:
    - shard-apl:          NOTRUN -> [ABORT][223] ([i915#180])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-1.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
    - shard-apl:          NOTRUN -> [DMESG-WARN][224] ([i915#180])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1.html

  * igt@kms_plane@plane-panning-top-left:
    - shard-rkl:          NOTRUN -> [SKIP][225] ([i915#4098] / [i915#8825])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_plane@plane-panning-top-left.html

  * igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-dp-1:
    - shard-apl:          NOTRUN -> [FAIL][226] ([i915#4573]) +1 other test fail
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl4/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-dp-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][227] ([i915#8292])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-dg1:          NOTRUN -> [FAIL][228] ([i915#8292])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][229] ([i915#8292])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][230] ([i915#5176]) +1 other test skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-rkl:          NOTRUN -> [SKIP][231] ([i915#3555] / [i915#4098] / [i915#8152])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][232] ([i915#5235]) +3 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-dp-4.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1:
    - shard-dg1:          NOTRUN -> [SKIP][233] ([i915#5235]) +3 other tests skip
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20:
    - shard-rkl:          NOTRUN -> [SKIP][234] ([i915#8152]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][235] ([i915#6953] / [i915#8152]) +1 other test skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][236] ([i915#5235]) +5 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][237] ([i915#4098] / [i915#6953] / [i915#8152])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#3555] / [i915#4098] / [i915#6953] / [i915#8152]) +1 other test skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-sf:
    - shard-tglu:         NOTRUN -> [SKIP][239] ([i915#9683])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
    - shard-dg1:          NOTRUN -> [SKIP][240] ([fdo#111068] / [i915#9683]) +2 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][241] ([i915#9683]) +3 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-mtlp:         NOTRUN -> [SKIP][242] ([i915#4348])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-dg1:          NOTRUN -> [SKIP][243] ([i915#9673]) +3 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_psr@psr2_cursor_render.html
    - shard-rkl:          NOTRUN -> [SKIP][244] ([i915#9673])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_psr@psr2_primary_render:
    - shard-dg2:          NOTRUN -> [SKIP][245] ([i915#9681]) +2 other tests skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_psr@psr2_primary_render.html

  * igt@kms_psr@psr2_sprite_plane_onoff:
    - shard-tglu:         NOTRUN -> [SKIP][246] ([i915#9673]) +1 other test skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_psr@psr2_sprite_plane_onoff.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-snb:          NOTRUN -> [SKIP][247] ([fdo#109271]) +50 other tests skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-snb5/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-rkl:          NOTRUN -> [SKIP][248] ([i915#5289])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
    - shard-dg1:          NOTRUN -> [SKIP][249] ([i915#5289])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][250] ([i915#4235])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-mtlp:         NOTRUN -> [SKIP][251] ([i915#5289])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-rkl:          [PASS][252] -> [INCOMPLETE][253] ([i915#8875] / [i915#9569])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-dg1:          NOTRUN -> [SKIP][254] ([fdo#111615] / [i915#5289])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-15/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-dg2:          NOTRUN -> [SKIP][255] ([i915#3555] / [i915#4098])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_setmode@clone-exclusive-crtc.html
    - shard-mtlp:         NOTRUN -> [SKIP][256] ([i915#3555] / [i915#8809])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2:          NOTRUN -> [SKIP][257] ([i915#8623])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
    - shard-mtlp:         [PASS][258] -> [FAIL][259] ([i915#9196])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-4/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-tglu:         [PASS][260] -> [FAIL][261] ([i915#9196])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-10/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-apl:          NOTRUN -> [SKIP][262] ([fdo#109271] / [i915#2437])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl4/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@perf@gen12-mi-rpc:
    - shard-rkl:          NOTRUN -> [SKIP][263] ([fdo#109289]) +2 other tests skip
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@perf@gen12-mi-rpc.html

  * igt@perf@global-sseu-config:
    - shard-mtlp:         NOTRUN -> [SKIP][264] ([i915#7387])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@perf@global-sseu-config.html

  * igt@perf@global-sseu-config-invalid:
    - shard-dg2:          NOTRUN -> [SKIP][265] ([i915#7387])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@perf@global-sseu-config-invalid.html

  * igt@perf@mi-rpc:
    - shard-tglu:         NOTRUN -> [SKIP][266] ([fdo#109289])
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@perf@mi-rpc.html
    - shard-mtlp:         NOTRUN -> [SKIP][267] ([i915#2434])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-5/igt@perf@mi-rpc.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          [PASS][268] -> [FAIL][269] ([i915#7484])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-6/igt@perf@non-zero-reason@0-rcs0.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-2/igt@perf@non-zero-reason@0-rcs0.html

  * igt@perf_pmu@busy-double-start@rcs0:
    - shard-mtlp:         [PASS][270] -> [FAIL][271] ([i915#4349])
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-8/igt@perf_pmu@busy-double-start@rcs0.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@perf_pmu@busy-double-start@rcs0.html

  * igt@perf_pmu@semaphore-busy@vcs1:
    - shard-dg1:          NOTRUN -> [FAIL][272] ([i915#4349]) +1 other test fail
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@perf_pmu@semaphore-busy@vcs1.html

  * igt@prime_udl:
    - shard-mtlp:         NOTRUN -> [SKIP][273] ([fdo#109291])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@prime_udl.html

  * igt@prime_vgem@basic-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][274] ([i915#3708] / [i915#4077])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@coherency-gtt:
    - shard-rkl:          [PASS][275] -> [SKIP][276] ([fdo#109295] / [fdo#111656] / [i915#3708])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@prime_vgem@coherency-gtt.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@prime_vgem@coherency-gtt.html

  * igt@prime_vgem@fence-write-hang:
    - shard-mtlp:         NOTRUN -> [SKIP][277] ([i915#3708])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@prime_vgem@fence-write-hang.html
    - shard-dg2:          NOTRUN -> [SKIP][278] ([i915#3708])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@prime_vgem@fence-write-hang.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-rkl:          NOTRUN -> [SKIP][279] ([fdo#109307])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@tools_test@sysfs_l3_parity.html
    - shard-dg1:          NOTRUN -> [SKIP][280] ([fdo#109307] / [i915#4818])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@tools_test@sysfs_l3_parity.html

  * igt@v3d/v3d_perfmon@get-values-invalid-perfmon:
    - shard-dg1:          NOTRUN -> [SKIP][281] ([i915#2575]) +10 other tests skip
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-17/igt@v3d/v3d_perfmon@get-values-invalid-perfmon.html

  * igt@v3d/v3d_submit_cl@bad-flag:
    - shard-tglu:         NOTRUN -> [SKIP][282] ([fdo#109315] / [i915#2575]) +2 other tests skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@v3d/v3d_submit_cl@bad-flag.html

  * igt@v3d/v3d_submit_cl@bad-multisync-pad:
    - shard-mtlp:         NOTRUN -> [SKIP][283] ([i915#2575]) +11 other tests skip
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@v3d/v3d_submit_cl@bad-multisync-pad.html

  * igt@v3d/v3d_submit_csd@bad-multisync-extension:
    - shard-rkl:          NOTRUN -> [SKIP][284] ([fdo#109315]) +3 other tests skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@v3d/v3d_submit_csd@bad-multisync-extension.html

  * igt@v3d/v3d_submit_csd@job-perfmon:
    - shard-dg2:          NOTRUN -> [SKIP][285] ([i915#2575]) +11 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@v3d/v3d_submit_csd@job-perfmon.html

  * igt@vc4/vc4_create_bo@create-bo-0:
    - shard-dg2:          NOTRUN -> [SKIP][286] ([i915#7711]) +6 other tests skip
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@vc4/vc4_create_bo@create-bo-0.html

  * igt@vc4/vc4_lookup_fail@bad-color-write:
    - shard-dg1:          NOTRUN -> [SKIP][287] ([i915#7711]) +4 other tests skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-13/igt@vc4/vc4_lookup_fail@bad-color-write.html

  * igt@vc4/vc4_perfmon@destroy-invalid-perfmon:
    - shard-rkl:          NOTRUN -> [SKIP][288] ([i915#7711])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@vc4/vc4_perfmon@destroy-invalid-perfmon.html

  * igt@vc4/vc4_perfmon@destroy-valid-perfmon:
    - shard-mtlp:         NOTRUN -> [SKIP][289] ([i915#7711]) +3 other tests skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@vc4/vc4_perfmon@destroy-valid-perfmon.html

  * igt@vc4/vc4_wait_seqno@bad-seqno-0ns:
    - shard-tglu:         NOTRUN -> [SKIP][290] ([i915#2575]) +1 other test skip
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@vc4/vc4_wait_seqno@bad-seqno-0ns.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-dg1:          [DMESG-WARN][291] ([i915#4391] / [i915#4423]) -> [PASS][292]
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-16/igt@core_hotunplug@unbind-rebind.html
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-19/igt@core_hotunplug@unbind-rebind.html

  * {igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_pathological}:
    - shard-dg1:          [TIMEOUT][293] -> [PASS][294]
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-13/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_pathological.html
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-13/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_pathological.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          [FAIL][295] ([i915#7742]) -> [PASS][296] +2 other tests pass
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-1/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@drm_read@short-buffer-nonblock:
    - shard-rkl:          [SKIP][297] ([i915#4098]) -> [PASS][298] +9 other tests pass
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@drm_read@short-buffer-nonblock.html
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@drm_read@short-buffer-nonblock.html

  * igt@fbdev@read:
    - shard-rkl:          [SKIP][299] ([i915#2582]) -> [PASS][300] +1 other test pass
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@fbdev@read.html
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@fbdev@read.html

  * igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-smem-lmem0:
    - shard-dg2:          [INCOMPLETE][301] ([i915#7297]) -> [PASS][302]
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-6/igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-smem-lmem0.html
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-11/igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-smem-lmem0.html

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
    - shard-mtlp:         [ABORT][303] ([i915#9414]) -> [PASS][304]
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-4/igt@gem_ctx_isolation@preservation-s3@rcs0.html
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-6/igt@gem_ctx_isolation@preservation-s3@rcs0.html

  * igt@gem_ctx_persistence@legacy-engines-hang@blt:
    - shard-rkl:          [SKIP][305] ([i915#6252]) -> [PASS][306]
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@gem_ctx_persistence@legacy-engines-hang@blt.html
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@gem_ctx_persistence@legacy-engines-hang@blt.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [FAIL][307] ([i915#5784]) -> [PASS][308]
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-18/igt@gem_eio@reset-stress.html
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-18/igt@gem_eio@reset-stress.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-glk:          [FAIL][309] ([i915#2842]) -> [PASS][310]
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-glk4/igt@gem_exec_fair@basic-none-share@rcs0.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-glk8/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-tglu:         [FAIL][311] ([i915#2842]) -> [PASS][312]
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-rkl:          [SKIP][313] ([i915#3281]) -> [PASS][314] +7 other tests pass
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@gem_exec_reloc@basic-write-read.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_exec_suspend@basic-s4-devices@smem:
    - shard-mtlp:         [ABORT][315] ([i915#7975] / [i915#8213] / [i915#9262]) -> [PASS][316]
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-4/igt@gem_exec_suspend@basic-s4-devices@smem.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-4/igt@gem_exec_suspend@basic-s4-devices@smem.html

  * igt@gem_mmap_gtt@coherency:
    - shard-rkl:          [SKIP][317] ([fdo#111656]) -> [PASS][318]
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@gem_mmap_gtt@coherency.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_mmap_gtt@coherency.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-rkl:          [SKIP][319] ([i915#1850]) -> [PASS][320]
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@gem_mmap_wc@set-cache-level.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@gem_mmap_wc@set-cache-level.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-rkl:          [SKIP][321] ([i915#3282]) -> [PASS][322] +6 other tests pass
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-rkl:          [SKIP][323] ([i915#8411]) -> [PASS][324] +1 other test pass
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-4/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-apl:          [INCOMPLETE][325] ([i915#5566]) -> [PASS][326]
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-apl1/igt@gen9_exec_parse@allowed-single.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl7/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-rkl:          [SKIP][327] ([i915#2527]) -> [PASS][328] +3 other tests pass
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@gen9_exec_parse@shadow-peek.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_hangman@engine-engine-error@bcs0:
    - shard-rkl:          [SKIP][329] ([i915#9588]) -> [PASS][330]
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@i915_hangman@engine-engine-error@bcs0.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@i915_hangman@engine-engine-error@bcs0.html

  * {igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0}:
    - shard-dg1:          [FAIL][331] -> [PASS][332]
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-180:
    - shard-mtlp:         [FAIL][333] ([i915#5138]) -> [PASS][334]
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-5/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-tglu:         [FAIL][335] ([i915#3743]) -> [PASS][336] +1 other test pass
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-rkl:          [SKIP][337] ([i915#1845] / [i915#4098]) -> [PASS][338] +13 other tests pass
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-rkl:          [SKIP][339] ([i915#1849] / [i915#4098]) -> [PASS][340]
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_fbcon_fbt@fbc-suspend.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank@b-vga1:
    - shard-snb:          [ABORT][341] -> [PASS][342]
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-snb7/igt@kms_flip@flip-vs-blocking-wf-vblank@b-vga1.html
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-snb5/igt@kms_flip@flip-vs-blocking-wf-vblank@b-vga1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][343] ([i915#1849] / [i915#4098] / [i915#5354]) -> [PASS][344] +8 other tests pass
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
    - shard-dg2:          [FAIL][345] ([i915#6880]) -> [PASS][346]
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1:
    - shard-apl:          [INCOMPLETE][347] ([i915#180] / [i915#9392]) -> [PASS][348]
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html

  * {igt@kms_pm_rpm@modeset-non-lpsp}:
    - shard-rkl:          [SKIP][349] ([i915#9519]) -> [PASS][350]
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp.html

  * {igt@kms_pm_rpm@modeset-non-lpsp-stress}:
    - shard-dg1:          [SKIP][351] ([i915#9519]) -> [PASS][352]
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg1-19/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg1-18/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_properties@crtc-properties-legacy:
    - shard-rkl:          [SKIP][353] ([i915#1849]) -> [PASS][354] +2 other tests pass
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_properties@crtc-properties-legacy.html
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_properties@crtc-properties-legacy.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-rkl:          [INCOMPLETE][355] ([i915#9569]) -> [PASS][356]
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * {igt@kms_selftest@drm_damage_helper@drm_test_damage_iter_no_damage_no_crtc}:
    - shard-tglu:         [TIMEOUT][357] -> [PASS][358] +1 other test pass
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-10/igt@kms_selftest@drm_damage_helper@drm_test_damage_iter_no_damage_no_crtc.html
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-3/igt@kms_selftest@drm_damage_helper@drm_test_damage_iter_no_damage_no_crtc.html

  * {igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create}:
    - shard-apl:          [TIMEOUT][359] -> [PASS][360] +1 other test pass
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-apl2/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-apl2/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html
    - shard-dg2:          [TIMEOUT][361] -> [PASS][362]
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-2/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html

  * {igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state}:
    - shard-mtlp:         [TIMEOUT][363] -> [PASS][364]
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-3/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-1/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html

  * {igt@kms_selftest@drm_plane_helper@drm_test_check_plane_state}:
    - shard-rkl:          [TIMEOUT][365] -> [PASS][366]
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_selftest@drm_plane_helper@drm_test_check_plane_state.html
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_selftest@drm_plane_helper@drm_test_check_plane_state.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
    - shard-mtlp:         [FAIL][367] ([i915#9196]) -> [PASS][368]
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-4/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][369] ([i915#9196]) -> [PASS][370]
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-tglu-10/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html

  * igt@perf@gen12-group-exclusive-stream-sample-oa:
    - shard-rkl:          [SKIP][371] ([fdo#109289]) -> [PASS][372]
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@perf@gen12-group-exclusive-stream-sample-oa.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@perf@gen12-group-exclusive-stream-sample-oa.html

  * igt@perf_pmu@busy-double-start@ccs0:
    - shard-mtlp:         [FAIL][373] ([i915#4349]) -> [PASS][374]
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-mtlp-8/igt@perf_pmu@busy-double-start@ccs0.html
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-mtlp-7/igt@perf_pmu@busy-double-start@ccs0.html

  * igt@perf_pmu@busy-double-start@vecs1:
    - shard-dg2:          [FAIL][375] ([i915#4349]) -> [PASS][376] +3 other tests pass
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-dg2-1/igt@perf_pmu@busy-double-start@vecs1.html
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-dg2-6/igt@perf_pmu@busy-double-start@vecs1.html

  * igt@prime_vgem@basic-fence-read:
    - shard-rkl:          [SKIP][377] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][378] +1 other test pass
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-6/igt@prime_vgem@basic-fence-read.html
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@prime_vgem@basic-fence-read.html

  
#### Warnings ####

  * igt@gem_ccs@block-copy-compressed:
    - shard-rkl:          [SKIP][379] ([i915#3555]) -> [SKIP][380] ([i915#7957])
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-6/igt@gem_ccs@block-copy-compressed.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-rkl:          [SKIP][381] ([i915#9323]) -> [SKIP][382] ([i915#7957])
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@gem_ccs@block-multicopy-compressed.html
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-rkl:          [SKIP][383] ([i915#3282]) -> [WARN][384] ([i915#2658])
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@gem_pwrite@basic-exhaustion.html
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@gem_pwrite@basic-exhaustion.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-rkl:          [SKIP][385] ([i915#2532]) -> [SKIP][386] ([i915#2527])
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@gen9_exec_parse@bb-oversize.html
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@gen9_exec_parse@bb-oversize.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-rkl:          [SKIP][387] ([i915#1845] / [i915#4098]) -> [SKIP][388] ([i915#9531])
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-rkl:          [SKIP][389] ([i915#5286]) -> [SKIP][390] ([i915#1845] / [i915#4098]) +5 other tests skip
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-180:
    - shard-rkl:          [SKIP][391] ([i915#1845] / [i915#4098]) -> [SKIP][392] ([i915#5286]) +4 other tests skip
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
    - shard-rkl:          [SKIP][393] ([fdo#111614] / [i915#3638]) -> [SKIP][394] ([i915#1845] / [i915#4098]) +3 other tests skip
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-6/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-rkl:          [SKIP][395] ([i915#1845] / [i915#4098]) -> [SKIP][396] ([fdo#111614] / [i915#3638])
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
    - shard-rkl:          [SKIP][397] ([i915#1845] / [i915#4098]) -> [SKIP][398] ([fdo#110723]) +3 other tests skip
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-rkl:          [SKIP][399] ([i915#1845] / [i915#4098]) -> [SKIP][400] ([fdo#111615])
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-rkl:          [SKIP][401] ([fdo#111615]) -> [SKIP][402] ([i915#1845] / [i915#4098])
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-rkl:          [SKIP][403] ([fdo#110723]) -> [SKIP][404] ([i915#1845] / [i915#4098]) +5 other tests skip
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-rkl:          [SKIP][405] ([i915#1845] / [i915#4098]) -> [SKIP][406] ([i915#3116])
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_content_protection@dp-mst-lic-type-1.html
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-rkl:          [SKIP][407] ([i915#3116]) -> [SKIP][408] ([i915#1845] / [i915#4098])
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-6/igt@kms_content_protection@dp-mst-type-1.html
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-rkl:          [SKIP][409] ([i915#7118]) -> [SKIP][410] ([i915#1845] / [i915#4098]) +1 other test skip
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_content_protection@legacy.html
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@srm:
    - shard-rkl:          [SKIP][411] ([i915#1845] / [i915#4098]) -> [SKIP][412] ([i915#7118])
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_content_protection@srm.html
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-rkl:          [SKIP][413] ([i915#1845] / [i915#4098]) -> [SKIP][414] ([i915#3555]) +1 other test skip
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-32x10.html
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-rkl:          [SKIP][415] ([i915#1845] / [i915#4098]) -> [SKIP][416] ([i915#3359]) +1 other test skip
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-rkl:          [SKIP][417] ([i915#3359]) -> [SKIP][418] ([i915#1845] / [i915#4098]) +1 other test skip
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-512x512.html
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-rkl:          [SKIP][419] ([fdo#111767] / [fdo#111825]) -> [SKIP][420] ([i915#1845] / [i915#4098])
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-rkl:          [SKIP][421] ([i915#4103]) -> [SKIP][422] ([i915#1845] / [i915#4098])
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-rkl:          [SKIP][423] ([i915#1845] / [i915#4098]) -> [SKIP][424] ([i915#4103])
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-rkl:          [SKIP][425] ([fdo#111825]) -> [SKIP][426] ([i915#1845] / [i915#4098]) +1 other test skip
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-rkl:          [SKIP][427] ([i915#1845] / [i915#4098]) -> [SKIP][428] ([fdo#111825]) +5 other tests skip
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-rkl:          [SKIP][429] ([i915#4098]) -> [SKIP][430] ([i915#8588])
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_display_modes@mst-extended-mode-negative.html
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-1/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-rkl:          [SKIP][431] ([i915#3555] / [i915#3840]) -> [SKIP][432] ([i915#1845] / [i915#4098])
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-4/igt@kms_dsc@dsc-with-bpc-formats.html
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbcon_fbt@psr:
    - shard-rkl:          [SKIP][433] ([i915#3955]) -> [SKIP][434] ([fdo#110189] / [i915#3955])
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-6/igt@kms_fbcon_fbt@psr.html
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_fbcon_fbt@psr.html

  * igt@kms_force_connector_basic@force-load-detect:
    - shard-rkl:          [SKIP][435] ([fdo#109285] / [i915#4098]) -> [SKIP][436] ([fdo#109285])
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_force_connector_basic@force-load-detect.html
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-6/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-rkl:          [SKIP][437] ([i915#3023]) -> [SKIP][438] ([i915#1849] / [i915#4098] / [i915#5354]) +27 other tests skip
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt:
    - shard-rkl:          [SKIP][439] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][440] ([fdo#111825] / [i915#1825]) +24 other tests skip
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          [SKIP][441] ([fdo#111825] / [i915#1825]) -> [SKIP][442] ([i915#1849] / [i915#4098] / [i915#5354]) +41 other tests skip
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-rkl:          [SKIP][443] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][444] ([i915#3023]) +14 other tests skip
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13884/shard

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v1/index.html

[-- Attachment #2: Type: text/html, Size: 109634 bytes --]

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL   : https://patchwork.freedesktop.org/series/126526/
State : warning

== Summary ==

Error: dim checkpatch failed
6342447c744c drm/dp_mst: Store the MST PBN divider value in fixed point format
-:45: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#45: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:6915:
+		mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));

-:87: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#87: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c:945:
+			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, dfixed_trunc(mst_state->pbn_div));

-:91: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#91: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c:948:
+			(63 - link_timeslots_used) / remaining_to_increase * dfixed_trunc(mst_state->pbn_div);

total: 0 errors, 3 warnings, 0 checks, 176 lines checked
a5a67b8d2d38 drm/dp_mst: Fix PBN divider calculation for UHBR rates
91c286f3e426 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
-:167: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#167: FILE: drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:205:
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(&mgr, params->link_rate, params->lane_count).full,

total: 0 errors, 1 warnings, 0 checks, 159 lines checked
cf90fb72a753 drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
3dc4aa3c5ba0 drm/i915/dp: Account for channel coding efficiency on UHBR links
248f4ebb3a74 drm/i915/dp: Fix UHBR link M/N values
a4f29fb44362 drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
d7242ec4a694 drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
09f8b9574450 drm/i915/dp: Report a rounded-down value as the maximum data rate
-:25: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#25: FILE: drivers/gpu/drm/i915/display/intel_dp.c:416:
+		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);

total: 0 errors, 1 warnings, 0 checks, 16 lines checked
32c0e45f1cb5 drm/i915/dp: Simplify intel_dp_max_data_rate()
dab9f41557ac drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL   : https://patchwork.freedesktop.org/series/126526/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 9470 bytes --]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL   : https://patchwork.freedesktop.org/series/126526/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13888 -> Patchwork_126526v5
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/index.html

Participating hosts (38 -> 25)
------------------------------

  Additional (1): bat-dg1-5 
  Missing    (14): fi-kbl-soraka bat-mtlp-8 fi-bsw-n3050 bat-adlm-1 bat-dg2-9 fi-cfl-guc bat-adlp-6 fi-snb-2520m fi-ivb-3770 fi-pnv-d510 bat-dg2-14 bat-dg2-13 bat-dg2-11 fi-skl-6600u 

Known issues
------------

  Here are the changes found in Patchwork_126526v5 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][1] ([i915#4083])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@gem_mmap@basic.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg1-5:          NOTRUN -> [SKIP][4] ([i915#6621])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@gt_heartbeat:
    - bat-kbl-2:          [PASS][5] -> [DMESG-FAIL][6] ([i915#7872])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/bat-kbl-2/igt@i915_selftest@live@gt_heartbeat.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-kbl-2/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_timelines:
    - fi-hsw-4770:        [PASS][7] -> [INCOMPLETE][8] ([i915#9527])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/fi-hsw-4770/igt@i915_selftest@live@gt_timelines.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/fi-hsw-4770/igt@i915_selftest@live@gt_timelines.html

  * igt@i915_selftest@live@mman:
    - bat-rpls-1:         [PASS][9] -> [TIMEOUT][10] ([i915#6794] / [i915#7392])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/bat-rpls-1/igt@i915_selftest@live@mman.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-rpls-1/igt@i915_selftest@live@mman.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - bat-rpls-1:         [PASS][11] -> [WARN][12] ([i915#8747])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/bat-rpls-1/igt@i915_suspend@basic-s2idle-without-i915.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-rpls-1/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][13] ([i915#4212]) +7 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][14] ([i915#4215])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][15] ([i915#4103] / [i915#4213]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-dg1-5:          NOTRUN -> [SKIP][17] ([fdo#109285])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
    - bat-dg1-5:          NOTRUN -> [SKIP][18] ([i915#433])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-dg1-5:          NOTRUN -> [SKIP][19] ([i915#3555])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-dg1-5:          NOTRUN -> [SKIP][20] ([i915#3708]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - bat-dg1-5:          NOTRUN -> [SKIP][21] ([i915#3708] / [i915#4077]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-dg1-5/igt@prime_vgem@basic-gtt.html

  
#### Possible fixes ####

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
    - bat-rplp-1:         [ABORT][22] ([i915#8668]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html

  * {igt@kms_psr@psr_cursor_plane_move@edp-1}:
    - bat-jsl-3:          [SKIP][24] ([i915#9648]) -> [PASS][25] +3 other tests pass
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/bat-jsl-3/igt@kms_psr@psr_cursor_plane_move@edp-1.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-jsl-3/igt@kms_psr@psr_cursor_plane_move@edp-1.html

  * {igt@kms_psr@psr_primary_page_flip@edp-1}:
    - bat-jsl-1:          [SKIP][26] ([i915#9648]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/bat-jsl-1/igt@kms_psr@psr_primary_page_flip@edp-1.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/bat-jsl-1/igt@kms_psr@psr_primary_page_flip@edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
  [i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
  [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#8747]: https://gitlab.freedesktop.org/drm/intel/issues/8747
  [i915#9527]: https://gitlab.freedesktop.org/drm/intel/issues/9527
  [i915#9648]: https://gitlab.freedesktop.org/drm/intel/issues/9648
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673


Build changes
-------------

  * Linux: CI_DRM_13888 -> Patchwork_126526v5

  CI-20190529: 20190529
  CI_DRM_13888: 71624dec921946f36029faeb0f35022940a11b82 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7594: 8478eefdaa3eef02b4370339ef0d1970d44a67a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_126526v5: 71624dec921946f36029faeb0f35022940a11b82 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

8b25cb3c4a3a drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()
ef899369f9a8 drm/i915/dp: Simplify intel_dp_max_data_rate()
e6adeb55e1ff drm/i915/dp: Report a rounded-down value as the maximum data rate
5c4f401f6331 drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
ed724afab0f4 drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
3a48bcf52b7f drm/i915/dp: Fix UHBR link M/N values
ee230f9636a4 drm/i915/dp: Account for channel coding efficiency on UHBR links
c3fe6d944a05 drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
8fd67162ded0 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
923c64490e98 drm/dp_mst: Fix PBN divider calculation for UHBR rates
838b53e1569a drm/dp_mst: Store the MST PBN divider value in fixed point format

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/index.html

[-- Attachment #2: Type: text/html, Size: 10782 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)

[Patchwork]

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== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL   : https://patchwork.freedesktop.org/series/126526/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13888_full -> Patchwork_126526v5_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 9)
------------------------------

  Missing    (2): shard-mtlp0 shard-rkl0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_126526v5_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_limit}:
    - shard-glk:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk3/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_limit.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk2/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_limit.html

  * {igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_optimistic}:
    - shard-mtlp:         [PASS][3] -> [TIMEOUT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-5/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_optimistic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-5/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_optimistic.html

  * {igt@drm_mm@drm_mm@drm_test_mm_lowest}:
    - shard-rkl:          [PASS][5] -> [TIMEOUT][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@drm_mm@drm_mm@drm_test_mm_lowest.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@drm_mm@drm_mm@drm_test_mm_lowest.html

  * {igt@kms_psr@pr_cursor_mmap_cpu}:
    - shard-mtlp:         NOTRUN -> [SKIP][7] +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_psr@pr_cursor_mmap_cpu.html

  * {igt@kms_selftest@drm_cmdline_parser@drm_test_cmdline_tv_options}:
    - shard-snb:          NOTRUN -> [TIMEOUT][8]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb7/igt@kms_selftest@drm_cmdline_parser@drm_test_cmdline_tv_options.html

  * {igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode}:
    - shard-dg2:          NOTRUN -> [TIMEOUT][9]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode.html

  * {igt@kms_selftest@drm_format@drm_test_format_min_pitch_one_plane_24bpp}:
    - shard-snb:          [PASS][10] -> [TIMEOUT][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-snb4/igt@kms_selftest@drm_format@drm_test_format_min_pitch_one_plane_24bpp.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb6/igt@kms_selftest@drm_format@drm_test_format_min_pitch_one_plane_24bpp.html

  
New tests
---------

  New tests have been introduced between CI_DRM_13888_full and Patchwork_126526v5_full:

### New IGT tests (1) ###

  * igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_calc_pbn_div:
    - Statuses : 8 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_126526v5_full that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - shard-glk:          ([PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36]) -> ([PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [FAIL][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61]) ([i915#8293])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk9/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk9/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk9/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk9/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk8/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk8/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk8/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk8/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk5/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk5/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk5/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk5/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk4/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk4/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk4/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk4/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk3/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk3/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk3/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk3/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk2/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk2/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk2/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk2/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk2/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk9/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk9/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk9/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk9/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk9/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk8/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk8/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk8/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk8/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk5/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk5/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk5/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk4/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk4/boot.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk4/boot.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk4/boot.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk3/boot.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk3/boot.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk3/boot.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk3/boot.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk3/boot.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk2/boot.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk2/boot.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk2/boot.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk2/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-dg2:          NOTRUN -> [SKIP][62] ([i915#7701])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@drm_fdinfo@busy@vcs1:
    - shard-dg1:          NOTRUN -> [SKIP][63] ([i915#8414]) +5 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@drm_fdinfo@busy@vcs1.html

  * igt@drm_fdinfo@virtual-idle:
    - shard-rkl:          [PASS][64] -> [FAIL][65] ([i915#7742]) +1 other test fail
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@drm_fdinfo@virtual-idle.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@drm_fdinfo@virtual-idle.html

  * igt@fbdev@write:
    - shard-rkl:          [PASS][66] -> [SKIP][67] ([i915#2582])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@fbdev@write.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@fbdev@write.html

  * igt@gem_basic@multigpu-create-close:
    - shard-rkl:          NOTRUN -> [SKIP][68] ([i915#7697])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_basic@multigpu-create-close.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#7697])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_eio@in-flight-external:
    - shard-mtlp:         [PASS][70] -> [ABORT][71] ([i915#9414]) +2 other tests abort
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-4/igt@gem_eio@in-flight-external.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-8/igt@gem_eio@in-flight-external.html

  * igt@gem_exec_balancer@bonded-false-hang:
    - shard-dg2:          NOTRUN -> [SKIP][72] ([i915#4812]) +2 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_exec_balancer@bonded-false-hang.html

  * igt@gem_exec_balancer@noheartbeat:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#8555]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_exec_balancer@noheartbeat.html

  * igt@gem_exec_balancer@sliced:
    - shard-mtlp:         NOTRUN -> [SKIP][74] ([i915#4812]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_exec_balancer@sliced.html

  * igt@gem_exec_capture@capture-invisible@lmem0:
    - shard-dg2:          NOTRUN -> [SKIP][75] ([i915#6334]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_exec_capture@capture-invisible@lmem0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-rkl:          [PASS][76] -> [FAIL][77] ([i915#2842]) +1 other test fail
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@gem_exec_fair@basic-pace@vecs0.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_flush@basic-wb-rw-default:
    - shard-dg2:          NOTRUN -> [SKIP][78] ([i915#3539] / [i915#4852]) +2 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@gem_exec_flush@basic-wb-rw-default.html

  * igt@gem_exec_params@secure-non-root:
    - shard-rkl:          NOTRUN -> [SKIP][79] ([fdo#112283])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_exec_params@secure-non-root.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg2:          NOTRUN -> [SKIP][80] ([i915#3281]) +7 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][81] ([i915#3281]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html

  * igt@gem_exec_reloc@basic-gtt-wc-noreloc:
    - shard-rkl:          [PASS][82] -> [SKIP][83] ([i915#3281]) +10 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html

  * igt@gem_exec_reloc@basic-scanout@bcs0:
    - shard-rkl:          NOTRUN -> [SKIP][84] ([i915#3639]) +3 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_exec_reloc@basic-scanout@bcs0.html

  * igt@gem_exec_reloc@basic-write-wc-active:
    - shard-dg1:          NOTRUN -> [SKIP][85] ([i915#3281])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_exec_reloc@basic-write-wc-active.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain:
    - shard-mtlp:         NOTRUN -> [SKIP][86] ([i915#4537] / [i915#4812])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_exec_schedule@preempt-queue-contexts-chain.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          [PASS][87] -> [SKIP][88] ([i915#7276])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_exec_schedule@semaphore-power.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_exec_suspend@basic-s4-devices@smem:
    - shard-rkl:          NOTRUN -> [ABORT][89] ([i915#7975] / [i915#8213])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_exec_suspend@basic-s4-devices@smem.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy:
    - shard-dg1:          NOTRUN -> [SKIP][90] ([i915#4860])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          NOTRUN -> [SKIP][91] ([i915#4613] / [i915#7582])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - shard-apl:          NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#4613])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl2/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [PASS][93] -> [DMESG-WARN][94] ([i915#4936] / [i915#5493])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-dg1-17/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_mmap@bad-size:
    - shard-mtlp:         NOTRUN -> [SKIP][95] ([i915#4083]) +3 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_mmap@bad-size.html

  * igt@gem_mmap_gtt@basic-wc:
    - shard-mtlp:         NOTRUN -> [SKIP][96] ([i915#4077]) +1 other test skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_mmap_gtt@basic-wc.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-xy:
    - shard-dg2:          NOTRUN -> [SKIP][97] ([i915#4077]) +5 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html

  * igt@gem_mmap_wc@read-write-distinct:
    - shard-dg1:          NOTRUN -> [SKIP][98] ([i915#4083])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_mmap_wc@read-write-distinct.html

  * igt@gem_mmap_wc@write-cpu-read-wc-unflushed:
    - shard-dg2:          NOTRUN -> [SKIP][99] ([i915#4083]) +3 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@gem_mmap_wc@write-cpu-read-wc-unflushed.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-rkl:          [PASS][100] -> [SKIP][101] ([i915#3282]) +4 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_partial_pwrite_pread@reads.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_partial_pwrite_pread@reads-snoop:
    - shard-dg2:          NOTRUN -> [SKIP][102] ([i915#3282]) +3 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_partial_pwrite_pread@reads-snoop.html

  * igt@gem_pread@snoop:
    - shard-dg1:          NOTRUN -> [SKIP][103] ([i915#3282]) +1 other test skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_pread@snoop.html

  * igt@gem_pxp@create-regular-context-2:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#4270]) +3 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_pxp@create-regular-context-2.html

  * igt@gem_pxp@display-protected-crc:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#4270])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_pxp@display-protected-crc.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][106] ([i915#8428]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html

  * igt@gem_render_copy@y-tiled-mc-ccs-to-y-tiled-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#768]) +3 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_render_copy@y-tiled-mc-ccs-to-y-tiled-ccs.html

  * igt@gem_render_copy@yf-tiled-ccs-to-y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][108] ([i915#5190]) +7 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@gem_render_copy@yf-tiled-ccs-to-y-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          [PASS][109] -> [SKIP][110] ([i915#8411])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][111] ([i915#4079])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][112] ([i915#4079])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#3297]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@forbidden-operations:
    - shard-mtlp:         NOTRUN -> [SKIP][114] ([i915#3282])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-mtlp:         NOTRUN -> [SKIP][115] ([i915#3297]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-mtlp:         NOTRUN -> [FAIL][116] ([i915#3318])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gem_userptr_blits@vma-merge.html

  * igt@gen3_render_linear_blits:
    - shard-dg2:          NOTRUN -> [SKIP][117] ([fdo#109289]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gen3_render_linear_blits.html

  * igt@gen7_exec_parse@bitmasks:
    - shard-mtlp:         NOTRUN -> [SKIP][118] ([fdo#109289])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@gen7_exec_parse@bitmasks.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-dg1:          NOTRUN -> [SKIP][119] ([i915#2527])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gen9_exec_parse@shadow-peek.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#2856]) +2 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@gen9_exec_parse@unaligned-jump.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-rkl:          [PASS][121] -> [SKIP][122] ([i915#2527]) +4 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_module_load@load:
    - shard-dg2:          NOTRUN -> [SKIP][123] ([i915#6227])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@i915_module_load@load.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [PASS][124] -> [DMESG-WARN][125] ([i915#9559])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-dg2-1/igt@i915_module_load@reload-with-fault-injection.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pipe_stress@stress-xrgb8888-untiled:
    - shard-apl:          NOTRUN -> [FAIL][126] ([i915#7036])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl1/igt@i915_pipe_stress@stress-xrgb8888-untiled.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][127] ([i915#8399])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_rps@thresholds-park@gt0:
    - shard-dg2:          NOTRUN -> [SKIP][128] ([i915#8925]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@i915_pm_rps@thresholds-park@gt0.html

  * igt@i915_power@sanity:
    - shard-rkl:          [PASS][129] -> [SKIP][130] ([i915#7984])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@i915_power@sanity.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@i915_power@sanity.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-dg1:          NOTRUN -> [SKIP][131] ([i915#4077]) +4 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@i915_suspend@fence-restore-untiled.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-apl:          NOTRUN -> [SKIP][132] ([fdo#109271] / [i915#1769])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_atomic_transition@plane-use-after-nonblocking-unbind:
    - shard-rkl:          NOTRUN -> [SKIP][133] ([i915#1845] / [i915#4098]) +49 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_atomic_transition@plane-use-after-nonblocking-unbind.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][134] ([fdo#111614])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][135] ([i915#4538] / [i915#5286])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         [PASS][136] -> [FAIL][137] ([i915#5138])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([fdo#111614]) +3 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-0:
    - shard-rkl:          [PASS][139] -> [SKIP][140] ([i915#1845] / [i915#4098]) +22 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-tglu:         [PASS][141] -> [FAIL][142] ([i915#3743])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-tglu-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-dg2:          NOTRUN -> [SKIP][143] ([i915#4538] / [i915#5190]) +2 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][144] ([fdo#111615]) +2 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][145] ([i915#4538]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_cdclk@mode-transition@pipe-d-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][146] ([i915#4087] / [i915#7213]) +3 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([fdo#111827]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-mtlp:         NOTRUN -> [SKIP][148] ([fdo#111827])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-dg1:          NOTRUN -> [SKIP][149] ([i915#7828]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_frames@dp-frame-dump:
    - shard-mtlp:         NOTRUN -> [SKIP][150] ([i915#7828])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_chamelium_frames@dp-frame-dump.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-dg2:          NOTRUN -> [SKIP][151] ([i915#7828]) +5 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
    - shard-rkl:          NOTRUN -> [SKIP][152] ([i915#7828]) +4 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html

  * igt@kms_color@deep-color:
    - shard-rkl:          NOTRUN -> [SKIP][153] ([i915#9608])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_color@deep-color.html

  * igt@kms_color@legacy-gamma-reset@pipe-b:
    - shard-rkl:          [PASS][154] -> [SKIP][155] ([i915#4098]) +1 other test skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_color@legacy-gamma-reset@pipe-b.html
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_color@legacy-gamma-reset@pipe-b.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-dg2:          NOTRUN -> [SKIP][156] ([i915#3299])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@lic:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#7118])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@srm:
    - shard-dg1:          NOTRUN -> [SKIP][158] ([i915#7116])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@srm@pipe-a-dp-1:
    - shard-apl:          NOTRUN -> [TIMEOUT][159] ([i915#7173])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl1/igt@kms_content_protection@srm@pipe-a-dp-1.html

  * igt@kms_content_protection@uevent@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][160] ([i915#1339])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_content_protection@uevent@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][161] ([i915#3359])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg1:          NOTRUN -> [SKIP][162] ([i915#3359])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-mtlp:         NOTRUN -> [SKIP][163] ([i915#3555] / [i915#8814])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-random-max-size:
    - shard-dg2:          NOTRUN -> [SKIP][164] ([i915#3555]) +2 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_cursor_crc@cursor-random-max-size.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([fdo#109274] / [i915#5354])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][166] ([i915#3546]) +1 other test skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([fdo#109274] / [fdo#111767] / [i915#5354])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-mtlp:         NOTRUN -> [SKIP][168] ([fdo#111767] / [i915#3546])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][169] ([i915#4103] / [i915#4213])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][170] ([i915#3804])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][171] ([i915#3555] / [i915#3840])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-dg2:          NOTRUN -> [SKIP][172] ([i915#3555] / [i915#3840])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#1849] / [i915#4098])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
    - shard-snb:          NOTRUN -> [SKIP][174] ([fdo#109271] / [fdo#111767]) +1 other test skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb7/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@2x-flip-vs-rmfb:
    - shard-mtlp:         NOTRUN -> [SKIP][175] ([i915#3637]) +1 other test skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_flip@2x-flip-vs-rmfb.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([fdo#111825]) +2 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-dg1:          NOTRUN -> [SKIP][177] ([fdo#111825]) +9 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][178] ([fdo#109274]) +5 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#3637] / [i915#4098]) +7 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][180] ([i915#2672]) +1 other test skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][181] ([i915#2672])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#2672]) +1 other test skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg1:          NOTRUN -> [SKIP][183] ([i915#2587] / [i915#2672])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][184] ([i915#3555] / [i915#8810])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#3555]) +10 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_force_connector_basic@force-load-detect:
    - shard-mtlp:         NOTRUN -> [SKIP][186] ([fdo#109285])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
    - shard-dg2:          NOTRUN -> [SKIP][187] ([i915#5354]) +21 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-rkl:          [PASS][188] -> [SKIP][189] ([i915#1849] / [i915#4098] / [i915#5354]) +11 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][190] ([i915#3458]) +13 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][191] ([i915#1849] / [i915#4098] / [i915#5354]) +21 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-pwrite:
    - shard-mtlp:         NOTRUN -> [SKIP][192] ([i915#1825]) +7 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][193] ([i915#5460])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][194] ([i915#8708])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
    - shard-dg1:          NOTRUN -> [SKIP][195] ([i915#3458]) +3 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][196] ([i915#8708]) +2 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render:
    - shard-apl:          NOTRUN -> [SKIP][197] ([fdo#109271]) +115 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#8708]) +8 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html

  * igt@kms_hdr@bpc-switch:
    - shard-rkl:          NOTRUN -> [SKIP][199] ([i915#3555] / [i915#8228])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_hdr@bpc-switch.html

  * igt@kms_hdr@static-swap:
    - shard-dg1:          NOTRUN -> [SKIP][200] ([i915#3555] / [i915#8228])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_hdr@static-swap.html

  * igt@kms_plane@plane-position-hole-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][201] ([i915#4098] / [i915#8825])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_plane@plane-position-hole-dpms.html

  * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1:
    - shard-apl:          NOTRUN -> [FAIL][202] ([i915#7862]) +1 other test fail
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl1/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-mtlp:         NOTRUN -> [SKIP][203] ([i915#3555] / [i915#8806])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][204] ([i915#5176] / [i915#9423]) +1 other test skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-c-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][205] ([i915#5176] / [i915#9423]) +3 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-17/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-c-hdmi-a-4.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][206] ([i915#5235]) +1 other test skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling:
    - shard-rkl:          NOTRUN -> [SKIP][207] ([i915#8152]) +1 other test skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][208] ([i915#4098] / [i915#6953] / [i915#8152]) +1 other test skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][209] ([i915#5235]) +19 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-dp-4.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][210] ([i915#3555] / [i915#4098] / [i915#8152]) +1 other test skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
    - shard-rkl:          NOTRUN -> [SKIP][211] ([i915#3555] / [i915#4098] / [i915#6953] / [i915#8152])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html

  * igt@kms_prime@d3hot:
    - shard-dg1:          NOTRUN -> [SKIP][212] ([i915#6524])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_prime@d3hot.html

  * igt@kms_properties@crtc-properties-legacy:
    - shard-rkl:          [PASS][213] -> [SKIP][214] ([i915#1849])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_properties@crtc-properties-legacy.html
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_properties@crtc-properties-legacy.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][215] ([i915#9683]) +1 other test skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-dg2:          NOTRUN -> [SKIP][216] ([i915#9681]) +2 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_psr@psr2_sprite_plane_onoff:
    - shard-rkl:          NOTRUN -> [SKIP][217] ([i915#9673]) +1 other test skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_psr@psr2_sprite_plane_onoff.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#4235]) +1 other test skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-snb:          NOTRUN -> [FAIL][219] ([i915#5465]) +1 other test fail
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb1/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-rkl:          NOTRUN -> [SKIP][220] ([i915#3555] / [i915#4098]) +2 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#8623])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-dg2:          NOTRUN -> [SKIP][222] ([fdo#109309])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
    - shard-mtlp:         [PASS][223] -> [FAIL][224] ([i915#9196]) +1 other test fail
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1:
    - shard-tglu:         [PASS][225] -> [FAIL][226] ([i915#9196])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-tglu-3/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html

  * igt@kms_vblank@wait-forked-busy-hang:
    - shard-rkl:          NOTRUN -> [SKIP][227] ([i915#4098]) +11 other tests skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_vblank@wait-forked-busy-hang.html

  * igt@kms_vrr@negative-basic:
    - shard-dg1:          NOTRUN -> [SKIP][228] ([i915#3555]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@kms_vrr@negative-basic.html

  * igt@kms_writeback@writeback-check-output:
    - shard-dg2:          NOTRUN -> [SKIP][229] ([i915#2437])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-11/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-rkl:          NOTRUN -> [SKIP][230] ([i915#2437])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@perf@gen12-group-exclusive-stream-ctx-handle:
    - shard-rkl:          [PASS][231] -> [SKIP][232] ([fdo#109289])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@perf@gen12-group-exclusive-stream-ctx-handle.html
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@perf@gen12-group-exclusive-stream-ctx-handle.html

  * igt@perf@gen12-oa-tlb-invalidate:
    - shard-rkl:          NOTRUN -> [SKIP][233] ([fdo#109289]) +1 other test skip
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@perf@gen12-oa-tlb-invalidate.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-dg1:          NOTRUN -> [SKIP][234] ([fdo#109289])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf@mi-rpc:
    - shard-rkl:          [PASS][235] -> [SKIP][236] ([i915#2434])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@perf@mi-rpc.html
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@perf@mi-rpc.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][237] ([i915#2433])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@event-wait@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][238] ([i915#3555] / [i915#8807])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@perf_pmu@event-wait@rcs0.html

  * igt@prime_udl:
    - shard-dg1:          NOTRUN -> [SKIP][239] ([fdo#109291])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@prime_udl.html

  * igt@prime_vgem@basic-fence-mmap:
    - shard-mtlp:         NOTRUN -> [SKIP][240] ([i915#3708] / [i915#4077])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-fence-read:
    - shard-dg2:          NOTRUN -> [SKIP][241] ([i915#3291] / [i915#3708])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][242] ([i915#3708] / [i915#4077])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@coherency-gtt:
    - shard-rkl:          [PASS][243] -> [SKIP][244] ([fdo#109295] / [fdo#111656] / [i915#3708])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@prime_vgem@coherency-gtt.html
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@prime_vgem@coherency-gtt.html

  * igt@prime_vgem@fence-write-hang:
    - shard-mtlp:         NOTRUN -> [SKIP][245] ([i915#3708])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@prime_vgem@fence-write-hang.html

  * igt@v3d/v3d_create_bo@create-bo-zeroed:
    - shard-dg2:          NOTRUN -> [SKIP][246] ([i915#2575]) +7 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@v3d/v3d_create_bo@create-bo-zeroed.html

  * igt@v3d/v3d_get_param@get-bad-param:
    - shard-snb:          NOTRUN -> [SKIP][247] ([fdo#109271]) +44 other tests skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb7/igt@v3d/v3d_get_param@get-bad-param.html

  * igt@v3d/v3d_perfmon@get-values-invalid-pad:
    - shard-dg1:          NOTRUN -> [SKIP][248] ([i915#2575]) +3 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@v3d/v3d_perfmon@get-values-invalid-pad.html

  * igt@v3d/v3d_perfmon@get-values-invalid-perfmon:
    - shard-mtlp:         NOTRUN -> [SKIP][249] ([i915#2575]) +2 other tests skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@v3d/v3d_perfmon@get-values-invalid-perfmon.html

  * igt@v3d/v3d_submit_csd@job-perfmon:
    - shard-rkl:          NOTRUN -> [SKIP][250] ([fdo#109315]) +3 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@v3d/v3d_submit_csd@job-perfmon.html

  * igt@vc4/vc4_label_bo@set-kernel-name:
    - shard-dg1:          NOTRUN -> [SKIP][251] ([i915#7711])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@vc4/vc4_label_bo@set-kernel-name.html

  * igt@vc4/vc4_perfmon@destroy-valid-perfmon:
    - shard-dg2:          NOTRUN -> [SKIP][252] ([i915#7711]) +4 other tests skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-2/igt@vc4/vc4_perfmon@destroy-valid-perfmon.html

  * igt@vc4/vc4_tiling@set-get:
    - shard-mtlp:         NOTRUN -> [SKIP][253] ([i915#7711]) +1 other test skip
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@vc4/vc4_tiling@set-get.html

  * igt@vc4/vc4_wait_bo@used-bo-0ns:
    - shard-rkl:          NOTRUN -> [SKIP][254] ([i915#7711]) +1 other test skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@vc4/vc4_wait_bo@used-bo-0ns.html

  
#### Possible fixes ####

  * igt@api_intel_bb@blit-reloc-purge-cache:
    - shard-rkl:          [SKIP][255] ([i915#8411]) -> [PASS][256] +1 other test pass
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@api_intel_bb@blit-reloc-purge-cache.html
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@api_intel_bb@blit-reloc-purge-cache.html

  * {igt@drm_mm@drm_mm@drm_test_mm_highest}:
    - shard-dg2:          [TIMEOUT][257] -> [PASS][258]
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-dg2-11/igt@drm_mm@drm_mm@drm_test_mm_highest.html
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg2-1/igt@drm_mm@drm_mm@drm_test_mm_highest.html
    - shard-mtlp:         [TIMEOUT][259] -> [PASS][260]
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-4/igt@drm_mm@drm_mm@drm_test_mm_highest.html
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-1/igt@drm_mm@drm_mm@drm_test_mm_highest.html

  * igt@drm_read@empty-block:
    - shard-rkl:          [SKIP][261] ([i915#1845] / [i915#4098]) -> [PASS][262] +19 other tests pass
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@drm_read@empty-block.html
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@drm_read@empty-block.html

  * {igt@gem_compute@compute-square}:
    - shard-rkl:          [SKIP][263] ([i915#9310]) -> [PASS][264]
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_compute@compute-square.html
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_compute@compute-square.html

  * igt@gem_ctx_persistence@engines-hang@bcs0:
    - shard-rkl:          [SKIP][265] ([i915#6252]) -> [PASS][266]
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_ctx_persistence@engines-hang@bcs0.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [FAIL][267] ([i915#5784]) -> [PASS][268]
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-dg1-17/igt@gem_eio@reset-stress.html
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-19/igt@gem_eio@reset-stress.html

  * igt@gem_eio@wait-wedge-immediate:
    - shard-mtlp:         [ABORT][269] ([i915#9262]) -> [PASS][270]
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-2/igt@gem_eio@wait-wedge-immediate.html
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-4/igt@gem_eio@wait-wedge-immediate.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-rkl:          [FAIL][271] ([i915#2842]) -> [PASS][272]
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_exec_fair@basic-none@vecs0.html
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][273] ([i915#2842]) -> [PASS][274]
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
    - shard-tglu:         [FAIL][275] ([i915#2842]) -> [PASS][276]
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-tglu-2/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-rkl:          [FAIL][277] ([i915#2876]) -> [PASS][278]
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@gem_exec_fair@basic-pace@rcs0.html
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-rkl:          [SKIP][279] ([fdo#109313]) -> [PASS][280]
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-rkl:          [SKIP][281] ([i915#3281]) -> [PASS][282] +6 other tests pass
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_whisper@basic-contexts-priority-all:
    - shard-rkl:          [DMESG-WARN][283] -> [PASS][284]
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-7/igt@gem_exec_whisper@basic-contexts-priority-all.html
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-4/igt@gem_exec_whisper@basic-contexts-priority-all.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-rkl:          [SKIP][285] ([i915#1850]) -> [PASS][286]
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_mmap_wc@set-cache-level.html
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-4/igt@gem_mmap_wc@set-cache-level.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-rkl:          [SKIP][287] ([i915#3282]) -> [PASS][288] +2 other tests pass
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-rkl:          [SKIP][289] ([i915#2527]) -> [PASS][290] +2 other tests pass
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@gen9_exec_parse@allowed-single.html
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gen9_exec_parse@allowed-single.html

  * {igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0}:
    - shard-dg1:          [FAIL][291] -> [PASS][292] +1 other test pass
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html

  * igt@i915_pm_rps@reset:
    - shard-snb:          [INCOMPLETE][293] ([i915#7790]) -> [PASS][294]
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-snb6/igt@i915_pm_rps@reset.html
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb7/igt@i915_pm_rps@reset.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-180:
    - shard-mtlp:         [FAIL][295] ([i915#5138]) -> [PASS][296] +1 other test pass
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-2/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-4/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-tglu:         [FAIL][297] ([i915#3743]) -> [PASS][298] +1 other test pass
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_color@degamma@pipe-a:
    - shard-rkl:          [SKIP][299] ([i915#4098]) -> [PASS][300] +12 other tests pass
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_color@degamma@pipe-a.html
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_color@degamma@pipe-a.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-apl:          [FAIL][301] ([i915#2346]) -> [PASS][302]
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
    - shard-rkl:          [SKIP][303] ([i915#1849] / [i915#4098] / [i915#5354]) -> [PASS][304] +17 other tests pass
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1:
    - shard-apl:          [INCOMPLETE][305] ([i915#180] / [i915#9392]) -> [PASS][306]
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html

  * {igt@kms_pm_dc@dc5-dpms-negative}:
    - shard-rkl:          [SKIP][307] ([i915#9293]) -> [PASS][308]
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_pm_dc@dc5-dpms-negative.html
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_pm_dc@dc5-dpms-negative.html

  * {igt@kms_pm_rpm@modeset-lpsp}:
    - shard-rkl:          [SKIP][309] ([i915#9519]) -> [PASS][310]
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_pm_rpm@modeset-lpsp.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp.html

  * {igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode}:
    - shard-rkl:          [TIMEOUT][311] -> [PASS][312]
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode.html
    - shard-snb:          [TIMEOUT][313] -> [PASS][314] +1 other test pass
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-snb2/igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-snb2/igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_sideband_msg_req_decode.html

  * {igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list}:
    - shard-glk:          [TIMEOUT][315] ([i915#8628]) -> [PASS][316]
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-glk4/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-glk8/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list.html

  * {igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state}:
    - shard-dg1:          [TIMEOUT][317] -> [PASS][318] +1 other test pass
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-dg1-19/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-dg1-17/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
    - shard-tglu:         [TIMEOUT][319] -> [PASS][320] +1 other test pass
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-tglu-10/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-tglu-3/igt@kms_selftest@drm_plane_helper@drm_test_check_invalid_plane_state.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1:
    - shard-tglu:         [FAIL][321] ([i915#9196]) -> [PASS][322]
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-tglu-3/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-edp-1:
    - shard-mtlp:         [FAIL][323] ([i915#9196]) -> [PASS][324]
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-d-edp-1.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak@pipe-d-edp-1.html

  * igt@perf_pmu@module-unload:
    - shard-mtlp:         [DMESG-WARN][325] ([i915#1982]) -> [PASS][326]
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-mtlp-2/igt@perf_pmu@module-unload.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-mtlp-7/igt@perf_pmu@module-unload.html

  * igt@prime_vgem@basic-fence-read:
    - shard-rkl:          [SKIP][327] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][328]
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@prime_vgem@basic-fence-read.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@prime_vgem@basic-fence-read.html

  
#### Warnings ####

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-rkl:          [SKIP][329] ([i915#7957]) -> [SKIP][330] ([i915#3555]) +1 other test skip
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_ccs@ctrl-surf-copy.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_pread@exhaustion:
    - shard-rkl:          [WARN][331] ([i915#2658]) -> [SKIP][332] ([i915#3282]) +1 other test skip
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@gem_pread@exhaustion.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@gem_pread@exhaustion.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-rkl:          [SKIP][333] ([i915#2527]) -> [SKIP][334] ([i915#2532])
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@gen9_exec_parse@bb-oversize.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@gen9_exec_parse@bb-oversize.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-rkl:          [SKIP][335] ([i915#1845] / [i915#4098]) -> [SKIP][336] ([i915#1769] / [i915#3555]) +1 other test skip
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-rkl:          [SKIP][337] ([i915#5286]) -> [SKIP][338] ([i915#1845] / [i915#4098]) +3 other tests skip
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-rkl:          [SKIP][339] ([i915#1845] / [i915#4098]) -> [SKIP][340] ([i915#5286]) +6 other tests skip
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-rkl:          [SKIP][341] ([i915#1845] / [i915#4098]) -> [SKIP][342] ([fdo#111614] / [i915#3638]) +2 other tests skip
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_big_fb@linear-32bpp-rotate-270.html
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-rkl:          [SKIP][343] ([fdo#111614] / [i915#3638]) -> [SKIP][344] ([i915#1845] / [i915#4098])
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-rkl:          [SKIP][345] ([i915#1845] / [i915#4098]) -> [SKIP][346] ([fdo#110723]) +6 other tests skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-rkl:          [SKIP][347] ([fdo#110723]) -> [SKIP][348] ([i915#1845] / [i915#4098]) +2 other tests skip
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_content_protection@uevent:
    - shard-rkl:          [SKIP][349] ([i915#7118]) -> [SKIP][350] ([i915#1845] / [i915#4098]) +1 other test skip
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_content_protection@uevent.html
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-rkl:          [SKIP][351] ([i915#1845] / [i915#4098]) -> [SKIP][352] ([i915#3359]) +2 other tests skip
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-512x512.html
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-rkl:          [SKIP][353] ([i915#1845] / [i915#4098]) -> [SKIP][354] ([i915#3555]) +4 other tests skip
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-rkl:          [SKIP][355] ([fdo#109279] / [i915#3359]) -> [SKIP][356] ([i915#1845] / [i915#4098])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-rkl:          [SKIP][357] ([i915#3555]) -> [SKIP][358] ([i915#1845] / [i915#4098]) +3 other tests skip
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_cursor_crc@cursor-onscreen-max-size.html
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-rkl:          [SKIP][359] ([i915#1845] / [i915#4098]) -> [SKIP][360] ([fdo#111825]) +5 other tests skip
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-rkl:          [SKIP][361] ([fdo#111825]) -> [SKIP][362] ([i915#1845] / [i915#4098]) +1 other test skip
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-rkl:          [SKIP][363] ([fdo#111767] / [fdo#111825]) -> [SKIP][364] ([i915#1845] / [i915#4098])
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-rkl:          [SKIP][365] ([i915#4103]) -> [SKIP][366] ([i915#1845] / [i915#4098]) +1 other test skip
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-rkl:          [SKIP][367] ([i915#4098]) -> [SKIP][368] ([i915#8588])
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_display_modes@mst-extended-mode-negative.html
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-rkl:          [SKIP][369] ([i915#3555] / [i915#3840]) -> [SKIP][370] ([i915#1845] / [i915#4098])
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_dsc@dsc-with-formats.html
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][371] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][372] ([fdo#111825] / [i915#1825]) +36 other tests skip
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-rkl:          [SKIP][373] ([i915#5439]) -> [SKIP][374] ([i915#1849] / [i915#4098] / [i915#5354])
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-rkl:          [SKIP][375] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][376] ([i915#3023]) +20 other tests skip
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-rkl:          [SKIP][377] ([i915#3023]) -> [SKIP][378] ([i915#1849] / [i915#4098] / [i915#5354]) +20 other tests skip
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt:
    - shard-rkl:          [SKIP][379] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][380] ([fdo#111825])
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          [SKIP][381] ([fdo#111825] / [i915#1825]) -> [SKIP][382] ([i915#1849] / [i915#4098] / [i915#5354]) +36 other tests skip
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_hdr@invalid-hdr:
    - shard-rkl:          [SKIP][383] ([i915#4098]) -> [SKIP][384] ([i915#3555] / [i915#8228])
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_hdr@invalid-hdr.html
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-toggle:
    - shard-rkl:          [SKIP][385] ([i915#3555] / [i915#8228]) -> [SKIP][386] ([i915#1845] / [i915#4098])
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-1/igt@kms_hdr@static-toggle.html
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_hdr@static-toggle.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-rkl:          [SKIP][387] ([i915#1845] / [i915#4098]) -> [SKIP][388] ([i915#6301])
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_panel_fitting@atomic-fastset.html
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-rkl:          [SKIP][389] ([fdo#111825] / [i915#8152]) -> [SKIP][390] ([fdo#111825])
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][391] ([i915#1845] / [i915#4098]) -> [SKIP][392] ([i915#5289])
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-rkl:          [INCOMPLETE][393] ([i915#8875] / [i915#9569]) -> [SKIP][394] ([i915#1845] / [i915#4098])
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-rkl:          [SKIP][395] ([i915#1845] / [i915#4098]) -> [INCOMPLETE][396] ([i915#8875] / [i915#9569])
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-rkl:          [SKIP][397] ([fdo#111615] / [i915#5289]) -> [SKIP][398] ([i915#1845] / [i915#4098])
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13888/shard-rkl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2532]: https://gitlab.freedesktop.org/drm/intel/issues/2532
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4936]: https://gitlab.freedesktop.org/drm/intel/issues/4936
  [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5460]: https://gitlab.freedesktop.org/drm/intel/issues/5460
  [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7036]: https://gitlab.freedesktop.org/drm/intel/issues/7036
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
  [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
  [i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
  [i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582
  [i915#768]: https://gitlab.freedesktop.org/drm/intel/issues/768
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7790]: https://gitlab.freedesktop.org/drm/intel/issues/7790
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7862]: https://gitlab.freedesktop.org/drm/intel/issues/7862
  [i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#7984]: https://gitlab.freedesktop.org/drm/intel/issues/7984
  [i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
  [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
  [i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
  [i915#8623]: https://gitlab.freedesktop.org/drm/intel/issues/8623
  [i915#8628]: https://gitlab.freedesktop.org/drm/intel/issues/8628
  [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
  [i915#8806]: https://gitlab.freedesktop.org/drm/intel/issues/8806
  [i915#8807]: https://gitlab.freedesktop.org/drm/intel/issues/8807
  [i915#8810]: https://gitlab.freedesktop.org/drm/intel/issues/8810
  [i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
  [i915#8825]: https://gitlab.freedesktop.org/drm/intel/issues/8825
  [i915#8875]: https://gitlab.freedesktop.org/drm/intel/issues/8875
  [i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
  [i915#9159]: https://gitlab.freedesktop.org/drm/intel/issues/9159
  [i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
  [i915#9226]: https://gitlab.freedesktop.org/drm/intel/issues/9226
  [i915#9261]: https://gitlab.freedesktop.org/drm/intel/issues/9261
  [i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
  [i915#9293]: https://gitlab.freedesktop.org/drm/intel/issues/9293
  [i915#9310]: https://gitlab.freedesktop.org/drm/intel/issues/9310
  [i915#9340]: https://gitlab.freedesktop.org/drm/intel/issues/9340
  [i915#9392]: https://gitlab.freedesktop.org/drm/intel/issues/9392
  [i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
  [i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
  [i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
  [i915#9559]: https://gitlab.freedesktop.org/drm/intel/issues/9559
  [i915#9569]: https://gitlab.freedesktop.org/drm/intel/issues/9569
  [i915#9581]: https://gitlab.freedesktop.org/drm/intel/issues/9581
  [i915#9608]: https://gitlab.freedesktop.org/drm/intel/issues/9608
  [i915#9653]: https://gitlab.freedesktop.org/drm/intel/issues/9653
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
  [i915#9681]: https://gitlab.freedesktop.org/drm/intel/issues/9681
  [i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683


Build changes
-------------

  * Linux: CI_DRM_13888 -> Patchwork_126526v5

  CI-20190529: 20190529
  CI_DRM_13888: 71624dec921946f36029faeb0f35022940a11b82 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7594: 8478eefdaa3eef02b4370339ef0d1970d44a67a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_126526v5: 71624dec921946f36029faeb0f35022940a11b82 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v5/index.html

[-- Attachment #2: Type: text/html, Size: 117925 bytes --]

Re: [Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Jani Nikula]

On Thu, 16 Nov 2023, Imre Deak <imre.deak@intel.com> wrote:
> This is v2 of [1], with the following changes:
> - Store the pbn_div value in fixed point format.
> - Fix PBN calculation in patch 8.
> - Reuse intel_dp_max_data_rate(), intel_dp_effective_data_rate() in
>   intel_link_compute_m_n() (Jani).
>
> [1] https://lore.kernel.org/all/20231113201110.510724-1-imre.deak@intel.com
>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Lyude Paul <lyude@redhat.com>
>
> Imre Deak (11):
>   drm/dp_mst: Store the MST PBN divider value in fixed point format
>   drm/dp_mst: Fix PBN divider calculation for UHBR rates
>   drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()

Maarten, Maxime, Thomas, ack for merging these three via drm-intel-next?

Imre, I note that said patches were Cc: dri-devel, but for future
reference please Cc: the entire series to dri-devel when you include
dependencies that you plan to merge via drm-intel.

BR,
Jani.


>   drm/i915/dp: Replace intel_dp_is_uhbr_rate() with
>     drm_dp_is_uhbr_rate()
>   drm/i915/dp: Account for channel coding efficiency on UHBR links
>   drm/i915/dp: Fix UHBR link M/N values
>   drm/i915/dp_mst: Calculate the BW overhead in
>     intel_dp_mst_find_vcpi_slots_for_bpp()
>   drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
>   drm/i915/dp: Report a rounded-down value as the maximum data rate
>   drm/i915/dp: Simplify intel_dp_max_data_rate()
>   drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in
>     intel_link_compute_m_n()
>
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   5 +-
>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   3 +-
>  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   5 +-
>  drivers/gpu/drm/display/drm_dp_mst_topology.c |  31 +++-
>  drivers/gpu/drm/i915/display/intel_display.c  |  51 ++----
>  drivers/gpu/drm/i915/display/intel_dp.c       |  78 +++++++---
>  drivers/gpu/drm/i915/display/intel_dp.h       |   5 +-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  55 +++++--
>  drivers/gpu/drm/nouveau/dispnv50/disp.c       |   6 +-
>  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
>  include/drm/display/drm_dp_helper.h           |  13 ++
>  include/drm/display/drm_dp_mst_helper.h       |   7 +-
>  12 files changed, 311 insertions(+), 93 deletions(-)

-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Imre Deak]

On Mon, Nov 20, 2023 at 02:31:34PM +0200, Jani Nikula wrote:
> On Thu, 16 Nov 2023, Imre Deak <imre.deak@intel.com> wrote:
> > This is v2 of [1], with the following changes:
> > - Store the pbn_div value in fixed point format.
> > - Fix PBN calculation in patch 8.
> > - Reuse intel_dp_max_data_rate(), intel_dp_effective_data_rate() in
> >   intel_link_compute_m_n() (Jani).
> >
> > [1] https://lore.kernel.org/all/20231113201110.510724-1-imre.deak@intel.com
> >
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Lyude Paul <lyude@redhat.com>
> >
> > Imre Deak (11):
> >   drm/dp_mst: Store the MST PBN divider value in fixed point format
> >   drm/dp_mst: Fix PBN divider calculation for UHBR rates
> >   drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
> 
> Maarten, Maxime, Thomas, ack for merging these three via drm-intel-next?
> 
> Imre, I note that said patches were Cc: dri-devel, but for future
> reference please Cc: the entire series to dri-devel when you include
> dependencies that you plan to merge via drm-intel.

Ok. I assumed the alternative to merge the 3 patches via drm-misc-next,
wait for that to get merged back to i915 and then merge the rest to i915
was still a preferred way; wondering now if in general this is better to
avoid merge conflicts similar to the one reported now wrt. 
  "drm/dp_mst: Fix fractional DSC bpp handling".

In any case yes, I can CC dri-devel the whole patchset whenever there
are any drm changes in it. While still wondering about the ideal
approach above, I'd still prefer if the 3 drm patches in this one could
also get merged via the i915 tree.

--Imre

> BR,
> Jani.
> 
> 
> >   drm/i915/dp: Replace intel_dp_is_uhbr_rate() with
> >     drm_dp_is_uhbr_rate()
> >   drm/i915/dp: Account for channel coding efficiency on UHBR links
> >   drm/i915/dp: Fix UHBR link M/N values
> >   drm/i915/dp_mst: Calculate the BW overhead in
> >     intel_dp_mst_find_vcpi_slots_for_bpp()
> >   drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
> >   drm/i915/dp: Report a rounded-down value as the maximum data rate
> >   drm/i915/dp: Simplify intel_dp_max_data_rate()
> >   drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in
> >     intel_link_compute_m_n()
> >
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   5 +-
> >  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   3 +-
> >  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   5 +-
> >  drivers/gpu/drm/display/drm_dp_mst_topology.c |  31 +++-
> >  drivers/gpu/drm/i915/display/intel_display.c  |  51 ++----
> >  drivers/gpu/drm/i915/display/intel_dp.c       |  78 +++++++---
> >  drivers/gpu/drm/i915/display/intel_dp.h       |   5 +-
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  55 +++++--
> >  drivers/gpu/drm/nouveau/dispnv50/disp.c       |   6 +-
> >  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
> >  include/drm/display/drm_dp_helper.h           |  13 ++
> >  include/drm/display/drm_dp_mst_helper.h       |   7 +-
> >  12 files changed, 311 insertions(+), 93 deletions(-)
> 
> -- 
> Jani Nikula, Intel

Re: [Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Jani Nikula]

On Mon, 20 Nov 2023, Imre Deak <imre.deak@intel.com> wrote:
> On Mon, Nov 20, 2023 at 02:31:34PM +0200, Jani Nikula wrote:
>> On Thu, 16 Nov 2023, Imre Deak <imre.deak@intel.com> wrote:
>> > This is v2 of [1], with the following changes:
>> > - Store the pbn_div value in fixed point format.
>> > - Fix PBN calculation in patch 8.
>> > - Reuse intel_dp_max_data_rate(), intel_dp_effective_data_rate() in
>> >   intel_link_compute_m_n() (Jani).
>> >
>> > [1] https://lore.kernel.org/all/20231113201110.510724-1-imre.deak@intel.com
>> >
>> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
>> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> > Cc: Lyude Paul <lyude@redhat.com>
>> >
>> > Imre Deak (11):
>> >   drm/dp_mst: Store the MST PBN divider value in fixed point format
>> >   drm/dp_mst: Fix PBN divider calculation for UHBR rates
>> >   drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
>> 
>> Maarten, Maxime, Thomas, ack for merging these three via drm-intel-next?
>> 
>> Imre, I note that said patches were Cc: dri-devel, but for future
>> reference please Cc: the entire series to dri-devel when you include
>> dependencies that you plan to merge via drm-intel.
>
> Ok. I assumed the alternative to merge the 3 patches via drm-misc-next,
> wait for that to get merged back to i915 and then merge the rest to i915
> was still a preferred way; wondering now if in general this is better to
> avoid merge conflicts similar to the one reported now wrt. 
>   "drm/dp_mst: Fix fractional DSC bpp handling".
>
> In any case yes, I can CC dri-devel the whole patchset whenever there
> are any drm changes in it. While still wondering about the ideal
> approach above, I'd still prefer if the 3 drm patches in this one could
> also get merged via the i915 tree.

There are no rigid rules for this.

But it's clearly more problematic when the patches touch not just drm +
one driver, but drm + several drivers. Perhaps that's an indication they
should be merged via drm-misc-next instead of a driver tree.

Also, we probably need to clear up the existing conflicts before adding
more patches in the area to drm-intel-next.

BR,
Jani.


>
> --Imre
>
>> BR,
>> Jani.
>> 
>> 
>> >   drm/i915/dp: Replace intel_dp_is_uhbr_rate() with
>> >     drm_dp_is_uhbr_rate()
>> >   drm/i915/dp: Account for channel coding efficiency on UHBR links
>> >   drm/i915/dp: Fix UHBR link M/N values
>> >   drm/i915/dp_mst: Calculate the BW overhead in
>> >     intel_dp_mst_find_vcpi_slots_for_bpp()
>> >   drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
>> >   drm/i915/dp: Report a rounded-down value as the maximum data rate
>> >   drm/i915/dp: Simplify intel_dp_max_data_rate()
>> >   drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in
>> >     intel_link_compute_m_n()
>> >
>> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   5 +-
>> >  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   3 +-
>> >  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   5 +-
>> >  drivers/gpu/drm/display/drm_dp_mst_topology.c |  31 +++-
>> >  drivers/gpu/drm/i915/display/intel_display.c  |  51 ++----
>> >  drivers/gpu/drm/i915/display/intel_dp.c       |  78 +++++++---
>> >  drivers/gpu/drm/i915/display/intel_dp.h       |   5 +-
>> >  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  55 +++++--
>> >  drivers/gpu/drm/nouveau/dispnv50/disp.c       |   6 +-
>> >  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
>> >  include/drm/display/drm_dp_helper.h           |  13 ++
>> >  include/drm/display/drm_dp_mst_helper.h       |   7 +-
>> >  12 files changed, 311 insertions(+), 93 deletions(-)
>> 
>> -- 
>> Jani Nikula, Intel

-- 
Jani Nikula, Intel

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)
URL   : https://patchwork.freedesktop.org/series/126526/
State : warning

== Summary ==

Error: dim checkpatch failed
3513c76cbe67 drm/dp_mst: Store the MST PBN divider value in fixed point format
-:45: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#45: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:6915:
+		mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));

-:87: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#87: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c:945:
+			link_timeslots_used += DIV_ROUND_UP(vars[i + k].pbn, dfixed_trunc(mst_state->pbn_div));

-:91: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#91: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c:948:
+			(63 - link_timeslots_used) / remaining_to_increase * dfixed_trunc(mst_state->pbn_div);

total: 0 errors, 3 warnings, 0 checks, 176 lines checked
88e3c76abeb9 drm/dp_mst: Fix PBN divider calculation for UHBR rates
78f2b3df56e6 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
-:171: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#171: FILE: drivers/gpu/drm/tests/drm_dp_mst_helper_test.c:205:
+	KUNIT_EXPECT_EQ(test, drm_dp_get_vc_payload_bw(mgr, params->link_rate, params->lane_count).full,

total: 0 errors, 1 warnings, 0 checks, 179 lines checked
325978fa175e drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
d46ea41579a3 drm/i915/dp: Account for channel coding efficiency on UHBR links
cc65f47fbc5a drm/i915/dp: Fix UHBR link M/N values
1cbb990e3949 drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
754ae198dba1 drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
8009b4d8db6e drm/i915/dp: Report a rounded-down value as the maximum data rate
-:25: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#25: FILE: drivers/gpu/drm/i915/display/intel_dp.c:416:
+		max_link_rate_kbps = DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate_kbps, 9671), 10000);

total: 0 errors, 1 warnings, 0 checks, 16 lines checked
a7991e660321 drm/i915/dp: Simplify intel_dp_max_data_rate()
0d2ad4a6dcbf drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)
URL   : https://patchwork.freedesktop.org/series/126526/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10681 bytes --]

== Series Details ==

Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)
URL   : https://patchwork.freedesktop.org/series/126526/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13901 -> Patchwork_126526v6
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/index.html

Participating hosts (31 -> 33)
------------------------------

  Additional (4): fi-hsw-4770 bat-kbl-2 fi-pnv-d510 bat-dg1-5 
  Missing    (2): fi-kbl-soraka fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_126526v6 that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - bat-jsl-1:          [PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-jsl-1/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-jsl-1/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@info:
    - bat-kbl-2:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1849])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-kbl-2/igt@fbdev@info.html

  * igt@gem_exec_suspend@basic-s0@smem:
    - bat-dg2-9:          [PASS][4] -> [INCOMPLETE][5] ([i915#8797] / [i915#9275])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@gem_lmem_swapping@basic:
    - fi-pnv-d510:        NOTRUN -> [SKIP][6] ([fdo#109271]) +25 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-pnv-d510/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-kbl-2:          NOTRUN -> [SKIP][7] ([fdo#109271]) +20 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_mmap@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][8] ([i915#4083])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@gem_mmap@basic.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@gem_tiled_pread_basic.html

  * igt@i915_module_load@load:
    - bat-adlp-6:         [PASS][11] -> [DMESG-WARN][12] ([i915#1982] / [i915#8449])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-adlp-6/igt@i915_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-adlp-6/igt@i915_module_load@load.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg1-5:          NOTRUN -> [SKIP][13] ([i915#6621])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        NOTRUN -> [INCOMPLETE][14] ([i915#9527])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - fi-hsw-4770:        NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#5190])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-hsw-4770/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][16] ([i915#4212]) +7 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][17] ([i915#4215])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][18] ([i915#4103] / [i915#4213]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][19] ([i915#3555] / [i915#3840])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-dg1-5:          NOTRUN -> [SKIP][20] ([fdo#109285])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
    - bat-dg1-5:          NOTRUN -> [SKIP][21] ([i915#433])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
    - fi-hsw-4770:        NOTRUN -> [SKIP][22] ([fdo#109271]) +12 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence:
    - bat-kbl-2:          NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#1845]) +14 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-kbl-2/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-dg1-5:          NOTRUN -> [SKIP][24] ([i915#3555])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-dg1-5:          NOTRUN -> [SKIP][25] ([i915#3708]) +3 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - bat-dg1-5:          NOTRUN -> [SKIP][26] ([i915#3708] / [i915#4077]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@prime_vgem@basic-gtt.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-apl-guc:         [DMESG-FAIL][27] ([i915#5334]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
    - bat-rplp-1:         [ABORT][29] ([i915#8668]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8449]: https://gitlab.freedesktop.org/drm/intel/issues/8449
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#8797]: https://gitlab.freedesktop.org/drm/intel/issues/8797
  [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
  [i915#9527]: https://gitlab.freedesktop.org/drm/intel/issues/9527
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673


Build changes
-------------

  * Linux: CI_DRM_13901 -> Patchwork_126526v6

  CI-20190529: 20190529
  CI_DRM_13901: 8d55b3869b666b36e26a40cfc2f1f84b72a34cd3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7595: cfa00d99b1dfa0621ea552d1ed54907798da1a1a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_126526v6: 8d55b3869b666b36e26a40cfc2f1f84b72a34cd3 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

dfd69da63d0e drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()
3bdeb4eb6880 drm/i915/dp: Simplify intel_dp_max_data_rate()
29d9d5b20906 drm/i915/dp: Report a rounded-down value as the maximum data rate
ce144ebc203f drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
332160a9365a drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
a77782e10312 drm/i915/dp: Fix UHBR link M/N values
842740e3896c drm/i915/dp: Account for channel coding efficiency on UHBR links
a11a8db78fa3 drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
83508fa204b8 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
bb5be2d5e23b drm/dp_mst: Fix PBN divider calculation for UHBR rates
bb817db5d4a4 drm/dp_mst: Store the MST PBN divider value in fixed point format

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/index.html

[-- Attachment #2: Type: text/html, Size: 12375 bytes --]

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)

[Imre Deak]

On Tue, Nov 21, 2023 at 02:37:33AM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev6)
> URL   : https://patchwork.freedesktop.org/series/126526/
> State : success

Thanks for the reviews and acks, the patchset is pushed to drm-intel-next.

I had to rebase patch 1 on drm-intel-next as described in
https://lore.kernel.org/all/ZVy2rGFvp2cXaCoc@ideak-desk.fi.intel.com/

and then resolve the corresponding conflict merging drm-intel-next and
drm-misc-next (resulting in the original change in patch 1):

diff --cc drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index c7a29bb737e2,53e323b71d26..000000000000
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@@ -209,11 -210,11 +210,11 @@@ static void dm_helpers_construct_old_pa
                        struct drm_dp_mst_atomic_payload *new_payload,
                        struct drm_dp_mst_atomic_payload *old_payload)
  {
 -      struct link_mst_stream_allocation_table current_link_table =
 -                                                                      link->mst_stream_alloc_table;
 -      struct link_mst_stream_allocation *dc_alloc;
 -      int pbn_per_slot = dfixed_trunc(pbn_per_slot_fp);
 -      int i;
 +      struct drm_dp_mst_atomic_payload *pos;
-       int pbn_per_slot = mst_state->pbn_div;
++      int pbn_per_slot = dfixed_trunc(mst_state->pbn_div);
 +      u8 next_payload_vc_start = mgr->next_start_slot;
 +      u8 payload_vc_start = new_payload->vc_start_slot;
 +      u8 allocated_time_slots;

        *old_payload = *new_payload;

The IGT full test results using CI_DRM_13898_full as base (thanks to
Jani for the help with this) with one unrelated failure commented on
inline:

*  CI Bug Log - changes from CI_DRM_13898_full -> Patchwork_126526v6_full
*  Summary
*  FAILURE
*  
*  Serious unknown changes coming with Patchwork_126526v6_full absolutely need to be
*  verified manually.
*  
*  If you think the reported changes have nothing to do with the changes
*  introduced in Patchwork_126526v6_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
*  to document this new failure mode, which will reduce false positives in CI.
*  
*  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/index.html
*  
*  Participating hosts (10 -> 11)
*  Additional (1): shard-mtlp0
*  
*  Possible new issues
*  Here are the unknown changes that may have been introduced in Patchwork_126526v6_full:
*  
*  IGT changes
*  Possible regressions
*  igt@i915_selftest@live@requests:
*  shard-mtlp: NOTRUN -> DMESG-FAIL +1 other test dmesg-fail

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/shard-mtlp-8/igt@i915_selftest@live@requests.html

<6> [411.388436] i915: Running i915_request_live_selftests/live_cancel_request
<3> [411.398207] i915 0000:00:02.0: [drm] *ERROR* GT1: live_cancel_request(rcs0): engine 'other0' was reset -1 times!
<3> [411.423402] i915/i915_request_live_selftests: live_cancel_request failed with error -5


The platform doesn't have any external monitors attached, so can't see how the changes
in the patchset would be related. The closest issue (without a ticket filed for it) looks
to be:

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13906/bat-mtlp-6/igt@i915_selftest@live@requests.html#dmesg-warnings741

<7> [266.125209] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
<6> [267.264820] Completed 281 waits for 8482 fences across 6 engines and 4 cpus
<3> [267.265605] i915 0000:00:02.0: [drm] *ERROR* GT1: live_breadcrumbs_smoketest(): engine 'other0' was reset -1 times!
<3> [267.276018] i915/i915_request_live_selftests: live_breadcrumbs_smoketest failed with error -5


*  New tests
*  New tests have been introduced between CI_DRM_13898_full and Patchwork_126526v6_full:
*  
*  New IGT tests (15)
*  igt@kms_cursor_crc@cursor-offscreen-128x128@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_cursor_crc@cursor-onscreen-256x256@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_cursor_crc@cursor-random-128x128@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_cursor_crc@cursor-rapid-movement-256x256@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_cursor_crc@cursor-sliding-128x128@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_cursor@overlay@pipe-a-dp-4-size-128:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_cursor@overlay@pipe-a-dp-4-size-256:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_cursor@overlay@pipe-a-dp-4-size-64:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_cursor@viewport@pipe-a-dp-4-size-128:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_cursor@viewport@pipe-a-dp-4-size-256:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_cursor@viewport@pipe-a-dp-4-size-64:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_plane_scaling@planes-upscale-factor-0-25@pipe-a-dp-4:
*  
*  Statuses : 1 pass(s)
*  Exec time: [0.0] s
*  igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_calc_pbn_div:
*  
*  Statuses : 6 pass(s)
*  Exec time: [0.0] s
*  Known issues
*  Here are the changes found in Patchwork_126526v6_full that come from known issues:
*  
*  CI changes
*  Issues hit
*  boot:
*  shard-glk: (PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS) -> (PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, FAIL, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS, PASS) (i915#8293)
*  IGT changes
*  Issues hit
*  igt@device_reset@unbind-cold-reset-rebind:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#7701)
*  igt@drm_fdinfo@most-busy-check-all@bcs0:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#8414) +19 other tests skip
*  igt@drm_fdinfo@most-busy-check-all@rcs0:
*  
*  shard-rkl: PASS -> FAIL (i915#7742) +1 other test fail
*  igt@drm_fdinfo@virtual-busy-all:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#8414)
*  shard-mtlp: NOTRUN -> SKIP (i915#8414) +1 other test skip
*  igt@gem_caching@writes:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4873)
*  igt@gem_ctx_exec@basic-nohangcheck:
*  
*  shard-tglu: PASS -> FAIL (i915#6268)
*  igt@gem_ctx_sseu@invalid-args:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#280)
*  igt@gem_eio@reset-stress:
*  
*  shard-dg1: PASS -> FAIL (i915#5784)
*  igt@gem_eio@wait-wedge-immediate:
*  
*  shard-mtlp: PASS -> ABORT (i915#9262)
*  igt@gem_exec_balancer@hog:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4812)
*  igt@gem_exec_balancer@sliced:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4812)
*  igt@gem_exec_capture@capture-invisible@smem0:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#6334)
*  igt@gem_exec_fair@basic-none-rrul@rcs0:
*  
*  shard-tglu: NOTRUN -> FAIL (i915#2842)
*  igt@gem_exec_fair@basic-none-vip:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4473 / i915#4771)
*  igt@gem_exec_fair@basic-none-vip@rcs0:
*  
*  shard-rkl: NOTRUN -> FAIL (i915#2842)
*  igt@gem_exec_fair@basic-pace-solo@rcs0:
*  
*  shard-rkl: PASS -> FAIL (i915#2842) +1 other test fail
*  igt@gem_exec_fair@basic-throttle@rcs0:
*  
*  shard-tglu: PASS -> FAIL (i915#2842) +1 other test fail
*  igt@gem_exec_flush@basic-uc-ro-default:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3539 / i915#4852) +1 other test skip
*  igt@gem_exec_params@rsvd2-dirt:
*  
*  shard-dg2: NOTRUN -> SKIP (fdo#109283 / i915#5107)
*  igt@gem_exec_params@secure-non-master:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#112283)
*  igt@gem_exec_reloc@basic-cpu-wc-active:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#3281) +5 other tests skip
*  igt@gem_exec_reloc@basic-gtt-read-active:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#3281)
*  igt@gem_exec_reloc@basic-write-read-active:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3281) +2 other tests skip
*  igt@gem_exec_reloc@basic-write-wc-active:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#3281) +2 other tests skip
*  igt@gem_exec_suspend@basic-s4-devices@lmem0:
*  
*  shard-dg2: NOTRUN -> ABORT (i915#7975 / i915#8213) +1 other test abort
*  igt@gem_fenced_exec_thrash@2-spare-fences:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4860) +1 other test skip
*  igt@gem_fenced_exec_thrash@no-spare-fences:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4860)
*  igt@gem_lmem_swapping@parallel-random-verify:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#4613)
*  igt@gem_lmem_swapping@smem-oom@lmem0:
*  
*  shard-dg2: NOTRUN -> DMESG-WARN (i915#4936 / i915#5493)
*  igt@gem_lmem_swapping@verify-random-ccs:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4613) +1 other test skip
*  igt@gem_lmem_swapping@verify-random-ccs@lmem0:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4565)
*  igt@gem_mmap@bad-object:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4083) +1 other test skip
*  igt@gem_mmap_gtt@basic-read-write-distinct:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4077) +7 other tests skip
*  igt@gem_mmap_gtt@basic-write-read-distinct:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4077) +6 other tests skip
*  igt@gem_mmap_wc@read:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4083)
*  igt@gem_partial_pwrite_pread@reads-snoop:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3282) +2 other tests skip
*  igt@gem_pxp@create-valid-protected-context:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4270) +2 other tests skip
*  igt@gem_pxp@protected-encrypted-src-copy-not-readible:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4270) +1 other test skip
*  igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4270) +1 other test skip
*  igt@gem_readwrite@write-bad-handle:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#3282) +1 other test skip
*  igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#8428) +1 other test skip
*  igt@gem_set_tiling_vs_blt@untiled-to-tiled:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4079) +1 other test skip
*  igt@gem_softpin@evict-snoop:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4885)
*  shard-mtlp: NOTRUN -> SKIP (i915#4885)
*  igt@gem_tiled_blits@basic:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4077) +1 other test skip
*  igt@gem_unfence_active_buffers:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4879)
*  igt@gem_userptr_blits@coherency-sync:
*  
*  shard-rkl: NOTRUN -> SKIP (fdo#110542)
*  shard-mtlp: NOTRUN -> SKIP (i915#3297) +1 other test skip
*  igt@gem_userptr_blits@forbidden-operations:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#3282)
*  igt@gem_userptr_blits@map-fixed-invalidate-overlap:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#3297 / i915#4880)
*  igt@gem_userptr_blits@readonly-unsync:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3297)
*  igt@gen7_exec_parse@cmd-crossing-page:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#109289)
*  igt@gen9_exec_parse@allowed-all:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#2527)
*  shard-mtlp: NOTRUN -> SKIP (i915#2856) +1 other test skip
*  igt@gen9_exec_parse@allowed-single:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#2527)
*  igt@gen9_exec_parse@basic-rejected:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#2527 / i915#2856)
*  igt@gen9_exec_parse@secure-batches:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#2856)
*  igt@i915_module_load@reload-with-fault-injection:
*  
*  shard-dg2: PASS -> DMESG-WARN (i915#9559)
*  shard-snb: PASS -> INCOMPLETE (i915#9200)
*  igt@i915_pm_freq_mult@media-freq@gt0:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#6590)
*  igt@i915_pm_freq_mult@media-freq@gt1:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#6590) +1 other test skip
*  igt@i915_pm_rps@basic-api:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#6621)
*  igt@i915_pm_rps@min-max-config-idle:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#6621)
*  igt@i915_pm_rps@reset:
*  
*  shard-snb: PASS -> INCOMPLETE (i915#7790)
*  igt@i915_selftest@mock@memory_region:
*  
*  shard-mtlp: NOTRUN -> DMESG-WARN (i915#9311)
*  igt@kms_addfb_basic@basic-y-tiled-legacy:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4215)
*  shard-mtlp: NOTRUN -> SKIP (i915#4212)
*  igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#3826)
*  igt@kms_async_flips@crc@pipe-b-hdmi-a-1:
*  
*  shard-dg2: NOTRUN -> FAIL (i915#8247) +3 other tests fail
*  igt@kms_async_flips@crc@pipe-c-hdmi-a-1:
*  
*  shard-dg1: NOTRUN -> FAIL (i915#8247) +3 other tests fail
*  igt@kms_atomic@plane-primary-overlay-mutable-zpos:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#9531)
*  igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#1769 / i915#3555)
*  igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#111615 / i915#5286) +1 other test skip
*  igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
*  
*  shard-mtlp: PASS -> FAIL (i915#5138)
*  igt@kms_big_fb@linear-32bpp-rotate-90:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#111614) +2 other tests skip
*  igt@kms_big_fb@x-tiled-16bpp-rotate-270:
*  
*  shard-mtlp: NOTRUN -> SKIP (fdo#111614) +1 other test skip
*  igt@kms_big_fb@x-tiled-32bpp-rotate-270:
*  
*  shard-dg2: NOTRUN -> SKIP (fdo#111614) +1 other test skip
*  igt@kms_big_fb@x-tiled-64bpp-rotate-270:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#3638)
*  igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
*  
*  shard-tglu: PASS -> FAIL (i915#3743) +1 other test fail
*  igt@kms_big_fb@y-tiled-8bpp-rotate-180:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#5190) +6 other tests skip
*  igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4538) +1 other test skip
*  igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4538 / i915#5190) +3 other tests skip
*  igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#111615) +3 other tests skip
*  igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
*  
*  shard-mtlp: NOTRUN -> SKIP (fdo#111615) +6 other tests skip
*  igt@kms_big_joiner@2x-modeset:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#2705)
*  igt@kms_cdclk@mode-transition-all-outputs:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#7213)
*  igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-2:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#7213) +3 other tests skip
*  igt@kms_chamelium_audio@hdmi-audio-edid:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#7828) +2 other tests skip
*  igt@kms_chamelium_color@ctm-0-75:
*  
*  shard-dg2: NOTRUN -> SKIP (fdo#111827)
*  igt@kms_chamelium_color@degamma:
*  
*  shard-dg1: NOTRUN -> SKIP (fdo#111827)
*  shard-mtlp: NOTRUN -> SKIP (fdo#111827)
*  igt@kms_chamelium_edid@hdmi-mode-timings:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#7828) +4 other tests skip
*  igt@kms_chamelium_hpd@dp-hpd-fast:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#7828) +1 other test skip
*  igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#7828) +5 other tests skip
*  igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#7828) +1 other test skip
*  igt@kms_color@deep-color@pipe-a-hdmi-a-2-gamma:
*  
*  shard-rkl: NOTRUN -> FAIL (i915#6892) +1 other test fail
*  igt@kms_content_protection@lic:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#6944)
*  shard-rkl: NOTRUN -> SKIP (i915#7118)
*  igt@kms_cursor_crc@cursor-onscreen-512x170:
*  
*  shard-rkl: NOTRUN -> SKIP (fdo#109279 / i915#3359)
*  igt@kms_cursor_crc@cursor-random-512x512:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3359)
*  igt@kms_cursor_crc@cursor-rapid-movement-32x10:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#3555) +5 other tests skip
*  igt@kms_cursor_crc@cursor-sliding-32x10:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#3555)
*  shard-mtlp: NOTRUN -> SKIP (i915#3555 / i915#8814)
*  igt@kms_cursor_crc@cursor-sliding-512x170:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#3359) +2 other tests skip
*  igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#3546) +2 other tests skip
*  igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
*  
*  shard-dg2: NOTRUN -> SKIP (fdo#109274 / i915#5354) +1 other test skip
*  igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#109274 / fdo#111767)
*  igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#4103 / i915#4213)
*  shard-mtlp: NOTRUN -> SKIP (i915#4213)
*  igt@kms_display_modes@extended-mode-basic:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#3555)
*  shard-mtlp: NOTRUN -> SKIP (i915#3555 / i915#8827)
*  igt@kms_dsc@dsc-with-formats:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3555 / i915#3840)
*  igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
*  
*  shard-mtlp: NOTRUN -> SKIP (fdo#111767 / i915#3637)
*  shard-dg1: NOTRUN -> SKIP (fdo#111767 / fdo#111825)
*  igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#109274 / i915#3637) +2 other tests skip
*  igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
*  
*  shard-dg2: NOTRUN -> SKIP (fdo#109274) +1 other test skip
*  shard-snb: NOTRUN -> SKIP (fdo#109271) +7 other tests skip
*  igt@kms_flip@2x-plain-flip:
*  
*  shard-rkl: NOTRUN -> SKIP (fdo#111825)
*  shard-mtlp: NOTRUN -> SKIP (i915#3637) +1 other test skip
*  igt@kms_flip@flip-vs-fences-interruptible:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#8381)
*  igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-default-mode:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#8810)
*  igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#2587 / i915#2672)
*  igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#2587 / i915#2672) +2 other tests skip
*  igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#2672) +1 other test skip
*  igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#2672)
*  igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#2672) +1 other test skip
*  igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#3555 / i915#8810)
*  igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-default-mode:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#2672 / i915#3555)
*  igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
*  
*  shard-rkl: NOTRUN -> SKIP (fdo#111825 / i915#1825) +3 other tests skip
*  igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#1825) +24 other tests skip
*  igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#8708) +9 other tests skip
*  igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#5354) +15 other tests skip
*  igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
*  
*  shard-dg1: NOTRUN -> SKIP (fdo#111825) +9 other tests skip
*  igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#8708) +2 other tests skip
*  shard-mtlp: NOTRUN -> SKIP (i915#8708) +3 other tests skip
*  igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3458) +9 other tests skip
*  igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#3023) +1 other test skip
*  igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#3458) +1 other test skip
*  igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-pwrite:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#109280) +13 other tests skip
*  igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#110189) +8 other tests skip
*  igt@kms_getfb@getfb-reject-ccs:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#6118)
*  igt@kms_hdr@static-swap:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3555 / i915#8228) +2 other tests skip
*  igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#1839)
*  igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
*  
*  shard-dg1: NOTRUN -> SKIP (fdo#109289)
*  shard-mtlp: NOTRUN -> SKIP (fdo#109289) +2 other tests skip
*  igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
*  
*  shard-dg2: NOTRUN -> SKIP (fdo#109289) +1 other test skip
*  igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-1:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#5176 / i915#9423) +3 other tests skip
*  igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-hdmi-a-1:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#5176 / i915#9423) +3 other tests skip
*  igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-1:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#5235) +1 other test skip
*  igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-dp-4:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#5235) +15 other tests skip
*  igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#5235) +7 other tests skip
*  igt@kms_prime@basic-crc-hybrid:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#6524 / i915#6805) +1 other test skip
*  igt@kms_prime@d3hot:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#6524)
*  igt@kms_psr2_su@page_flip-nv12:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#9683)
*  igt@kms_psr2_su@page_flip-p010:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#109642 / fdo#111068 / i915#9683)
*  igt@kms_psr@psr2_cursor_mmap_cpu:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#9673)
*  igt@kms_psr@psr2_primary_blt:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#9673) +1 other test skip
*  igt@kms_psr@psr2_primary_render:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#9681) +2 other tests skip
*  igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#9685)
*  igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#4235)
*  igt@kms_rotation_crc@sprite-rotation-90:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#4235) +2 other tests skip
*  igt@kms_scaling_modes@scaling-mode-none:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3555) +3 other tests skip
*  igt@kms_setmode@invalid-clone-exclusive-crtc:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3555 / i915#4098)
*  igt@kms_setmode@invalid-clone-single-crtc-stealing:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#3555 / i915#4098)
*  shard-mtlp: NOTRUN -> SKIP (i915#3555 / i915#8809)
*  igt@kms_tiled_display@basic-test-pattern:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#8623)
*  igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1:
*  
*  shard-mtlp: PASS -> FAIL (i915#9196)
*  igt@kms_writeback@writeback-fb-id:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#2437)
*  igt@kms_writeback@writeback-pixel-formats:
*  
*  shard-rkl: NOTRUN -> SKIP (i915#2437)
*  shard-mtlp: NOTRUN -> SKIP (i915#2437)
*  igt@perf@enable-disable@0-rcs0:
*  
*  shard-dg2: PASS -> FAIL (i915#8724)
*  igt@perf_pmu@busy-double-start@bcs0:
*  
*  shard-mtlp: PASS -> FAIL (i915#4349) +1 other test fail
*  igt@perf_pmu@frequency@gt0:
*  
*  shard-dg2: NOTRUN -> FAIL (i915#6806)
*  igt@perf_pmu@rc6-all-gts:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#8516)
*  igt@prime_vgem@basic-fence-read:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#3291 / i915#3708)
*  igt@sw_sync@timeline_closed:
*  
*  shard-mtlp: PASS -> DMESG-WARN (i915#2017)
*  igt@v3d/v3d_mmap@mmap-bad-handle:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#2575) +1 other test skip
*  igt@v3d/v3d_perfmon@create-single-perfmon:
*  
*  shard-rkl: NOTRUN -> SKIP (fdo#109315)
*  igt@v3d/v3d_submit_cl@valid-submission:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#2575) +5 other tests skip
*  igt@v3d/v3d_submit_csd@single-out-sync:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#2575) +6 other tests skip
*  igt@v3d/v3d_submit_csd@valid-multisync-submission:
*  
*  shard-tglu: NOTRUN -> SKIP (fdo#109315 / i915#2575) +3 other tests skip
*  igt@vc4/vc4_mmap@mmap-bo:
*  
*  shard-dg2: NOTRUN -> SKIP (i915#7711) +3 other tests skip
*  igt@vc4/vc4_purgeable_bo@access-purged-bo-mem:
*  
*  shard-mtlp: NOTRUN -> SKIP (i915#7711) +3 other tests skip
*  igt@vc4/vc4_purgeable_bo@mark-unpurgeable-purged:
*  
*  shard-dg1: NOTRUN -> SKIP (i915#7711) +1 other test skip
*  igt@vc4/vc4_wait_bo@unused-bo-1ns:
*  
*  shard-tglu: NOTRUN -> SKIP (i915#2575) +2 other tests skip
*  Possible fixes
*  igt@gem_eio@hibernate:
*  
*  shard-dg1: ABORT (i915#7975 / i915#8213) -> PASS
*  shard-mtlp: ABORT (i915#7975 / i915#8213 / i915#9414) -> PASS
*  igt@gem_exec_fair@basic-pace-share@rcs0:
*  
*  shard-glk: FAIL (i915#2842) -> PASS
*  igt@gem_exec_suspend@basic-s4-devices@smem:
*  
*  shard-tglu: ABORT (i915#7975 / i915#8213) -> PASS
*  igt@gem_lmem_swapping@smem-oom@lmem0:
*  
*  shard-dg1: DMESG-WARN (i915#4936 / i915#5493) -> PASS
*  igt@gem_workarounds@reset:
*  
*  shard-mtlp: ABORT (i915#9414) -> PASS
*  {igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0}:
*  
*  shard-dg1: FAIL (i915#3591) -> PASS
*  igt@i915_pm_rps@reset:
*  
*  shard-tglu: INCOMPLETE -> PASS
*  igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
*  
*  shard-tglu: FAIL (i915#3743) -> PASS
*  {igt@kms_pm_rpm@dpms-mode-unset-non-lpsp}:
*  
*  shard-rkl: SKIP (i915#9519) -> PASS
*  shard-dg1: SKIP (i915#9519) -> PASS
*  igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
*  
*  shard-rkl: INCOMPLETE (i915#8875 / i915#9569) -> PASS
*  igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
*  
*  shard-tglu: FAIL (i915#9196) -> PASS +1 other test pass
*  igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1:
*  
*  shard-snb: FAIL (i915#9196) -> PASS
*  igt@perf_pmu@render-node-busy-idle@vcs0:
*  
*  shard-mtlp: FAIL (i915#4349) -> PASS
*  igt@prime_vgem@fence-wait@vcs1:
*  
*  shard-mtlp: ABORT -> PASS
*  igt@prime_vgem@fence-wait@vecs0:
*  
*  shard-mtlp: DMESG-WARN (i915#8875) -> PASS
*  Warnings
*  igt@kms_content_protection@type1:
*  
*  shard-dg2: SKIP (i915#7118 / i915#7162) -> SKIP (i915#7118)
*  igt@kms_fbcon_fbt@psr:
*  
*  shard-rkl: SKIP (i915#3955) -> SKIP (fdo#110189 / i915#3955)
*  {name}: This element is suppressed. This means it is ignored when computing
*  the status of the difference (SUCCESS, WARNING, or FAILURE).
*  
*  Build changes
*  Linux: CI_DRM_13898 -> Patchwork_126526v6
*  Piglit: piglit_4509 -> None
*  CI-20190529: 20190529
*  CI_DRM_13898: b7c604dc2389bdd42eb052506c3908ad635f28bf @ git://anongit.freedesktop.org/gfx-ci/linux
*  IGT_7595: cfa00d99b1dfa0621ea552d1ed54907798da1a1a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
*  Patchwork_126526v6: 8d55b3869b666b36e26a40cfc2f1f84b72a34cd3 @ git://anongit.freedesktop.org/gfx-ci/linux
*  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit


> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_13901 -> Patchwork_126526v6
> ====================================================
> 
> Summary
> -------
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/index.html
> 
> Participating hosts (31 -> 33)
> ------------------------------
> 
>   Additional (4): fi-hsw-4770 bat-kbl-2 fi-pnv-d510 bat-dg1-5 
>   Missing    (2): fi-kbl-soraka fi-snb-2520m 
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_126526v6 that come from known issues:
> 
> ### CI changes ###
> 
> #### Issues hit ####
> 
>   * boot:
>     - bat-jsl-1:          [PASS][1] -> [FAIL][2] ([i915#8293])
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-jsl-1/boot.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-jsl-1/boot.html
> 
>   
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@fbdev@info:
>     - bat-kbl-2:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1849])
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-kbl-2/igt@fbdev@info.html
> 
>   * igt@gem_exec_suspend@basic-s0@smem:
>     - bat-dg2-9:          [PASS][4] -> [INCOMPLETE][5] ([i915#8797] / [i915#9275])
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html
> 
>   * igt@gem_lmem_swapping@basic:
>     - fi-pnv-d510:        NOTRUN -> [SKIP][6] ([fdo#109271]) +25 other tests skip
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-pnv-d510/igt@gem_lmem_swapping@basic.html
> 
>   * igt@gem_lmem_swapping@parallel-random-engines:
>     - bat-kbl-2:          NOTRUN -> [SKIP][7] ([fdo#109271]) +20 other tests skip
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html
> 
>   * igt@gem_mmap@basic:
>     - bat-dg1-5:          NOTRUN -> [SKIP][8] ([i915#4083])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@gem_mmap@basic.html
> 
>   * igt@gem_tiled_fence_blits@basic:
>     - bat-dg1-5:          NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html
> 
>   * igt@gem_tiled_pread_basic:
>     - bat-dg1-5:          NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@gem_tiled_pread_basic.html
> 
>   * igt@i915_module_load@load:
>     - bat-adlp-6:         [PASS][11] -> [DMESG-WARN][12] ([i915#1982] / [i915#8449])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-adlp-6/igt@i915_module_load@load.html
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-adlp-6/igt@i915_module_load@load.html
> 
>   * igt@i915_pm_rps@basic-api:
>     - bat-dg1-5:          NOTRUN -> [SKIP][13] ([i915#6621])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@i915_pm_rps@basic-api.html
> 
>   * igt@i915_selftest@live@hangcheck:
>     - fi-hsw-4770:        NOTRUN -> [INCOMPLETE][14] ([i915#9527])
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
> 
>   * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
>     - fi-hsw-4770:        NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#5190])
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-hsw-4770/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
> 
>   * igt@kms_addfb_basic@basic-x-tiled-legacy:
>     - bat-dg1-5:          NOTRUN -> [SKIP][16] ([i915#4212]) +7 other tests skip
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html
> 
>   * igt@kms_addfb_basic@basic-y-tiled-legacy:
>     - bat-dg1-5:          NOTRUN -> [SKIP][17] ([i915#4215])
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html
> 
>   * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
>     - bat-dg1-5:          NOTRUN -> [SKIP][18] ([i915#4103] / [i915#4213]) +1 other test skip
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
> 
>   * igt@kms_dsc@dsc-basic:
>     - bat-dg1-5:          NOTRUN -> [SKIP][19] ([i915#3555] / [i915#3840])
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_dsc@dsc-basic.html
> 
>   * igt@kms_force_connector_basic@force-load-detect:
>     - bat-dg1-5:          NOTRUN -> [SKIP][20] ([fdo#109285])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html
> 
>   * igt@kms_hdmi_inject@inject-audio:
>     - bat-dg1-5:          NOTRUN -> [SKIP][21] ([i915#433])
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_hdmi_inject@inject-audio.html
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
>     - fi-hsw-4770:        NOTRUN -> [SKIP][22] ([fdo#109271]) +12 other tests skip
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1.html
> 
>   * igt@kms_pipe_crc_basic@read-crc-frame-sequence:
>     - bat-kbl-2:          NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#1845]) +14 other tests skip
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-kbl-2/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
> 
>   * igt@kms_setmode@basic-clone-single-crtc:
>     - bat-dg1-5:          NOTRUN -> [SKIP][24] ([i915#3555])
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html
> 
>   * igt@prime_vgem@basic-fence-read:
>     - bat-dg1-5:          NOTRUN -> [SKIP][25] ([i915#3708]) +3 other tests skip
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@prime_vgem@basic-fence-read.html
> 
>   * igt@prime_vgem@basic-gtt:
>     - bat-dg1-5:          NOTRUN -> [SKIP][26] ([i915#3708] / [i915#4077]) +1 other test skip
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-dg1-5/igt@prime_vgem@basic-gtt.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_selftest@live@gt_heartbeat:
>     - fi-apl-guc:         [DMESG-FAIL][27] ([i915#5334]) -> [PASS][28]
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
> 
>   * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
>     - bat-rplp-1:         [ABORT][29] ([i915#8668]) -> [PASS][30]
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13901/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
>   [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
>   [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
>   [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
>   [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
>   [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
>   [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
>   [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
>   [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
>   [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
>   [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
>   [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
>   [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
>   [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
>   [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
>   [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
>   [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
>   [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
>   [i915#8449]: https://gitlab.freedesktop.org/drm/intel/issues/8449
>   [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
>   [i915#8797]: https://gitlab.freedesktop.org/drm/intel/issues/8797
>   [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
>   [i915#9527]: https://gitlab.freedesktop.org/drm/intel/issues/9527
>   [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_13901 -> Patchwork_126526v6
> 
>   CI-20190529: 20190529
>   CI_DRM_13901: 8d55b3869b666b36e26a40cfc2f1f84b72a34cd3 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_7595: cfa00d99b1dfa0621ea552d1ed54907798da1a1a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_126526v6: 8d55b3869b666b36e26a40cfc2f1f84b72a34cd3 @ git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> ### Linux commits
> 
> dfd69da63d0e drm/i915/dp: Reuse intel_dp_{max, effective}_data_rate in intel_link_compute_m_n()
> 3bdeb4eb6880 drm/i915/dp: Simplify intel_dp_max_data_rate()
> 29d9d5b20906 drm/i915/dp: Report a rounded-down value as the maximum data rate
> ce144ebc203f drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
> 332160a9365a drm/i915/dp_mst: Calculate the BW overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
> a77782e10312 drm/i915/dp: Fix UHBR link M/N values
> 842740e3896c drm/i915/dp: Account for channel coding efficiency on UHBR links
> a11a8db78fa3 drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()
> 83508fa204b8 drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
> bb5be2d5e23b drm/dp_mst: Fix PBN divider calculation for UHBR rates
> bb817db5d4a4 drm/dp_mst: Store the MST PBN divider value in fixed point format
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126526v6/index.html

Re: [Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values

[Lyude Paul]

For patches 1-3:

Reviewed-by: Lyude Paul <lyude@redhat.com>

On Thu, 2023-11-16 at 15:18 +0200, Imre Deak wrote:
> This is v2 of [1], with the following changes:
> - Store the pbn_div value in fixed point format.
> - Fix PBN calculation in patch 8.
> - Reuse intel_dp_max_data_rate(), intel_dp_effective_data_rate() in
>   intel_link_compute_m_n() (Jani).
> 
> [1] https://lore.kernel.org/all/20231113201110.510724-1-imre.deak@intel.com
> 
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Lyude Paul <lyude@redhat.com>
> 
> Imre Deak (11):
>   drm/dp_mst: Store the MST PBN divider value in fixed point format
>   drm/dp_mst: Fix PBN divider calculation for UHBR rates
>   drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
>   drm/i915/dp: Replace intel_dp_is_uhbr_rate() with
>     drm_dp_is_uhbr_rate()
>   drm/i915/dp: Account for channel coding efficiency on UHBR links
>   drm/i915/dp: Fix UHBR link M/N values
>   drm/i915/dp_mst: Calculate the BW overhead in
>     intel_dp_mst_find_vcpi_slots_for_bpp()
>   drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
>   drm/i915/dp: Report a rounded-down value as the maximum data rate
>   drm/i915/dp: Simplify intel_dp_max_data_rate()
>   drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in
>     intel_link_compute_m_n()
> 
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   5 +-
>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   3 +-
>  .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   5 +-
>  drivers/gpu/drm/display/drm_dp_mst_topology.c |  31 +++-
>  drivers/gpu/drm/i915/display/intel_display.c  |  51 ++----
>  drivers/gpu/drm/i915/display/intel_dp.c       |  78 +++++++---
>  drivers/gpu/drm/i915/display/intel_dp.h       |   5 +-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  55 +++++--
>  drivers/gpu/drm/nouveau/dispnv50/disp.c       |   6 +-
>  .../gpu/drm/tests/drm_dp_mst_helper_test.c    | 145 ++++++++++++++++++
>  include/drm/display/drm_dp_helper.h           |  13 ++
>  include/drm/display/drm_dp_mst_helper.h       |   7 +-
>  12 files changed, 311 insertions(+), 93 deletions(-)
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat