Re: [Intel-gfx] [PATCH 03/12] drm/i915: Split chv_load_cgm_csc() into pieces

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 3/29/2023 7:19 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Split chv_cgm_csc_convert_ctm() out from chv_load_cgm_csc() so
> that we have functions with clear jobs. This is also how the ilk+
> code is already structured.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_color.c | 19 +++++++++++++------
>   1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index b1059e0c0665..47af24e64a7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -399,16 +399,13 @@ static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state)
>   	}
>   }
>   
> -static void chv_load_cgm_csc(struct intel_crtc *crtc,
> -			     const struct drm_property_blob *blob)
> +static void chv_cgm_csc_convert_ctm(u16 coeffs[9],
> +				    const struct drm_property_blob *blob)
>   {
> -	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>   	const struct drm_color_ctm *ctm = blob->data;
> -	enum pipe pipe = crtc->pipe;
> -	u16 coeffs[9];
>   	int i;
>   
> -	for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
> +	for (i = 0; i < 9; i++) {

Can still use ARRAY_SIZE(coeffs).

In any case the patch looks good to me.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


>   		u64 abs_coeff = ((1ULL << 63) - 1) & ctm->matrix[i];
>   
>   		/* Round coefficient. */
> @@ -425,6 +422,16 @@ static void chv_load_cgm_csc(struct intel_crtc *crtc,
>   		coeffs[i] |= ((abs_coeff >> 32) & 7) << 12;
>   		coeffs[i] |= (abs_coeff >> 20) & 0xfff;
>   	}
> +}
> +
> +static void chv_load_cgm_csc(struct intel_crtc *crtc,
> +			     const struct drm_property_blob *blob)
> +{
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +	enum pipe pipe = crtc->pipe;
> +	u16 coeffs[9];
> +
> +	chv_cgm_csc_convert_ctm(coeffs, blob);
>   
>   	intel_de_write_fw(i915, CGM_PIPE_CSC_COEFF01(pipe),
>   			  coeffs[1] << 16 | coeffs[0]);