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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 15/22] drm/i915/huc: New HuC status register for Gen11
Date: Mon, 15 Apr 2019 15:23:52 -0700	[thread overview]
Message-ID: <c6560e3c-d0d5-06cf-3f38-27dfdafe0558@intel.com> (raw)
In-Reply-To: <d5c0deb0-422e-2b2d-cdd3-05dc177a20da@intel.com>



On 4/15/19 3:10 PM, Daniele Ceraolo Spurio wrote:
> 
> 
> On 4/15/19 2:44 PM, Michal Wajdeczko wrote:
>> On Mon, 15 Apr 2019 23:19:40 +0200, Daniele Ceraolo Spurio 
>> <daniele.ceraolospurio@intel.com> wrote:
>>
>>>
>>>
>>> On 4/11/19 1:44 AM, Michal Wajdeczko wrote:
>>>> Gen11 defines new register for checking HuC authentication status.
>>>> Look into the right register and bit.
>>>>  BSpec: 19686
>>>>  Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>> Cc: Tony Ye <tony.ye@intel.com>
>>>> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>>>> Cc: John Spotswood <john.a.spotswood@intel.com>
>>>> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>>>> ---
>>>>   drivers/gpu/drm/i915/intel_guc_reg.h |  3 ++
>>>>   drivers/gpu/drm/i915/intel_huc.c     | 56 
>>>> ++++++++++++++++++++++++----
>>>>   2 files changed, 51 insertions(+), 8 deletions(-)
>>>>  diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h 
>>>> b/drivers/gpu/drm/i915/intel_guc_reg.h
>>>> index d26de5193568..7eba65795b58 100644
>>>> --- a/drivers/gpu/drm/i915/intel_guc_reg.h
>>>> +++ b/drivers/gpu/drm/i915/intel_guc_reg.h
>>>> @@ -79,6 +79,9 @@
>>>>   #define HUC_STATUS2             _MMIO(0xD3B0)
>>>>   #define   HUC_FW_VERIFIED       (1<<7)
>>>>   +#define GEN11_HUC_KERNEL_LOAD_INFO    _MMIO(0xC1DC)
>>>> +#define   HUC_LOAD_SUCCESSFUL          (1 << 0)
>>>> +
>>>>   #define GUC_WOPCM_SIZE            _MMIO(0xc050)
>>>>   #define   GUC_WOPCM_SIZE_LOCKED          (1<<0)
>>>>   #define   GUC_WOPCM_SIZE_SHIFT        12
>>>> diff --git a/drivers/gpu/drm/i915/intel_huc.c 
>>>> b/drivers/gpu/drm/i915/intel_huc.c
>>>> index 94c04f16a2ad..708a4b387259 100644
>>>> --- a/drivers/gpu/drm/i915/intel_huc.c
>>>> +++ b/drivers/gpu/drm/i915/intel_huc.c
>>>> @@ -40,6 +40,47 @@ int intel_huc_init_misc(struct intel_huc *huc)
>>>>       return 0;
>>>>   }
>>>>   +static int gen8_huc_wait_verified(struct intel_huc *huc)
>>>
>>> why gen8?
>>>
>>>> +{
>>>> +    struct drm_i915_private *i915 = huc_to_i915(huc);
>>>> +    u32 status;
>>>> +    int ret;
>>>> +
>>>> +    ret = __intel_wait_for_register(&i915->uncore,
>>>> +                    HUC_STATUS2,
>>>> +                    HUC_FW_VERIFIED,
>>>> +                    HUC_FW_VERIFIED,
>>>> +                    2, 50, &status);
>>>> +    if (ret)
>>>> +        DRM_ERROR("HuC: status %#x\n", status);
>>>> +    return ret;
>>>> +}
>>>> +
>>>> +static int gen11_huc_wait_verified(struct intel_huc *huc)
>>>> +{
>>>> +    struct drm_i915_private *i915 = huc_to_i915(huc);
>>>> +    int ret;
>>>> +
>>>> +    ret = __intel_wait_for_register(&i915->uncore,
>>>> +                    GEN11_HUC_KERNEL_LOAD_INFO,
>>>> +                    HUC_LOAD_SUCCESSFUL,
>>>> +                    HUC_LOAD_SUCCESSFUL,
>>>> +                    2, 50, NULL);
>>>> +    return ret;
>>>> +}
>>>> +
>>>> +static int huc_wait_verified(struct intel_huc *huc)
>>>
>>> We do call this only once, so maybe we can just avoid having a 
>>> separate function and just have it directly in intel_huc_auth? the 
>>> code is simple enough. Otherwise, to avoid 2 identical functions 
>>> which diff only in the register details,
>>
>> There was one small diff: in case of timeout, pre-gen11 variant was 
>> printing
>> whole HuC status value. But maybe we don't care any more...
> 
> AFAICS the other bits in the pre-gen11 register are unrelated to 
> authentication, so there isn't really any value in printing that on an 
> auth fail. Some of the bits are loading failure related, so we could 
> think about printing the register if the dma fails.
> 
>>
>>> we could save the register and the expected value in the huc struct 
>>> during init_early and just wait on (huc->auth.reg & huc->auth.mask), 
>>> which we could also use in intel_huc_check_status().
>>
>> To be more future ready, we should store reg/mask/value tuple.
>>
>> Btw, is it ok that intel_huc_check_status() will now return different
>> values depending on gen (was 1<<7, now 1<<0) for status ?
>>
>> Note that intel_huc_check_status() is used directly in 
>> I915_PARAM_HUC_STATUS.
>> Maybe we should try to unify these and always return just 0 and fixed 1 ?
>> Does it count as uABI change ?
>>
> 
> It is in theory an ABI change, but the documentation above 
> intel_huc_check_status says:
> 
>   * Returns: 1 if HuC firmware is loaded and verified,
>   * 0 if HuC firmware is not loaded and -ENODEV if HuC
>   * is not present on this platform.
> 
> So I'm guessing there is already a disconnect between expectation and 
> actual returned value. I doubt anyone is using the parameter as 
> something different than a bool so we should be able to get away with 
> "fixing" the ABI like we did with other calls in the past, but we should 
> double-check with the user the call was added for.
> 

Scratch this, the status variable that we return is a bool, so the 
result should already be  automatically casted to the appropriate value 
(0 or 1).

Daniele

> Daniele
> 
>>>
>>> Apart from this, register values do match the FW and the specs.
>>>
>>> Daniele
>>>
>>>> +{
>>>> +    struct drm_i915_private *i915 = huc_to_i915(huc);
>>>> +    int ret;
>>>> +
>>>> +    if (INTEL_GEN(i915) >= 11)
>>>> +        ret = gen11_huc_wait_verified(huc);
>>>> +    else
>>>> +        ret = gen8_huc_wait_verified(huc);
>>>> +    return ret;
>>>> +}
>>>> +
>>>>   /**
>>>>    * intel_huc_auth() - Authenticate HuC uCode
>>>>    * @huc: intel_huc structure
>>>> @@ -56,7 +97,6 @@ int intel_huc_auth(struct intel_huc *huc)
>>>>       struct drm_i915_private *i915 = huc_to_i915(huc);
>>>>       struct intel_guc *guc = &i915->guc;
>>>>       struct i915_vma *vma;
>>>> -    u32 status;
>>>>       int ret;
>>>>         if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
>>>> @@ -79,13 +119,9 @@ int intel_huc_auth(struct intel_huc *huc)
>>>>       }
>>>>         /* Check authentication status, it should be done by now */
>>>> -    ret = __intel_wait_for_register(&i915->uncore,
>>>> -                    HUC_STATUS2,
>>>> -                    HUC_FW_VERIFIED,
>>>> -                    HUC_FW_VERIFIED,
>>>> -                    2, 50, &status);
>>>> +    ret = huc_wait_verified(huc);
>>>>       if (ret) {
>>>> -        DRM_ERROR("HuC: Firmware not verified %#x\n", status);
>>>> +        DRM_ERROR("HuC: Firmware not verified %d\n", ret);
>>>>           goto fail_unpin;
>>>>       }
>>>>   @@ -122,7 +158,11 @@ int intel_huc_check_status(struct intel_huc 
>>>> *huc)
>>>>           return -ENODEV;
>>>>         with_intel_runtime_pm(dev_priv, wakeref)
>>>> -        status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
>>>> +        if (INTEL_GEN(dev_priv) >= 11)
>>>> +            status = I915_READ(GEN11_HUC_KERNEL_LOAD_INFO) &
>>>> +                HUC_LOAD_SUCCESSFUL;
>>>> +        else
>>>> +            status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
>>>>         return status;
>>>>   }
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  reply	other threads:[~2019-04-15 22:23 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-11  8:44 [PATCH v2 00/22] GuC 32.0.3 Michal Wajdeczko
2019-04-11  8:44 ` [PATCH v2 01/22] drm/i915/guc: Change platform default GuC mode Michal Wajdeczko
2019-04-12 22:52   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 02/22] drm/i915/guc: Don't allow GuC submission Michal Wajdeczko
2019-04-15  7:37   ` Martin Peres
2019-04-11  8:44 ` [PATCH v2 03/22] drm/i915/guc: Simplify preparation of GuC parameter block Michal Wajdeczko
2019-04-15 18:27   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 04/22] drm/i915/guc: Update GuC firmware versions and names Michal Wajdeczko
2019-04-12 22:42   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 05/22] drm/i915/guc: Update GuC firmware CSS header Michal Wajdeczko
2019-04-15 20:25   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 06/22] drm/i915/guc: Update GuC boot parameters Michal Wajdeczko
2019-04-12 23:46   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 07/22] drm/i915/guc: Update GuC sleep status values Michal Wajdeczko
2019-04-13  0:06   ` Daniele Ceraolo Spurio
2019-04-13  0:24     ` Daniele Ceraolo Spurio
2019-04-15 20:21       ` John Spotswood
2019-04-13  0:20   ` [PATCH v2] drm/i915/guc: updated suspend/resume protocol Daniele Ceraolo Spurio
2019-04-16 23:16     ` John Spotswood
2019-04-11  8:44 ` [PATCH v2 08/22] drm/i915/guc: Update GuC sample-forcewake command Michal Wajdeczko
2019-04-13  0:10   ` Daniele Ceraolo Spurio
2019-04-16 23:45     ` John Spotswood
2019-04-11  8:44 ` [PATCH v2 09/22] drm/i915/guc: Update GuC ADS object definition Michal Wajdeczko
2019-04-13  1:16   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 10/22] drm/i915/guc: Always ask GuC to update power domain states Michal Wajdeczko
2019-04-15 20:46   ` Daniele Ceraolo Spurio
2019-04-16 23:26     ` John Spotswood
2019-04-11  8:44 ` [PATCH v2 11/22] drm/i915/guc: Reset GuC ADS during sanitize Michal Wajdeczko
2019-04-16 11:44   ` Lis, Tomasz
2019-04-11  8:44 ` [PATCH v2 12/22] drm/i915/guc: Treat GuC initialization failure as -EIO Michal Wajdeczko
2019-04-13  1:20   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 13/22] drm/i915/guc: New GuC interrupt register for Gen11 Michal Wajdeczko
2019-04-13  1:28   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 14/22] drm/i915/guc: New GuC scratch registers " Michal Wajdeczko
2019-04-13  1:30   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 15/22] drm/i915/huc: New HuC status register " Michal Wajdeczko
2019-04-15 21:19   ` Daniele Ceraolo Spurio
2019-04-15 21:44     ` Michal Wajdeczko
2019-04-15 22:10       ` Daniele Ceraolo Spurio
2019-04-15 22:23         ` Daniele Ceraolo Spurio [this message]
2019-04-11  8:44 ` [PATCH v2 16/22] drm/i915/guc: Create vfuncs for the GuC interrupts control functions Michal Wajdeczko
2019-04-15 17:51   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 17/22] drm/i915/guc: Correctly handle GuC interrupts on Gen11 Michal Wajdeczko
2019-04-11  8:44 ` [PATCH v2 18/22] drm/i915/guc: Update GuC CTB response definition Michal Wajdeczko
2019-04-15 17:57   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 19/22] drm/i915/guc: Enable GuC CTB communication on Gen11 Michal Wajdeczko
2019-04-11 23:58   ` Daniele Ceraolo Spurio
2019-04-11  8:44 ` [PATCH v2 20/22] drm/i915/guc: Define GuC firmware version for Icelake Michal Wajdeczko
2019-04-15 22:22   ` Srivatsa, Anusha
2019-04-11  8:44 ` [PATCH v2 21/22] drm/i915/huc: Define HuC " Michal Wajdeczko
2019-04-18 12:27   ` Ye, Tony
2019-04-11  8:44 ` [PATCH v2 22/22] HAX: prevent CI failures on configs with forced GuC submission Michal Wajdeczko
2019-04-12 11:30   ` Martin Peres
2019-04-12 11:54     ` Michal Wajdeczko
2019-04-11 19:17 ` ✗ Fi.CI.SPARSE: warning for GuC 32.0.3 (rev2) Patchwork
2019-04-11 19:37 ` ✓ Fi.CI.BAT: success " Patchwork
2019-04-11 20:24 ` [PATCH v2 00/22] GuC 32.0.3 Chris Wilson
2019-04-12  2:26 ` ✓ Fi.CI.IGT: success for GuC 32.0.3 (rev2) Patchwork
2019-04-13  0:46 ` ✗ Fi.CI.SPARSE: warning for GuC 32.0.3 (rev3) Patchwork
2019-04-13  1:09 ` ✓ Fi.CI.BAT: success " Patchwork
2019-04-13  4:33 ` ✓ Fi.CI.IGT: " Patchwork

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