Re: [PATCH v2 18/22] drm/i915/guc: Update GuC CTB response definition

[Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>]

On 4/11/19 1:44 AM, Michal Wajdeczko wrote:
> Current GuC firmwares identify response message in a different way.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Kelvin Gardiner <kelvin.gardiner@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_guc_ct.c   | 2 +-
>   drivers/gpu/drm/i915/intel_guc_fwif.h | 2 ++
>   2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_ct.c b/drivers/gpu/drm/i915/intel_guc_ct.c
> index dde1dc0d6e69..2d5dc2aa22a7 100644
> --- a/drivers/gpu/drm/i915/intel_guc_ct.c
> +++ b/drivers/gpu/drm/i915/intel_guc_ct.c
> @@ -565,7 +565,7 @@ static inline unsigned int ct_header_get_action(u32 header)
>   
>   static inline bool ct_header_is_response(u32 header)
>   {
> -	return ct_header_get_action(header) == INTEL_GUC_ACTION_DEFAULT;
> +	return !!(header & GUC_CT_MSG_IS_RESPONSE);
>   }
>   
>   static int ctb_read(struct intel_guc_ct_buffer *ctb, u32 *data)
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 68dfeecf7b26..115c693daf8e 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -361,6 +361,7 @@ struct guc_ct_buffer_desc {
>    *
>    * bit[4..0]	message len (in dwords)
>    * bit[7..5]	reserved
> + * bit[8]	response (G2H only)
>    * bit[8]	write fence to desc
>    * bit[9]	write status to H2G buff
>    * bit[10]	send status (via G2H)

The other definition of bit 8 and the defs of bits 9-10 are H2G only, we 
could update this comment to reflect that. With or without the change:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> @@ -369,6 +370,7 @@ struct guc_ct_buffer_desc {
>    */
>   #define GUC_CT_MSG_LEN_SHIFT			0
>   #define GUC_CT_MSG_LEN_MASK			0x1F
> +#define GUC_CT_MSG_IS_RESPONSE			(1 << 8)
>   #define GUC_CT_MSG_WRITE_FENCE_TO_DESC		(1 << 8)
>   #define GUC_CT_MSG_WRITE_STATUS_TO_BUFF		(1 << 9)
>   #define GUC_CT_MSG_SEND_STATUS			(1 << 10)
> 
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