Re: [PATCH v10 06/10] drm/i915/display: Wait for vblank in case of PSR is using trans push

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> In case PSR uses trans push as a "frame change" event and we need to wait
> vblank after triggering PSR "frame change" event. Otherwise we may miss
> selective updates.
>
> DSB skips all waits while PSR is active. Check push send is skipped as well
> because trans push send bit is not clearn by the HW if VRR is not enabled

typo:

s/clearn/clean


> -> we may start configuring new selective update while previous is not
> complete. Avoid this by waiting for vblank after sending trans push.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++++++++++-
>   1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7491e00e3858..b47c9d3d0d85 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7390,9 +7390,27 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
>   				new_crtc_state->dsb_color);
>   
>   	if (new_crtc_state->use_dsb && !intel_color_uses_chained_dsb(new_crtc_state)) {
> -		intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
> +		/*
> +		 * Dsb wait vblank may or may not skip. Let's remove it for PSR
> +		 * trans push case to ensure we are not waiting two vblanks
> +		 */
> +		if (!intel_psr_use_trans_push(new_crtc_state))
> +			intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
>   
>   		intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
> +
> +		/*
> +		 * In case PSR uses trans push as a "frame change" event and
> +		 * VRR is not in use we need to wait vblank. Othervise we may

typo:

s/Othervise/Otherwise


> +		 * miss selective updates. DSB skips all waits while PSR is
> +		 * active. Check push send is skipped as well because trans push
> +		 * send bit is not clearn by the HW if VRR is not enabled -> we


s/clearn/clean

With above fixed,

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

> +		 * may start configuring new selective update while previous is
> +		 * not complete.
> +		 */
> +		if (intel_psr_use_trans_push(new_crtc_state))
> +			intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
> +
>   		intel_dsb_wait_for_delayed_vblank(state, new_crtc_state->dsb_commit);
>   		intel_vrr_check_push_sent(new_crtc_state->dsb_commit,
>   					  new_crtc_state);