From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: "Winkler, Tomas" <tomas.winkler@intel.com>,
"Usyskin, Alexander" <alexander.usyskin@intel.com>,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>,
David Airlie <airlied@redhat.com>,
Daniel Vetter <daniel@ffwll.ch>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Lubart, Vitaly" <vitaly.lubart@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/gsc: Only initialize GSC in tile 0
Date: Mon, 21 Nov 2022 11:55:45 +0000 [thread overview]
Message-ID: <e33f417d-ae27-95df-d1dd-40e487efc674@linux.intel.com> (raw)
In-Reply-To: <MN2PR11MB4093DB849B8945C9618C4E88E50A9@MN2PR11MB4093.namprd11.prod.outlook.com>
On 21/11/2022 09:35, Winkler, Tomas wrote:
>>
>> From: José Roberto de Souza <jose.souza@intel.com>
>>
>> For multi-tile setups the GSC operational only on the tile 0.
>> Skip GSC auxiliary device creation for all other tiles in GSC device init code.
>> Initialize basic GSC fields and use the same path as HECI1 (HECI_PXP) device
>> disable.
>>
>> Cc: Tomas Winkler <tomas.winkler@intel.com>
>> Cc: Vitaly Lubart <vitaly.lubart@intel.com>
>> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
>
> Acked-by: Tomas Winkler <tomas.winkler@intel.com>
Feel free to upgrade to r-b so someone can merge it. :)
>> ---
>> V2: Move decision to skip initialization into GSC device init code.
>> This initializes basic GSC fields and uses the same path
>> as HECI1 (HECI_PXP) device disable.
>> It is simpler and protects interrupt handler too.
>>
>> drivers/gpu/drm/i915/gt/intel_gsc.c | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c
>> b/drivers/gpu/drm/i915/gt/intel_gsc.c
>> index 976fdf27e790..bcc3605158db 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gsc.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
>> @@ -174,6 +174,14 @@ static void gsc_init_one(struct drm_i915_private
>> *i915, struct intel_gsc *gsc,
>> intf->irq = -1;
>> intf->id = intf_id;
>>
>> + /*
>> + * On the multi-tile setups the GSC is functional on the first tile only
>> + */
>> + if (gsc_to_gt(gsc)->info.id != 0) {
>> + drm_dbg(&i915->drm, "Not initializing gsc for remote
>> tiles\n");
Is there any value of adding a log message for this? I don't immediately
see that it is worth it, but your call.
Regards,
Tvrtko
>> + return;
>> + }
>> +
>> if (intf_id == 0 && !HAS_HECI_PXP(i915))
>> return;
>>
>> --
>> 2.34.1
>
next prev parent reply other threads:[~2022-11-21 11:55 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-21 9:24 [Intel-gfx] [PATCH v2] drm/i915/gsc: Only initialize GSC in tile 0 Alexander Usyskin
2022-11-21 9:35 ` Winkler, Tomas
2022-11-21 11:55 ` Tvrtko Ursulin [this message]
2022-11-22 10:47 ` Winkler, Tomas
2022-11-21 12:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gsc: Only initialize GSC in tile 0 (rev2) Patchwork
2022-11-21 14:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-11-22 14:04 ` Souza, Jose
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