* [Intel-gfx] [V9 1/4] drm/i915/dsi: Add details about TE in get_config
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
@ 2020-09-09 8:50 ` Vandita Kulkarni
2020-09-15 11:38 ` Jani Nikula
2020-09-09 8:50 ` [Intel-gfx] [V9 2/4] i915/dsi: Configure TE interrupt for cmd mode Vandita Kulkarni
` (6 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Vandita Kulkarni @ 2020-09-09 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30 +++++++++++++++-----------
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index f4053dd6bde9..ee3c5c085cd3 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1447,6 +1447,18 @@ static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi)
return (val & DSI_PERIODIC_FRAME_UPDATE_ENABLE);
}
+static void gen11_dsi_get_cmd_mode_config(struct intel_dsi *intel_dsi,
+ struct intel_crtc_state *pipe_config)
+{
+ if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A)))
+ pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1 |
+ I915_MODE_FLAG_DSI_USE_TE0;
+ else if (intel_dsi->ports == BIT(PORT_B))
+ pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1;
+ else
+ pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE0;
+}
+
static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
@@ -1468,6 +1480,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
+ /* Get the details on which TE should be enabled */
+ if (is_cmd_mode(intel_dsi))
+ gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config);
+
if (gen11_dsi_is_periodic_cmd_mode(intel_dsi))
pipe_config->mode_flags |= I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE;
}
@@ -1562,18 +1578,8 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
* receive TE from the slave if
* dual link is enabled
*/
- if (is_cmd_mode(intel_dsi)) {
- if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A)))
- pipe_config->mode_flags |=
- I915_MODE_FLAG_DSI_USE_TE1 |
- I915_MODE_FLAG_DSI_USE_TE0;
- else if (intel_dsi->ports == BIT(PORT_B))
- pipe_config->mode_flags |=
- I915_MODE_FLAG_DSI_USE_TE1;
- else
- pipe_config->mode_flags |=
- I915_MODE_FLAG_DSI_USE_TE0;
- }
+ if (is_cmd_mode(intel_dsi))
+ gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config);
return 0;
}
--
2.21.0.5.gaeb582a
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [V9 1/4] drm/i915/dsi: Add details about TE in get_config
2020-09-09 8:50 ` [Intel-gfx] [V9 1/4] drm/i915/dsi: Add details about TE in get_config Vandita Kulkarni
@ 2020-09-15 11:38 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2020-09-15 11:38 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx
On Wed, 09 Sep 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> We need details about enabling TE on which port
> before we enable TE through vblank enable path.
> This is based on the configuration that we receive
> from the VBT wrt ports, dual_link.
>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 30 +++++++++++++++-----------
> 1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index f4053dd6bde9..ee3c5c085cd3 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1447,6 +1447,18 @@ static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi)
> return (val & DSI_PERIODIC_FRAME_UPDATE_ENABLE);
> }
>
> +static void gen11_dsi_get_cmd_mode_config(struct intel_dsi *intel_dsi,
> + struct intel_crtc_state *pipe_config)
> +{
> + if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A)))
> + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1 |
> + I915_MODE_FLAG_DSI_USE_TE0;
> + else if (intel_dsi->ports == BIT(PORT_B))
> + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1;
> + else
> + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE0;
> +}
> +
> static void gen11_dsi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config)
> {
> @@ -1468,6 +1480,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
> pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
> pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
>
> + /* Get the details on which TE should be enabled */
> + if (is_cmd_mode(intel_dsi))
> + gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config);
> +
> if (gen11_dsi_is_periodic_cmd_mode(intel_dsi))
> pipe_config->mode_flags |= I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE;
> }
> @@ -1562,18 +1578,8 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
> * receive TE from the slave if
> * dual link is enabled
> */
> - if (is_cmd_mode(intel_dsi)) {
> - if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A)))
> - pipe_config->mode_flags |=
> - I915_MODE_FLAG_DSI_USE_TE1 |
> - I915_MODE_FLAG_DSI_USE_TE0;
> - else if (intel_dsi->ports == BIT(PORT_B))
> - pipe_config->mode_flags |=
> - I915_MODE_FLAG_DSI_USE_TE1;
> - else
> - pipe_config->mode_flags |=
> - I915_MODE_FLAG_DSI_USE_TE0;
> - }
> + if (is_cmd_mode(intel_dsi))
> + gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config);
>
> return 0;
> }
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [V9 2/4] i915/dsi: Configure TE interrupt for cmd mode
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
2020-09-09 8:50 ` [Intel-gfx] [V9 1/4] drm/i915/dsi: Add details about TE in get_config Vandita Kulkarni
@ 2020-09-09 8:50 ` Vandita Kulkarni
2020-09-09 8:50 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
` (5 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Vandita Kulkarni @ 2020-09-09 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Configure TE interrupt as part of the vblank
enable call flow.
v2: Hide the private flags check inside configure_te (Jani)
v3: Fix the position of masking de_port_masked for DSI_TE.
v4: Simplify the caller of configure_te (Jani)
v5: Clear IIR, remove the usage of private_flags
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 51 +++++++++++++++++++++++++++++++--
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f113fe44572b..de540194ce67 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -40,6 +40,7 @@
#include "display/intel_hotplug.h"
#include "display/intel_lpe_audio.h"
#include "display/intel_psr.h"
+#include "display/intel_dsi.h"
#include "gt/intel_breadcrumbs.h"
#include "gt/intel_gt.h"
@@ -2692,12 +2693,47 @@ int ilk_enable_vblank(struct drm_crtc *crtc)
return 0;
}
+static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
+ bool enable)
+{
+ struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+ enum port port;
+ u32 tmp;
+
+ if (!(intel_crtc->mode_flags &
+ (I915_MODE_FLAG_DSI_USE_TE1 | I915_MODE_FLAG_DSI_USE_TE0)))
+ return false;
+
+ /* for dual link cases we consider TE from slave */
+ if (intel_crtc->mode_flags & I915_MODE_FLAG_DSI_USE_TE1)
+ port = PORT_B;
+ else
+ port = PORT_A;
+
+ tmp = I915_READ(DSI_INTR_MASK_REG(port));
+ if (enable)
+ tmp &= ~DSI_TE_EVENT;
+ else
+ tmp |= DSI_TE_EVENT;
+
+ I915_WRITE(DSI_INTR_MASK_REG(port), tmp);
+
+ tmp = I915_READ(DSI_INTR_IDENT_REG(port));
+ I915_WRITE(DSI_INTR_IDENT_REG(port), tmp);
+
+ return true;
+}
+
int bdw_enable_vblank(struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- enum pipe pipe = to_intel_crtc(crtc)->pipe;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ enum pipe pipe = intel_crtc->pipe;
unsigned long irqflags;
+ if (gen11_dsi_configure_te(intel_crtc, true))
+ return 0;
+
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -2763,9 +2799,13 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
void bdw_disable_vblank(struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- enum pipe pipe = to_intel_crtc(crtc)->pipe;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ enum pipe pipe = intel_crtc->pipe;
unsigned long irqflags;
+ if (gen11_dsi_configure_te(intel_crtc, false))
+ return;
+
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -3456,6 +3496,13 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
if (IS_GEN9_LP(dev_priv))
de_port_masked |= BXT_DE_PORT_GMBUS;
+ if (INTEL_GEN(dev_priv) >= 11) {
+ enum port port;
+
+ if (intel_bios_is_dsi_present(dev_priv, &port))
+ de_port_masked |= DSI0_TE | DSI1_TE;
+ }
+
de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
GEN8_PIPE_FIFO_UNDERRUN;
--
2.21.0.5.gaeb582a
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi cmd mode.
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
2020-09-09 8:50 ` [Intel-gfx] [V9 1/4] drm/i915/dsi: Add details about TE in get_config Vandita Kulkarni
2020-09-09 8:50 ` [Intel-gfx] [V9 2/4] i915/dsi: Configure TE interrupt for cmd mode Vandita Kulkarni
@ 2020-09-09 8:50 ` Vandita Kulkarni
2020-09-09 12:30 ` kernel test robot
` (2 more replies)
2020-09-09 8:50 ` [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in " Vandita Kulkarni
` (4 subsequent siblings)
7 siblings, 3 replies; 15+ messages in thread
From: Vandita Kulkarni @ 2020-09-09 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
In case of dual link, we get the TE on slave.
So clear the TE on slave DSI IIR.
If we are operating in TE_GATE mode, after we do
a frame update, the transcoder will send the frame data
to the panel, after it receives a TE. Whereas if we
are operating in NO_GATE mode then the transcoder will
immediately send the frame data to the panel.
We are not dealing with the periodic command mode here.
v2: Pass only relevant masked bits to the handler (Jani)
v3: Fix the check for cmd mode in TE handler function.
v4: Use intel_handle_vblank instead of drm_handle_vblank (Jani)
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 66 +++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index de540194ce67..f8398c5cbd4a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2299,6 +2299,64 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
drm_err(&dev_priv->drm, "Unexpected DE Misc interrupt\n");
}
+void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
+ u32 te_trigger)
+{
+ enum pipe pipe = INVALID_PIPE;
+ enum transcoder dsi_trans;
+ enum port port;
+ u32 val, tmp;
+
+ /*
+ * Incase of dual link, TE comes from DSI_1
+ * this is to check if dual link is enabled
+ */
+ val = I915_READ(TRANS_DDI_FUNC_CTL2(TRANSCODER_DSI_0));
+ val &= PORT_SYNC_MODE_ENABLE;
+
+ /*
+ * if dual link is enabled, then read DSI_0
+ * transcoder registers
+ */
+ port = ((te_trigger & DSI1_TE && val) || (te_trigger & DSI0_TE)) ?
+ PORT_A : PORT_B;
+ dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1;
+
+ /* Check if DSI configured in command mode */
+ val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans));
+ val = val & OP_MODE_MASK;
+
+ if ((val != CMD_MODE_NO_GATE) && (val != CMD_MODE_TE_GATE)) {
+ drm_err(&dev_priv->drm, "DSI trancoder not configured in command mode\n");
+ return;
+ }
+
+ /* Get PIPE for handling VBLANK event */
+ val = I915_READ(TRANS_DDI_FUNC_CTL(dsi_trans));
+ switch (val & TRANS_DDI_EDP_INPUT_MASK) {
+ case TRANS_DDI_EDP_INPUT_A_ON:
+ pipe = PIPE_A;
+ break;
+ case TRANS_DDI_EDP_INPUT_B_ONOFF:
+ pipe = PIPE_B;
+ break;
+ case TRANS_DDI_EDP_INPUT_C_ONOFF:
+ pipe = PIPE_C;
+ break;
+ default:
+ drm_err(&dev_priv->drm, "Invalid PIPE\n");
+ return;
+ }
+
+ intel_handle_vblank(dev_priv, pipe);
+
+ /* clear TE in dsi IIR */
+ port = (te_trigger & DSI1_TE) ? PORT_B : PORT_A;
+ tmp = I915_READ(DSI_INTR_IDENT_REG(port));
+ I915_WRITE(DSI_INTR_IDENT_REG(port), tmp);
+
+}
+
static irqreturn_t
gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
{
@@ -2363,6 +2421,14 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
found = true;
}
+ if (INTEL_GEN(dev_priv) >= 11) {
+ tmp_mask = iir & (DSI0_TE | DSI1_TE);
+ if (tmp_mask) {
+ gen11_dsi_te_interrupt_handler(dev_priv, tmp_mask);
+ found = true;
+ }
+ }
+
if (!found)
drm_err(&dev_priv->drm,
"Unexpected DE Port interrupt\n");
--
2.21.0.5.gaeb582a
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi cmd mode.
2020-09-09 8:50 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
@ 2020-09-09 12:30 ` kernel test robot
2020-09-09 12:30 ` [Intel-gfx] [RFC PATCH] drm/i915/dsi: gen11_dsi_te_interrupt_handler() can be static kernel test robot
2020-09-15 12:01 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi cmd mode Jani Nikula
2 siblings, 0 replies; 15+ messages in thread
From: kernel test robot @ 2020-09-09 12:30 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx; +Cc: jani.nikula, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3926 bytes --]
Hi Vandita,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on v5.9-rc4 next-20200908]
[cannot apply to drm-intel/for-linux-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Add-support-for-mipi-dsi-cmd-mode/20200909-165807
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-s002-20200909 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.2-191-g10164920-dirty
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/i915_irq.c:2302:6: warning: no previous prototype for 'gen11_dsi_te_interrupt_handler' [-Wmissing-prototypes]
2302 | void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/i915_irq.c:2302:6: sparse: sparse: symbol 'gen11_dsi_te_interrupt_handler' was not declared. Should it be static?
Please review and possibly fold the followup patch.
# https://github.com/0day-ci/linux/commit/3b071e8b378aa99a24cedbc6d3525a17f8e203e5
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Add-support-for-mipi-dsi-cmd-mode/20200909-165807
git checkout 3b071e8b378aa99a24cedbc6d3525a17f8e203e5
vim +/gen11_dsi_te_interrupt_handler +2302 drivers/gpu/drm/i915/i915_irq.c
2301
> 2302 void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
2303 u32 te_trigger)
2304 {
2305 enum pipe pipe = INVALID_PIPE;
2306 enum transcoder dsi_trans;
2307 enum port port;
2308 u32 val, tmp;
2309
2310 /*
2311 * Incase of dual link, TE comes from DSI_1
2312 * this is to check if dual link is enabled
2313 */
2314 val = I915_READ(TRANS_DDI_FUNC_CTL2(TRANSCODER_DSI_0));
2315 val &= PORT_SYNC_MODE_ENABLE;
2316
2317 /*
2318 * if dual link is enabled, then read DSI_0
2319 * transcoder registers
2320 */
2321 port = ((te_trigger & DSI1_TE && val) || (te_trigger & DSI0_TE)) ?
2322 PORT_A : PORT_B;
2323 dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1;
2324
2325 /* Check if DSI configured in command mode */
2326 val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans));
2327 val = val & OP_MODE_MASK;
2328
2329 if ((val != CMD_MODE_NO_GATE) && (val != CMD_MODE_TE_GATE)) {
2330 drm_err(&dev_priv->drm, "DSI trancoder not configured in command mode\n");
2331 return;
2332 }
2333
2334 /* Get PIPE for handling VBLANK event */
2335 val = I915_READ(TRANS_DDI_FUNC_CTL(dsi_trans));
2336 switch (val & TRANS_DDI_EDP_INPUT_MASK) {
2337 case TRANS_DDI_EDP_INPUT_A_ON:
2338 pipe = PIPE_A;
2339 break;
2340 case TRANS_DDI_EDP_INPUT_B_ONOFF:
2341 pipe = PIPE_B;
2342 break;
2343 case TRANS_DDI_EDP_INPUT_C_ONOFF:
2344 pipe = PIPE_C;
2345 break;
2346 default:
2347 drm_err(&dev_priv->drm, "Invalid PIPE\n");
2348 return;
2349 }
2350
2351 intel_handle_vblank(dev_priv, pipe);
2352
2353 /* clear TE in dsi IIR */
2354 port = (te_trigger & DSI1_TE) ? PORT_B : PORT_A;
2355 tmp = I915_READ(DSI_INTR_IDENT_REG(port));
2356 I915_WRITE(DSI_INTR_IDENT_REG(port), tmp);
2357
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 38704 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] [RFC PATCH] drm/i915/dsi: gen11_dsi_te_interrupt_handler() can be static
2020-09-09 8:50 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
2020-09-09 12:30 ` kernel test robot
@ 2020-09-09 12:30 ` kernel test robot
2020-09-15 12:01 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi cmd mode Jani Nikula
2 siblings, 0 replies; 15+ messages in thread
From: kernel test robot @ 2020-09-09 12:30 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx; +Cc: jani.nikula, kbuild-all
Signed-off-by: kernel test robot <lkp@intel.com>
---
i915_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f8398c5cbd4a60..3e150c9179f7ca 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2299,8 +2299,8 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
drm_err(&dev_priv->drm, "Unexpected DE Misc interrupt\n");
}
-void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
- u32 te_trigger)
+static void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
+ u32 te_trigger)
{
enum pipe pipe = INVALID_PIPE;
enum transcoder dsi_trans;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi cmd mode.
2020-09-09 8:50 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
2020-09-09 12:30 ` kernel test robot
2020-09-09 12:30 ` [Intel-gfx] [RFC PATCH] drm/i915/dsi: gen11_dsi_te_interrupt_handler() can be static kernel test robot
@ 2020-09-15 12:01 ` Jani Nikula
2 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2020-09-15 12:01 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx
On Wed, 09 Sep 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> In case of dual link, we get the TE on slave.
> So clear the TE on slave DSI IIR.
>
> If we are operating in TE_GATE mode, after we do
> a frame update, the transcoder will send the frame data
> to the panel, after it receives a TE. Whereas if we
> are operating in NO_GATE mode then the transcoder will
> immediately send the frame data to the panel.
> We are not dealing with the periodic command mode here.
>
> v2: Pass only relevant masked bits to the handler (Jani)
>
> v3: Fix the check for cmd mode in TE handler function.
>
> v4: Use intel_handle_vblank instead of drm_handle_vblank (Jani)
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 66 +++++++++++++++++++++++++++++++++
> 1 file changed, 66 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index de540194ce67..f8398c5cbd4a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2299,6 +2299,64 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
> drm_err(&dev_priv->drm, "Unexpected DE Misc interrupt\n");
> }
>
> +void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
Should be static.
Otherwise,
Acked-by: Jani Nikula <jani.nikula@intel.com>
> + u32 te_trigger)
> +{
> + enum pipe pipe = INVALID_PIPE;
> + enum transcoder dsi_trans;
> + enum port port;
> + u32 val, tmp;
> +
> + /*
> + * Incase of dual link, TE comes from DSI_1
> + * this is to check if dual link is enabled
> + */
> + val = I915_READ(TRANS_DDI_FUNC_CTL2(TRANSCODER_DSI_0));
> + val &= PORT_SYNC_MODE_ENABLE;
> +
> + /*
> + * if dual link is enabled, then read DSI_0
> + * transcoder registers
> + */
> + port = ((te_trigger & DSI1_TE && val) || (te_trigger & DSI0_TE)) ?
> + PORT_A : PORT_B;
> + dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1;
> +
> + /* Check if DSI configured in command mode */
> + val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans));
> + val = val & OP_MODE_MASK;
> +
> + if ((val != CMD_MODE_NO_GATE) && (val != CMD_MODE_TE_GATE)) {
> + drm_err(&dev_priv->drm, "DSI trancoder not configured in command mode\n");
> + return;
> + }
> +
> + /* Get PIPE for handling VBLANK event */
> + val = I915_READ(TRANS_DDI_FUNC_CTL(dsi_trans));
> + switch (val & TRANS_DDI_EDP_INPUT_MASK) {
> + case TRANS_DDI_EDP_INPUT_A_ON:
> + pipe = PIPE_A;
> + break;
> + case TRANS_DDI_EDP_INPUT_B_ONOFF:
> + pipe = PIPE_B;
> + break;
> + case TRANS_DDI_EDP_INPUT_C_ONOFF:
> + pipe = PIPE_C;
> + break;
> + default:
> + drm_err(&dev_priv->drm, "Invalid PIPE\n");
> + return;
> + }
> +
> + intel_handle_vblank(dev_priv, pipe);
> +
> + /* clear TE in dsi IIR */
> + port = (te_trigger & DSI1_TE) ? PORT_B : PORT_A;
> + tmp = I915_READ(DSI_INTR_IDENT_REG(port));
> + I915_WRITE(DSI_INTR_IDENT_REG(port), tmp);
> +
> +}
> +
> static irqreturn_t
> gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
> {
> @@ -2363,6 +2421,14 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
> found = true;
> }
>
> + if (INTEL_GEN(dev_priv) >= 11) {
> + tmp_mask = iir & (DSI0_TE | DSI1_TE);
> + if (tmp_mask) {
> + gen11_dsi_te_interrupt_handler(dev_priv, tmp_mask);
> + found = true;
> + }
> + }
> +
> if (!found)
> drm_err(&dev_priv->drm,
> "Unexpected DE Port interrupt\n");
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in cmd mode
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
` (2 preceding siblings ...)
2020-09-09 8:50 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
@ 2020-09-09 8:50 ` Vandita Kulkarni
2020-09-15 12:05 ` Jani Nikula
2020-09-09 9:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev9) Patchwork
` (3 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Vandita Kulkarni @ 2020-09-09 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
In TE Gate mode or TE NO_GATE mode on every flip
we need to set the frame update request bit.
After this bit is set transcoder hardware will
automatically send the frame data to the panel
in case of TE NO_GATE mode, where it sends after
it receives the TE event in case of TE_GATE mode.
Once the frame data is sent to the panel, we see
the frame counter updating.
v2: Use intel_de_read/write
v3: remove the usage of private_flags
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 26 ++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++
drivers/gpu/drm/i915/display/intel_dsi.h | 3 +++
3 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index ee3c5c085cd3..cdc9d8874945 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -205,6 +205,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host *host,
return 0;
}
+void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ u32 tmp, flags;
+ enum port port;
+
+ flags = crtc->mode_flags;
+
+ /*
+ * case 1 also covers dual link
+ * In case of dual link, frame update should be set on
+ * DSI_0
+ */
+ if (flags & I915_MODE_FLAG_DSI_USE_TE0)
+ port = PORT_A;
+ else if (flags & I915_MODE_FLAG_DSI_USE_TE1)
+ port = PORT_B;
+ else
+ return;
+
+ tmp = intel_de_read(dev_priv, DSI_CMD_FRMCTL(port));
+ tmp |= DSI_FRAME_UPDATE_REQUEST;
+ intel_de_write(dev_priv, DSI_CMD_FRMCTL(port), tmp);
+}
+
static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ec148a8da2c2..cd852c24d3bc 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15615,6 +15615,18 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_set_cdclk_post_plane_update(state);
}
+ /*
+ * Incase of mipi dsi command mode, we need to set frame update
+ * for every commit
+ */
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ if ((INTEL_GEN(dev_priv) >= 11) &&
+ (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))) {
+ if (new_crtc_state->hw.active)
+ gen11_dsi_frame_update(new_crtc_state);
+ }
+ }
+
/* FIXME: We should call drm_atomic_helper_commit_hw_done() here
* already, but still need the state for the delayed optimization. To
* fix this:
@@ -15626,6 +15638,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
*/
drm_atomic_helper_wait_for_flip_done(dev, &state->base);
+
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
if (new_crtc_state->hw.active &&
!needs_modeset(new_crtc_state) &&
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
index 19f78a4022d3..08f1f586eefb 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.h
+++ b/drivers/gpu/drm/i915/display/intel_dsi.h
@@ -205,6 +205,9 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
struct intel_crtc_state *config);
void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
+/* icl_dsi.c */
+void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state);
+
/* intel_dsi_vbt.c */
bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
--
2.21.0.5.gaeb582a
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in cmd mode
2020-09-09 8:50 ` [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in " Vandita Kulkarni
@ 2020-09-15 12:05 ` Jani Nikula
2020-09-15 12:28 ` Kulkarni, Vandita
0 siblings, 1 reply; 15+ messages in thread
From: Jani Nikula @ 2020-09-15 12:05 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx
On Wed, 09 Sep 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> In TE Gate mode or TE NO_GATE mode on every flip
> we need to set the frame update request bit.
> After this bit is set transcoder hardware will
> automatically send the frame data to the panel
> in case of TE NO_GATE mode, where it sends after
> it receives the TE event in case of TE_GATE mode.
> Once the frame data is sent to the panel, we see
> the frame counter updating.
>
> v2: Use intel_de_read/write
>
> v3: remove the usage of private_flags
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 26 ++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++
> drivers/gpu/drm/i915/display/intel_dsi.h | 3 +++
> 3 files changed, 42 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index ee3c5c085cd3..cdc9d8874945 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -205,6 +205,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host *host,
> return 0;
> }
>
> +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + u32 tmp, flags;
> + enum port port;
> +
> + flags = crtc->mode_flags;
> +
> + /*
> + * case 1 also covers dual link
> + * In case of dual link, frame update should be set on
> + * DSI_0
> + */
> + if (flags & I915_MODE_FLAG_DSI_USE_TE0)
> + port = PORT_A;
> + else if (flags & I915_MODE_FLAG_DSI_USE_TE1)
> + port = PORT_B;
> + else
> + return;
> +
> + tmp = intel_de_read(dev_priv, DSI_CMD_FRMCTL(port));
> + tmp |= DSI_FRAME_UPDATE_REQUEST;
> + intel_de_write(dev_priv, DSI_CMD_FRMCTL(port), tmp);
> +}
> +
> static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ec148a8da2c2..cd852c24d3bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15615,6 +15615,18 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> intel_set_cdclk_post_plane_update(state);
> }
>
> + /*
> + * Incase of mipi dsi command mode, we need to set frame update
> + * for every commit
> + */
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + if ((INTEL_GEN(dev_priv) >= 11) &&
> + (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))) {
Excessive parens.
> + if (new_crtc_state->hw.active)
> + gen11_dsi_frame_update(new_crtc_state);
> + }
> + }
> +
> /* FIXME: We should call drm_atomic_helper_commit_hw_done() here
> * already, but still need the state for the delayed optimization. To
> * fix this:
> @@ -15626,6 +15638,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> */
> drm_atomic_helper_wait_for_flip_done(dev, &state->base);
>
> +
Superfluous blank line.
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> if (new_crtc_state->hw.active &&
> !needs_modeset(new_crtc_state) &&
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
> index 19f78a4022d3..08f1f586eefb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> @@ -205,6 +205,9 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
> struct intel_crtc_state *config);
> void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
>
> +/* icl_dsi.c */
> +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state);
There's an icl_dsi.c section above. Maybe prefix the function icl_dsi
while at it; only the static functions in icl_dsi.c are gen11 prefixed
for historical reasons.
> +
> /* intel_dsi_vbt.c */
> bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
> void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in cmd mode
2020-09-15 12:05 ` Jani Nikula
@ 2020-09-15 12:28 ` Kulkarni, Vandita
0 siblings, 0 replies; 15+ messages in thread
From: Kulkarni, Vandita @ 2020-09-15 12:28 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Jani Nikula <jani.nikula@intel.com>
> Sent: Tuesday, September 15, 2020 5:36 PM
> To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: ville.syrjala@linux.intel.com; B S, Karthik <karthik.b.s@intel.com>;
> Kulkarni, Vandita <vandita.kulkarni@intel.com>
> Subject: Re: [V9 4/4] drm/i915/dsi: Initiate fame request in cmd mode
>
> On Wed, 09 Sep 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> > In TE Gate mode or TE NO_GATE mode on every flip we need to set the
> > frame update request bit.
> > After this bit is set transcoder hardware will automatically send the
> > frame data to the panel in case of TE NO_GATE mode, where it sends
> > after it receives the TE event in case of TE_GATE mode.
> > Once the frame data is sent to the panel, we see the frame counter
> > updating.
> >
> > v2: Use intel_de_read/write
> >
> > v3: remove the usage of private_flags
> >
> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/icl_dsi.c | 26 ++++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++
> > drivers/gpu/drm/i915/display/intel_dsi.h | 3 +++
> > 3 files changed, 42 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> > b/drivers/gpu/drm/i915/display/icl_dsi.c
> > index ee3c5c085cd3..cdc9d8874945 100644
> > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > @@ -205,6 +205,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host
> *host,
> > return 0;
> > }
> >
> > +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state) {
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > + u32 tmp, flags;
> > + enum port port;
> > +
> > + flags = crtc->mode_flags;
> > +
> > + /*
> > + * case 1 also covers dual link
> > + * In case of dual link, frame update should be set on
> > + * DSI_0
> > + */
> > + if (flags & I915_MODE_FLAG_DSI_USE_TE0)
> > + port = PORT_A;
> > + else if (flags & I915_MODE_FLAG_DSI_USE_TE1)
> > + port = PORT_B;
> > + else
> > + return;
> > +
> > + tmp = intel_de_read(dev_priv, DSI_CMD_FRMCTL(port));
> > + tmp |= DSI_FRAME_UPDATE_REQUEST;
> > + intel_de_write(dev_priv, DSI_CMD_FRMCTL(port), tmp); }
> > +
> > static void dsi_program_swing_and_deemphasis(struct intel_encoder
> > *encoder) {
> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> diff
> > --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index ec148a8da2c2..cd852c24d3bc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15615,6 +15615,18 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> > intel_set_cdclk_post_plane_update(state);
> > }
> >
> > + /*
> > + * Incase of mipi dsi command mode, we need to set frame update
> > + * for every commit
> > + */
> > + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> > + if ((INTEL_GEN(dev_priv) >= 11) &&
> > + (intel_crtc_has_type(new_crtc_state,
> INTEL_OUTPUT_DSI))) {
>
> Excessive parens.
>
> > + if (new_crtc_state->hw.active)
> > + gen11_dsi_frame_update(new_crtc_state);
> > + }
> > + }
> > +
> > /* FIXME: We should call drm_atomic_helper_commit_hw_done()
> here
> > * already, but still need the state for the delayed optimization. To
> > * fix this:
> > @@ -15626,6 +15638,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> > */
> > drm_atomic_helper_wait_for_flip_done(dev, &state->base);
> >
> > +
>
> Superfluous blank line.
>
> > for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> > if (new_crtc_state->hw.active &&
> > !needs_modeset(new_crtc_state) && diff --git
> > a/drivers/gpu/drm/i915/display/intel_dsi.h
> > b/drivers/gpu/drm/i915/display/intel_dsi.h
> > index 19f78a4022d3..08f1f586eefb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> > @@ -205,6 +205,9 @@ u32 bxt_dsi_get_pclk(struct intel_encoder
> *encoder,
> > struct intel_crtc_state *config); void
> > bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
> >
> > +/* icl_dsi.c */
> > +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state);
>
> There's an icl_dsi.c section above. Maybe prefix the function icl_dsi while at
> it; only the static functions in icl_dsi.c are gen11 prefixed for historical
> reasons.
>
Ok, will fix it. Thanks for the review.
-Vandita
> > +
> > /* intel_dsi_vbt.c */
> > bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
> > void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool
> > panel_is_on);
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev9)
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
` (3 preceding siblings ...)
2020-09-09 8:50 ` [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in " Vandita Kulkarni
@ 2020-09-09 9:26 ` Patchwork
2020-09-09 9:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-09-09 9:26 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev9)
URL : https://patchwork.freedesktop.org/series/69290/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5e85a0c24d65 drm/i915/dsi: Add details about TE in get_config
afc7ad4c92cd i915/dsi: Configure TE interrupt for cmd mode
4ef5ce3428d7 drm/i915/dsi: Add TE handler for dsi cmd mode.
-:59: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'val != CMD_MODE_NO_GATE'
#59: FILE: drivers/gpu/drm/i915/i915_irq.c:2329:
+ if ((val != CMD_MODE_NO_GATE) && (val != CMD_MODE_TE_GATE)) {
-:59: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'val != CMD_MODE_TE_GATE'
#59: FILE: drivers/gpu/drm/i915/i915_irq.c:2329:
+ if ((val != CMD_MODE_NO_GATE) && (val != CMD_MODE_TE_GATE)) {
-:88: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#88: FILE: drivers/gpu/drm/i915/i915_irq.c:2358:
+
+}
total: 0 errors, 0 warnings, 3 checks, 78 lines checked
bfde9ee264dc drm/i915/dsi: Initiate fame request in cmd mode
-:85: CHECK:LINE_SPACING: Please don't use multiple blank lines
#85: FILE: drivers/gpu/drm/i915/display/intel_display.c:15641:
+
total: 0 errors, 0 warnings, 1 checks, 66 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add support for mipi dsi cmd mode (rev9)
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
` (4 preceding siblings ...)
2020-09-09 9:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev9) Patchwork
@ 2020-09-09 9:26 ` Patchwork
2020-09-09 9:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-09 11:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-09-09 9:26 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev9)
URL : https://patchwork.freedesktop.org/series/69290/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/i915_irq.c:2302:6: warning: symbol 'gen11_dsi_te_interrupt_handler' was not declared. Should it be static?
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for Add support for mipi dsi cmd mode (rev9)
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
` (5 preceding siblings ...)
2020-09-09 9:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2020-09-09 9:46 ` Patchwork
2020-09-09 11:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-09-09 9:46 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 10000 bytes --]
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev9)
URL : https://patchwork.freedesktop.org/series/69290/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8989 -> Patchwork_18457
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/index.html
Known issues
------------
Here are the changes found in Patchwork_18457 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_gttfill@basic:
- fi-kbl-r: [PASS][1] -> [INCOMPLETE][2] ([i915#2439])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-kbl-r/igt@gem_exec_gttfill@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-kbl-r/igt@gem_exec_gttfill@basic.html
- fi-bdw-5557u: [PASS][3] -> [INCOMPLETE][4] ([i915#2439])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bdw-5557u/igt@gem_exec_gttfill@basic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bdw-5557u/igt@gem_exec_gttfill@basic.html
- fi-skl-6600u: [PASS][5] -> [INCOMPLETE][6] ([i915#2439])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-skl-6600u/igt@gem_exec_gttfill@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-skl-6600u/igt@gem_exec_gttfill@basic.html
- fi-byt-j1900: [PASS][7] -> [INCOMPLETE][8] ([i915#2439])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-byt-j1900/igt@gem_exec_gttfill@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-byt-j1900/igt@gem_exec_gttfill@basic.html
- fi-skl-lmem: [PASS][9] -> [INCOMPLETE][10] ([i915#2439])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-skl-lmem/igt@gem_exec_gttfill@basic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-skl-lmem/igt@gem_exec_gttfill@basic.html
- fi-ilk-650: [PASS][11] -> [INCOMPLETE][12] ([i915#2439])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-ilk-650/igt@gem_exec_gttfill@basic.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-ilk-650/igt@gem_exec_gttfill@basic.html
* igt@gem_exec_parallel@engines@basic:
- fi-bsw-n3050: [PASS][13] -> [INCOMPLETE][14] ([i915#2439])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bsw-n3050/igt@gem_exec_parallel@engines@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bsw-n3050/igt@gem_exec_parallel@engines@basic.html
* igt@gem_tiled_fence_blits@basic:
- fi-bsw-kefka: [PASS][15] -> [INCOMPLETE][16] ([i915#2439])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bsw-kefka/igt@gem_tiled_fence_blits@basic.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bsw-kefka/igt@gem_tiled_fence_blits@basic.html
* igt@i915_selftest@live@gem_execbuf:
- fi-snb-2520m: [PASS][17] -> [INCOMPLETE][18] ([i915#2440])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-snb-2520m/igt@i915_selftest@live@gem_execbuf.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-snb-2520m/igt@i915_selftest@live@gem_execbuf.html
- fi-pnv-d510: [PASS][19] -> [INCOMPLETE][20] ([i915#2440] / [i915#299])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-pnv-d510/igt@i915_selftest@live@gem_execbuf.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-pnv-d510/igt@i915_selftest@live@gem_execbuf.html
#### Possible fixes ####
* igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][21] ([i915#2417]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_gttfill@basic:
- fi-kbl-7500u: [INCOMPLETE][23] ([i915#2439]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-kbl-7500u/igt@gem_exec_gttfill@basic.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-kbl-7500u/igt@gem_exec_gttfill@basic.html
- fi-elk-e7500: [INCOMPLETE][25] ([i915#2439] / [i915#66]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-elk-e7500/igt@gem_exec_gttfill@basic.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-elk-e7500/igt@gem_exec_gttfill@basic.html
* igt@gem_exec_parallel@engines@basic:
- fi-bdw-gvtdvm: [INCOMPLETE][27] ([i915#2439]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bdw-gvtdvm/igt@gem_exec_parallel@engines@basic.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bdw-gvtdvm/igt@gem_exec_parallel@engines@basic.html
* igt@gem_tiled_fence_blits@basic:
- fi-gdg-551: [INCOMPLETE][29] ([i915#172] / [i915#2439]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-gdg-551/igt@gem_tiled_fence_blits@basic.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-gdg-551/igt@gem_tiled_fence_blits@basic.html
#### Warnings ####
* igt@runner@aborted:
- fi-bsw-kefka: [FAIL][31] ([i915#1436] / [i915#2109] / [i915#2439]) -> [FAIL][32] ([i915#2109] / [i915#2439])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bsw-kefka/igt@runner@aborted.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bsw-kefka/igt@runner@aborted.html
- fi-skl-6600u: [FAIL][33] ([i915#2398] / [i915#2439]) -> [FAIL][34] ([i915#1186] / [i915#2439])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-skl-6600u/igt@runner@aborted.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-skl-6600u/igt@runner@aborted.html
- fi-skl-lmem: [FAIL][35] ([i915#2398] / [i915#2439]) -> [FAIL][36] ([i915#1186] / [i915#2439])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-skl-lmem/igt@runner@aborted.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-skl-lmem/igt@runner@aborted.html
- fi-kbl-r: [FAIL][37] ([i915#2398] / [i915#2439]) -> [FAIL][38] ([i915#1186] / [i915#2439])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-kbl-r/igt@runner@aborted.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-kbl-r/igt@runner@aborted.html
- fi-bdw-5557u: [FAIL][39] ([i915#2439] / [i915#483]) -> [FAIL][40] ([i915#2439])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bdw-5557u/igt@runner@aborted.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bdw-5557u/igt@runner@aborted.html
- fi-kbl-7500u: [FAIL][41] ([i915#1186] / [i915#1784] / [i915#2439]) -> [FAIL][42] ([i915#1784] / [i915#2398] / [i915#2439])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-kbl-7500u/igt@runner@aborted.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-kbl-7500u/igt@runner@aborted.html
- fi-cml-s: [FAIL][43] ([i915#1186] / [i915#2439]) -> [FAIL][44] ([i915#1186] / [i915#2082] / [i915#2439])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-cml-s/igt@runner@aborted.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-cml-s/igt@runner@aborted.html
- fi-bsw-n3050: [FAIL][45] ([i915#1436] / [i915#2109] / [i915#2439]) -> [FAIL][46] ([i915#2439])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/fi-bsw-n3050/igt@runner@aborted.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/fi-bsw-n3050/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[i915#1186]: https://gitlab.freedesktop.org/drm/intel/issues/1186
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#172]: https://gitlab.freedesktop.org/drm/intel/issues/172
[i915#1784]: https://gitlab.freedesktop.org/drm/intel/issues/1784
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#2082]: https://gitlab.freedesktop.org/drm/intel/issues/2082
[i915#2109]: https://gitlab.freedesktop.org/drm/intel/issues/2109
[i915#2398]: https://gitlab.freedesktop.org/drm/intel/issues/2398
[i915#2417]: https://gitlab.freedesktop.org/drm/intel/issues/2417
[i915#2439]: https://gitlab.freedesktop.org/drm/intel/issues/2439
[i915#2440]: https://gitlab.freedesktop.org/drm/intel/issues/2440
[i915#299]: https://gitlab.freedesktop.org/drm/intel/issues/299
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#66]: https://gitlab.freedesktop.org/drm/intel/issues/66
Participating hosts (41 -> 34)
------------------------------
Missing (7): fi-hsw-4200u fi-tgl-u2 fi-byt-squawks fi-bsw-cyan fi-cfl-8109u fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8989 -> Patchwork_18457
CI-20190529: 20190529
CI_DRM_8989: f38d31de4aa327d89646ad8c49e2f5cc68d3916a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5779: f52bf19b5f02d52fc3e201c6467ec3f511227fba @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18457: bfde9ee264dc0577c38d47c3605188ac51a8b5b2 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bfde9ee264dc drm/i915/dsi: Initiate fame request in cmd mode
4ef5ce3428d7 drm/i915/dsi: Add TE handler for dsi cmd mode.
afc7ad4c92cd i915/dsi: Configure TE interrupt for cmd mode
5e85a0c24d65 drm/i915/dsi: Add details about TE in get_config
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/index.html
[-- Attachment #1.2: Type: text/html, Size: 13528 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for Add support for mipi dsi cmd mode (rev9)
2020-09-09 8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
` (6 preceding siblings ...)
2020-09-09 9:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-09-09 11:04 ` Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-09-09 11:04 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 26453 bytes --]
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev9)
URL : https://patchwork.freedesktop.org/series/69290/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8989_full -> Patchwork_18457_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_18457_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18457_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18457_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
Known issues
------------
Here are the changes found in Patchwork_18457_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_reloc@basic-cpu-gtt-active:
- shard-snb: [PASS][3] -> [INCOMPLETE][4] ([i915#2439] / [i915#82]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-snb4/igt@gem_exec_reloc@basic-cpu-gtt-active.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-snb1/igt@gem_exec_reloc@basic-cpu-gtt-active.html
* igt@gem_exec_reloc@basic-gtt-active:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#2439]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl10/igt@gem_exec_reloc@basic-gtt-active.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl10/igt@gem_exec_reloc@basic-gtt-active.html
- shard-apl: [PASS][7] -> [INCOMPLETE][8] ([i915#1635] / [i915#2439]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl3/igt@gem_exec_reloc@basic-gtt-active.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl6/igt@gem_exec_reloc@basic-gtt-active.html
* igt@gem_exec_reloc@basic-gtt-cpu-active:
- shard-skl: [PASS][9] -> [DMESG-FAIL][10] ([i915#2439])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl9/igt@gem_exec_reloc@basic-gtt-cpu-active.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl6/igt@gem_exec_reloc@basic-gtt-cpu-active.html
* igt@gem_exec_reloc@basic-wc-cpu-active:
- shard-kbl: [PASS][11] -> [INCOMPLETE][12] ([i915#2439])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-kbl3/igt@gem_exec_reloc@basic-wc-cpu-active.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-kbl7/igt@gem_exec_reloc@basic-wc-cpu-active.html
* igt@gem_exec_whisper@basic-queues-all:
- shard-glk: [PASS][13] -> [INCOMPLETE][14] ([i915#2439]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-glk4/igt@gem_exec_whisper@basic-queues-all.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-glk7/igt@gem_exec_whisper@basic-queues-all.html
- shard-iclb: [PASS][15] -> [INCOMPLETE][16] ([i915#2439])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-iclb6/igt@gem_exec_whisper@basic-queues-all.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-iclb5/igt@gem_exec_whisper@basic-queues-all.html
* igt@gem_exec_whisper@basic-queues-forked:
- shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([i915#2439]) +6 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-tglb8/igt@gem_exec_whisper@basic-queues-forked.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-tglb2/igt@gem_exec_whisper@basic-queues-forked.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][19] -> [DMESG-WARN][20] ([i915#1436] / [i915#716])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl8/igt@gen9_exec_parse@allowed-single.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl3/igt@gen9_exec_parse@allowed-single.html
* igt@kms_big_fb@linear-64bpp-rotate-0:
- shard-glk: [PASS][21] -> [DMESG-WARN][22] ([i915#1982])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-glk6/igt@kms_big_fb@linear-64bpp-rotate-0.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-glk6/igt@kms_big_fb@linear-64bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-skl: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +4 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl5/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl5/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-kbl2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
- shard-iclb: [PASS][27] -> [DMESG-WARN][28] ([i915#1982]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-farfromfence:
- shard-kbl: [PASS][29] -> [DMESG-WARN][30] ([i915#1982])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-farfromfence.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-farfromfence.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-tglb: [PASS][31] -> [DMESG-WARN][32] ([i915#1982])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-tglb7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu:
- shard-skl: [PASS][33] -> [FAIL][34] ([i915#49])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl8/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][35] -> [FAIL][36] ([fdo#108145] / [i915#265]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][37] -> [DMESG-FAIL][38] ([fdo#108145] / [i915#1982])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [PASS][39] -> [SKIP][40] ([fdo#109441]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-iclb2/igt@kms_psr@psr2_dpms.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-iclb1/igt@kms_psr@psr2_dpms.html
* igt@kms_vblank@pipe-b-query-forked-busy-hang:
- shard-apl: [PASS][41] -> [DMESG-WARN][42] ([i915#1635] / [i915#1982]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl7/igt@kms_vblank@pipe-b-query-forked-busy-hang.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl7/igt@kms_vblank@pipe-b-query-forked-busy-hang.html
#### Possible fixes ####
* igt@gem_exec_parallel@engines@basic:
- shard-skl: [INCOMPLETE][43] ([i915#2439]) -> [PASS][44] +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl6/igt@gem_exec_parallel@engines@basic.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl9/igt@gem_exec_parallel@engines@basic.html
* igt@gem_exec_reloc@basic-cpu-active:
- shard-apl: [INCOMPLETE][45] ([i915#1635] / [i915#2439]) -> [PASS][46] +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl7/igt@gem_exec_reloc@basic-cpu-active.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl2/igt@gem_exec_reloc@basic-cpu-active.html
- shard-skl: [INCOMPLETE][47] ([i915#198] / [i915#2439]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl10/igt@gem_exec_reloc@basic-cpu-active.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl7/igt@gem_exec_reloc@basic-cpu-active.html
- shard-tglb: [INCOMPLETE][49] ([i915#2439]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-tglb5/igt@gem_exec_reloc@basic-cpu-active.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-tglb3/igt@gem_exec_reloc@basic-cpu-active.html
* igt@gem_exec_reloc@basic-gtt-wc-active:
- shard-skl: [DMESG-FAIL][51] ([i915#2439]) -> [PASS][52] +2 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl2/igt@gem_exec_reloc@basic-gtt-wc-active.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl1/igt@gem_exec_reloc@basic-gtt-wc-active.html
* igt@gem_exec_reloc@basic-spin@vcs0:
- shard-snb: [INCOMPLETE][53] ([i915#2439] / [i915#82]) -> [PASS][54] +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-snb5/igt@gem_exec_reloc@basic-spin@vcs0.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-snb6/igt@gem_exec_reloc@basic-spin@vcs0.html
* igt@gem_exec_reloc@basic-wc-gtt-active:
- shard-iclb: [INCOMPLETE][55] ([i915#2439]) -> [PASS][56] +3 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-iclb2/igt@gem_exec_reloc@basic-wc-gtt-active.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-iclb8/igt@gem_exec_reloc@basic-wc-gtt-active.html
* igt@gem_exec_schedule@deep@rcs0:
- shard-glk: [INCOMPLETE][57] ([i915#2439]) -> [PASS][58] +4 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-glk6/igt@gem_exec_schedule@deep@rcs0.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-glk9/igt@gem_exec_schedule@deep@rcs0.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [DMESG-WARN][59] ([i915#180]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-kbl1/igt@gem_exec_suspend@basic-s3.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-kbl7/igt@gem_exec_suspend@basic-s3.html
* igt@gem_exec_whisper@basic-contexts-priority-all:
- shard-skl: [DMESG-WARN][61] ([i915#1982]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl5/igt@gem_exec_whisper@basic-contexts-priority-all.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl10/igt@gem_exec_whisper@basic-contexts-priority-all.html
* igt@gem_exec_whisper@basic-queues-all:
- shard-kbl: [INCOMPLETE][63] ([i915#2439]) -> [PASS][64] +4 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-kbl7/igt@gem_exec_whisper@basic-queues-all.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-kbl3/igt@gem_exec_whisper@basic-queues-all.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-skl: [TIMEOUT][65] ([i915#1958] / [i915#2424]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl2/igt@gem_userptr_blits@sync-unmap-cycles.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl1/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- shard-kbl: [DMESG-WARN][67] ([i915#1982]) -> [PASS][68] +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-kbl3/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-kbl6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-xtiled:
- shard-snb: [SKIP][69] ([fdo#109271]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-snb6/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-xtiled.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-snb2/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-xtiled.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
- shard-skl: [INCOMPLETE][71] ([i915#198]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl5/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl5/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt:
- shard-tglb: [DMESG-WARN][73] ([i915#1982]) -> [PASS][74] +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-skl: [INCOMPLETE][75] ([i915#648]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl10/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-iclb: [SKIP][77] ([fdo#109441]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-iclb8/igt@kms_psr@psr2_sprite_plane_onoff.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@sysfs_heartbeat_interval@mixed@vcs0:
- shard-skl: [FAIL][79] ([i915#1731]) -> [PASS][80] +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl6/igt@sysfs_heartbeat_interval@mixed@vcs0.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl9/igt@sysfs_heartbeat_interval@mixed@vcs0.html
#### Warnings ####
* igt@kms_content_protection@srm:
- shard-apl: [TIMEOUT][81] ([i915#1319] / [i915#1635] / [i915#1958]) -> [FAIL][82] ([fdo#110321] / [i915#1635])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl3/igt@kms_content_protection@srm.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl8/igt@kms_content_protection@srm.html
* igt@runner@aborted:
- shard-apl: ([FAIL][83], [FAIL][84], [FAIL][85], [FAIL][86], [FAIL][87], [FAIL][88], [FAIL][89], [FAIL][90], [FAIL][91], [FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99], [FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103]) ([i915#1610] / [i915#1611] / [i915#1635] / [i915#2263] / [i915#2398] / [i915#2439] / [i915#337] / [i915#637]) -> ([FAIL][104], [FAIL][105], [FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110], [FAIL][111], [FAIL][112], [FAIL][113], [FAIL][114], [FAIL][115], [FAIL][116], [FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120], [FAIL][121], [FAIL][122]) ([i915#1610] / [i915#1611] / [i915#1635] / [i915#2263] / [i915#2398] / [i915#2439] / [i915#337])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl4/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl7/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl1/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl3/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl4/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl8/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl6/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl2/igt@runner@aborted.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl6/igt@runner@aborted.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl2/igt@runner@aborted.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl8/igt@runner@aborted.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl1/igt@runner@aborted.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl8/igt@runner@aborted.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl7/igt@runner@aborted.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl3/igt@runner@aborted.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl4/igt@runner@aborted.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl3/igt@runner@aborted.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl7/igt@runner@aborted.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl2/igt@runner@aborted.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl1/igt@runner@aborted.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-apl6/igt@runner@aborted.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl2/igt@runner@aborted.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl3/igt@runner@aborted.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl4/igt@runner@aborted.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl7/igt@runner@aborted.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl3/igt@runner@aborted.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl3/igt@runner@aborted.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl3/igt@runner@aborted.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl6/igt@runner@aborted.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl3/igt@runner@aborted.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl7/igt@runner@aborted.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl4/igt@runner@aborted.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl2/igt@runner@aborted.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl4/igt@runner@aborted.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl8/igt@runner@aborted.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl6/igt@runner@aborted.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl1/igt@runner@aborted.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl1/igt@runner@aborted.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl1/igt@runner@aborted.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-apl1/igt@runner@aborted.html
- shard-skl: ([FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134]) ([i915#1611] / [i915#2263] / [i915#2398] / [i915#2439]) -> ([FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146]) ([i915#1436] / [i915#1611] / [i915#2263] / [i915#2439])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl9/igt@runner@aborted.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl2/igt@runner@aborted.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl3/igt@runner@aborted.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl10/igt@runner@aborted.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl4/igt@runner@aborted.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl10/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl8/igt@runner@aborted.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl7/igt@runner@aborted.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl4/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl6/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl6/igt@runner@aborted.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8989/shard-skl1/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl7/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl3/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl5/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl1/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl9/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl5/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl4/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl10/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl2/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl7/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl6/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/shard-skl10/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2263]: https://gitlab.freedesktop.org/drm/intel/issues/2263
[i915#2398]: https://gitlab.freedesktop.org/drm/intel/issues/2398
[i915#2424]: https://gitlab.freedesktop.org/drm/intel/issues/2424
[i915#2439]: https://gitlab.freedesktop.org/drm/intel/issues/2439
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#337]: https://gitlab.freedesktop.org/drm/intel/issues/337
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#637]: https://gitlab.freedesktop.org/drm/intel/issues/637
[i915#648]: https://gitlab.freedesktop.org/drm/intel/issues/648
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
Participating hosts (12 -> 11)
------------------------------
Missing (1): pig-snb-2600
Build changes
-------------
* Linux: CI_DRM_8989 -> Patchwork_18457
CI-20190529: 20190529
CI_DRM_8989: f38d31de4aa327d89646ad8c49e2f5cc68d3916a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5779: f52bf19b5f02d52fc3e201c6467ec3f511227fba @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18457: bfde9ee264dc0577c38d47c3605188ac51a8b5b2 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18457/index.html
[-- Attachment #1.2: Type: text/html, Size: 31692 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread