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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/14] drm/i915: Rework watermark readout to use plane api
Date: Thu, 24 Oct 2019 17:16:07 +0200	[thread overview]
Message-ID: <f96b864c-76e7-72ee-7e22-44655f275f65@linux.intel.com> (raw)
In-Reply-To: <20191024143328.GC1208@intel.com>

Op 24-10-2019 om 16:33 schreef Ville Syrjälä:
> On Thu, Oct 24, 2019 at 02:47:52PM +0200, Maarten Lankhorst wrote:
>> Instead of unconditionally verifying the cursor plane, handle it in the
>> same way as any other plane, and use our existing api to verify.
>>
>> While at it, ensure that on gen9+ we verify active_planes mask as well.
>> This should give the correct results for planar YUV planes too, as we
>> update active_planes for them.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display.c | 83 ++++++--------------
>>  1 file changed, 23 insertions(+), 60 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 579655675b08..4e4273c4ae57 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -13183,7 +13183,8 @@ static void verify_wm_state(struct intel_crtc *crtc,
>>  	struct skl_pipe_wm *sw_wm;
>>  	struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
>>  	const enum pipe pipe = crtc->pipe;
>> -	int plane, level, max_level = ilk_wm_max_level(dev_priv);
>> +	int level, max_level = ilk_wm_max_level(dev_priv);
>> +	struct intel_plane *plane;
>>  
>>  	if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->base.active)
>>  		return;
>> @@ -13207,63 +13208,25 @@ static void verify_wm_state(struct intel_crtc *crtc,
>>  			  hw->ddb.enabled_slices);
>>  
>>  	/* planes */
>> -	for_each_universal_plane(dev_priv, pipe, plane) {
>> +	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
>>  		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
>> +		enum pipe plane_pipe = pipe;
>>  
>> -		hw_plane_wm = &hw->wm.planes[plane];
>> -		sw_plane_wm = &sw_wm->planes[plane];
>> -
>> -		/* Watermarks */
>> -		for (level = 0; level <= max_level; level++) {
>> -			if (skl_wm_level_equals(&hw_plane_wm->wm[level],
>> -						&sw_plane_wm->wm[level]))
>> -				continue;
>> -
>> -			DRM_ERROR("mismatch in WM pipe %c plane %d level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
>> -				  pipe_name(pipe), plane + 1, level,
>> -				  sw_plane_wm->wm[level].plane_en,
>> -				  sw_plane_wm->wm[level].plane_res_b,
>> -				  sw_plane_wm->wm[level].plane_res_l,
>> -				  hw_plane_wm->wm[level].plane_en,
>> -				  hw_plane_wm->wm[level].plane_res_b,
>> -				  hw_plane_wm->wm[level].plane_res_l);
>> -		}
>> +		hw_plane_wm = &hw->wm.planes[plane->id];
>> +		sw_plane_wm = &sw_wm->planes[plane->id];
>>  
>> -		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
>> -					 &sw_plane_wm->trans_wm)) {
>> -			DRM_ERROR("mismatch in trans WM pipe %c plane %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
>> -				  pipe_name(pipe), plane + 1,
>> -				  sw_plane_wm->trans_wm.plane_en,
>> -				  sw_plane_wm->trans_wm.plane_res_b,
>> -				  sw_plane_wm->trans_wm.plane_res_l,
>> -				  hw_plane_wm->trans_wm.plane_en,
>> -				  hw_plane_wm->trans_wm.plane_res_b,
>> -				  hw_plane_wm->trans_wm.plane_res_l);
>> -		}
>> -
>> -		/* DDB */
>> -		hw_ddb_entry = &hw->ddb_y[plane];
>> -		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane];
>> -
>> -		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
>> -			DRM_ERROR("mismatch in DDB state pipe %c plane %d (expected (%u,%u), found (%u,%u))\n",
>> -				  pipe_name(pipe), plane + 1,
>> -				  sw_ddb_entry->start, sw_ddb_entry->end,
>> -				  hw_ddb_entry->start, hw_ddb_entry->end);
>> +		if (!plane->get_hw_state(plane, &plane_pipe)) {
>> +			WARN(new_crtc_state->active_planes & BIT(plane->id),
>> +			     "pipe %c %s should be visible, but isn't\n",
>> +			     pipe_name(pipe), plane->base.name);
>> +			continue;
>>  		}
> As mentioned the idea was to make sure we validate this stuff even for
> disabled planes. A bit of paranoia is good since ddb overlaps can be
> so dangerous. So I don't want such a check in this function.
Yeah should be ok.
>
>> -	}
>>  
>> -	/*
>> -	 * cursor
>> -	 * If the cursor plane isn't active, we may not have updated it's ddb
>> -	 * allocation. In that case since the ddb allocation will be updated
>> -	 * once the plane becomes visible, we can skip this check
>> -	 */
>> -	if (1) {
>> -		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
>> +		WARN_ON(plane_pipe != pipe);
>>  
>> -		hw_plane_wm = &hw->wm.planes[PLANE_CURSOR];
>> -		sw_plane_wm = &sw_wm->planes[PLANE_CURSOR];
>> +		WARN(!(new_crtc_state->active_planes & BIT(plane->id)),
>> +		     "pipe %c %s should be invisible, but visible.\n",
>> +		     pipe_name(pipe), plane->base.name);
> Still the wrong place for it.


Derp, blindly resent the patch. :(

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WARNING: multiple messages have this Message-ID (diff)
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 01/14] drm/i915: Rework watermark readout to use plane api
Date: Thu, 24 Oct 2019 17:16:07 +0200	[thread overview]
Message-ID: <f96b864c-76e7-72ee-7e22-44655f275f65@linux.intel.com> (raw)
Message-ID: <20191024151607.UE4SHhC-xoDp6_zAYb9cWtCF_-xk7Eg8RgUlFoXFe1I@z> (raw)
In-Reply-To: <20191024143328.GC1208@intel.com>

Op 24-10-2019 om 16:33 schreef Ville Syrjälä:
> On Thu, Oct 24, 2019 at 02:47:52PM +0200, Maarten Lankhorst wrote:
>> Instead of unconditionally verifying the cursor plane, handle it in the
>> same way as any other plane, and use our existing api to verify.
>>
>> While at it, ensure that on gen9+ we verify active_planes mask as well.
>> This should give the correct results for planar YUV planes too, as we
>> update active_planes for them.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display.c | 83 ++++++--------------
>>  1 file changed, 23 insertions(+), 60 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 579655675b08..4e4273c4ae57 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -13183,7 +13183,8 @@ static void verify_wm_state(struct intel_crtc *crtc,
>>  	struct skl_pipe_wm *sw_wm;
>>  	struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
>>  	const enum pipe pipe = crtc->pipe;
>> -	int plane, level, max_level = ilk_wm_max_level(dev_priv);
>> +	int level, max_level = ilk_wm_max_level(dev_priv);
>> +	struct intel_plane *plane;
>>  
>>  	if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->base.active)
>>  		return;
>> @@ -13207,63 +13208,25 @@ static void verify_wm_state(struct intel_crtc *crtc,
>>  			  hw->ddb.enabled_slices);
>>  
>>  	/* planes */
>> -	for_each_universal_plane(dev_priv, pipe, plane) {
>> +	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
>>  		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
>> +		enum pipe plane_pipe = pipe;
>>  
>> -		hw_plane_wm = &hw->wm.planes[plane];
>> -		sw_plane_wm = &sw_wm->planes[plane];
>> -
>> -		/* Watermarks */
>> -		for (level = 0; level <= max_level; level++) {
>> -			if (skl_wm_level_equals(&hw_plane_wm->wm[level],
>> -						&sw_plane_wm->wm[level]))
>> -				continue;
>> -
>> -			DRM_ERROR("mismatch in WM pipe %c plane %d level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
>> -				  pipe_name(pipe), plane + 1, level,
>> -				  sw_plane_wm->wm[level].plane_en,
>> -				  sw_plane_wm->wm[level].plane_res_b,
>> -				  sw_plane_wm->wm[level].plane_res_l,
>> -				  hw_plane_wm->wm[level].plane_en,
>> -				  hw_plane_wm->wm[level].plane_res_b,
>> -				  hw_plane_wm->wm[level].plane_res_l);
>> -		}
>> +		hw_plane_wm = &hw->wm.planes[plane->id];
>> +		sw_plane_wm = &sw_wm->planes[plane->id];
>>  
>> -		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
>> -					 &sw_plane_wm->trans_wm)) {
>> -			DRM_ERROR("mismatch in trans WM pipe %c plane %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
>> -				  pipe_name(pipe), plane + 1,
>> -				  sw_plane_wm->trans_wm.plane_en,
>> -				  sw_plane_wm->trans_wm.plane_res_b,
>> -				  sw_plane_wm->trans_wm.plane_res_l,
>> -				  hw_plane_wm->trans_wm.plane_en,
>> -				  hw_plane_wm->trans_wm.plane_res_b,
>> -				  hw_plane_wm->trans_wm.plane_res_l);
>> -		}
>> -
>> -		/* DDB */
>> -		hw_ddb_entry = &hw->ddb_y[plane];
>> -		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane];
>> -
>> -		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
>> -			DRM_ERROR("mismatch in DDB state pipe %c plane %d (expected (%u,%u), found (%u,%u))\n",
>> -				  pipe_name(pipe), plane + 1,
>> -				  sw_ddb_entry->start, sw_ddb_entry->end,
>> -				  hw_ddb_entry->start, hw_ddb_entry->end);
>> +		if (!plane->get_hw_state(plane, &plane_pipe)) {
>> +			WARN(new_crtc_state->active_planes & BIT(plane->id),
>> +			     "pipe %c %s should be visible, but isn't\n",
>> +			     pipe_name(pipe), plane->base.name);
>> +			continue;
>>  		}
> As mentioned the idea was to make sure we validate this stuff even for
> disabled planes. A bit of paranoia is good since ddb overlaps can be
> so dangerous. So I don't want such a check in this function.
Yeah should be ok.
>
>> -	}
>>  
>> -	/*
>> -	 * cursor
>> -	 * If the cursor plane isn't active, we may not have updated it's ddb
>> -	 * allocation. In that case since the ddb allocation will be updated
>> -	 * once the plane becomes visible, we can skip this check
>> -	 */
>> -	if (1) {
>> -		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
>> +		WARN_ON(plane_pipe != pipe);
>>  
>> -		hw_plane_wm = &hw->wm.planes[PLANE_CURSOR];
>> -		sw_plane_wm = &sw_wm->planes[PLANE_CURSOR];
>> +		WARN(!(new_crtc_state->active_planes & BIT(plane->id)),
>> +		     "pipe %c %s should be invisible, but visible.\n",
>> +		     pipe_name(pipe), plane->base.name);
> Still the wrong place for it.


Derp, blindly resent the patch. :(

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  parent reply	other threads:[~2019-10-24 15:16 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24 12:47 [PATCH 01/14] drm/i915: Rework watermark readout to use plane api Maarten Lankhorst
2019-10-24 12:47 ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 02/14] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2 Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 03/14] drm/i915: Handle a few more cases for crtc hw/uapi split, v3 Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 04/14] drm/i915: Add aliases for uapi and hw to crtc_state Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 05/14] drm/i915: Perform manual conversions for crtc uapi/hw split, v2 Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 06/14] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 07/14] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:47 ` [PATCH 08/14] drm/i915: Complete crtc hw/uapi split, v3 Maarten Lankhorst
2019-10-24 12:47   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 15:21   ` Ville Syrjälä
2019-10-24 15:21     ` [Intel-gfx] " Ville Syrjälä
2019-10-25  9:00     ` Maarten Lankhorst
2019-10-25  9:00       ` [Intel-gfx] " Maarten Lankhorst
2019-10-25 10:13       ` Ville Syrjälä
2019-10-25 10:13         ` [Intel-gfx] " Ville Syrjälä
2019-10-28  9:20         ` Maarten Lankhorst
2019-10-28  9:20           ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:48 ` [PATCH 09/14] drm/i915: Add aliases for uapi and hw to plane_state Maarten Lankhorst
2019-10-24 12:48   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:48 ` [PATCH 10/14] drm/i915: Perform manual conversions for plane uapi/hw split Maarten Lankhorst
2019-10-24 12:48   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:48 ` [PATCH 11/14] drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw Maarten Lankhorst
2019-10-24 12:48   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:48 ` [PATCH 12/14] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi Maarten Lankhorst
2019-10-24 12:48   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:48 ` [PATCH 13/14] drm/i915: Complete plane hw and uapi split, v2 Maarten Lankhorst
2019-10-24 12:48   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 12:48 ` [PATCH 14/14] drm/i915: Remove special case slave handling during hw programming, v3 Maarten Lankhorst
2019-10-24 12:48   ` [Intel-gfx] " Maarten Lankhorst
2019-10-24 14:33 ` [PATCH 01/14] drm/i915: Rework watermark readout to use plane api Ville Syrjälä
2019-10-24 14:33   ` [Intel-gfx] " Ville Syrjälä
2019-10-24 15:16   ` Maarten Lankhorst [this message]
2019-10-24 15:16     ` Maarten Lankhorst
2019-10-24 18:26 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] " Patchwork
2019-10-24 18:26   ` [Intel-gfx] " Patchwork
2019-10-24 19:00 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-24 19:00   ` [Intel-gfx] " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2019-10-17 13:20 [PATCH 01/14] " Maarten Lankhorst
2019-10-17 13:37 ` Ville Syrjälä
2019-10-17 14:11   ` Maarten Lankhorst

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