Re: [PATCH v2 27/56] drm/i915/hdmi_frl_dfm_regs: Define DFM registers

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] drm/i915: Typo in TB_MIN_THESHOLD macro names
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commit 630f464ba2dd2b53e20d33d3caf2861bb55f1fa9
Author: Vandita Kulkarni <vandita.kulkarni@intel.com>

drm/i915/hdmi_frl_dfm_regs: Define DFM registers

This commit adds definitions for HDMI FRL dataflow metering registers to
handle DFM values.

> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi_frl_dfm_regs.h b/drivers/gpu/drm/i915/display/intel_hdmi_frl_dfm_regs.h
> new file mode 100644
> index 0000000000000..bb5cb76b3806b
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi_frl_dfm_regs.h

[ ... ]

> +#define _TRANS_HDMI_FRL_DFMTHRSH_A			0x600c4
> +#define TRANS_HDMI_FRL_DFMTHRSH(dev_priv, trans)	_MMIO_TRANS2(dev_priv, \
> +								     trans, \
> +								     _TRANS_HDMI_FRL_DFMTHRSH_A)
> +#define  RUN_LEN_THRESHOLD_MASK				REG_GENMASK(31, 24)
> +#define  RUN_LEN_THRESHOLD(val)				REG_FIELD_PREP(RUN_LEN_THRESHOLD_MASK, val)
> +#define  TB_MAX_THRESHOLD_MASK				REG_GENMASK(21, 12)
> +#define  TB_MAX_THRESHOLD(val)				REG_FIELD_PREP(TB_MAX_THRESHOLD_MASK, val)
> +#define  TB_MIN_THESHOLD_MASK				REG_GENMASK(9, 0)
> +#define  TB_MIN_THESHOLD(val)				REG_FIELD_PREP(TB_MIN_THESHOLD_MASK, val)

[Severity: Low]
This isn't a bug, but there appears to be a typo in the names of these
minimum threshold macros where THRESHOLD is spelled as THESHOLD. Could
these be updated to include the missing R for consistency with the
TB_MAX_THRESHOLD macros defined just above?

> +
> +#endif /* __INTEL_HDMI_FRL_DFM_REGS_H__ */

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Sashiko AI review · https://sashiko.dev/#/patchset/20261012035806.3361439-1-ankit.k.nautiyal@intel.com?part=27