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From: sashiko-bot@kernel.org
To: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 20/56] drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state
Date: Mon, 12 Oct 2026 04:40:00 +0000	[thread overview]
Message-ID: <sashiko-outbox-167618@kernel.org> (raw)
In-Reply-To: <20261012035806.3361439-21-ankit.k.nautiyal@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/i915/ltphy: Valid TMDS modes with FRL-like clocks get misidentified as FRL
--

commit 24fcf65234b436b2c1d8a2379615e06c2dcf0888
Author: Suraj Kandpal <suraj.kandpal@intel.com>

drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state

This commit adds a safeguard in intel_lt_phy_pll_calc_state() to skip the
HDMI TMDS dynamic PLL calculation when an HDMI FRL mode is in use. It
determines this by checking if the port clock matches an FRL rate.

> drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state

This isn't a bug, but there is a typo (safegaurd) in the subject line.

> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index 61bad87eefec2..0e2ebd550bc5e 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -2042,7 +2042,8 @@ intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state,
>  		}
>  	}
>  
> -	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
> +	    !intel_hdmi_is_frl(crtc_state->port_clock)) {

[Severity: Medium]
Does this logic mistakenly prevent the TMDS dynamic calculation for 300MHz
and 600MHz TMDS modes?

Looking at intel_hdmi_is_frl(), it only checks if the numeric clock rate
matches one of the FRL rates:

drivers/gpu/drm/i915/display/intel_hdmi.c:intel_hdmi_is_frl() {
	static const u32 rates[] = { 300000, 600000, 800000, 1000000, 1200000 };
	...
	for (i = 0; i < ARRAY_SIZE(rates); i++)
		if (intel_dpll_clock_matches(clock, rates[i]))
			return true;

	return false;
}

Since 300MHz and 600MHz can also be valid TMDS pixel clocks, a TMDS mode
with exactly these clock rates would cause intel_hdmi_is_frl() to return
true.

This would block the fallback intel_lt_phy_calculate_hdmi_state()
calculation for those valid TMDS modes.

Should this check verify the protocol state instead, for example by checking
if crtc_state->frl.enable is true?

>  		hw_state->ltpll.lane_count = crtc_state->lane_count;
>  		return intel_lt_phy_calculate_hdmi_state(&hw_state->ltpll,
>  							 crtc_state->port_clock);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012035806.3361439-1-ankit.k.nautiyal@intel.com?part=20

  reply	other threads:[~2026-10-12  4:40 UTC|newest]

Thread overview: 91+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-12  3:57 [PATCH v2 00/56] Enable HDMI FRL for MTL+ Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 01/56] drm/i915/hdmi: Parse FRL max link rate from VBT Ankit Nautiyal
2026-10-12  4:34   ` sashiko-bot
2026-10-12  8:01   ` Shankar, Uma
2026-10-12  8:10     ` Shankar, Uma
2026-10-12  3:57 ` [PATCH v2 02/56] drm/i915/hdmi: Add new data members for FRL configuration Ankit Nautiyal
2026-10-12  4:36   ` sashiko-bot
2026-10-12  8:35   ` Shankar, Uma
2026-10-12  3:57 ` [PATCH v2 03/56] drm/i915/hdmi: Add FRL link rate cap Ankit Nautiyal
2026-10-12  8:43   ` Shankar, Uma
2026-10-12  3:57 ` [PATCH v2 04/56] drm/drm_scdc_helper: Add SCDC helper funcs for FRL Ankit Nautiyal
2026-10-12  4:32   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 05/56] drm/i915/display: Add registers for HDMI FRL configuration Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 06/56] drm/i915/display: Add new members in crtc_state for " Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 07/56] drm/i915/intel_cx0_phy_regs: Add HDMI FRL SHIFT EN bit in PORT_BUF_CTL_1 Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 08/56] drm/i915/ddi: Update Transcoder/DDI registers with the frl bits Ankit Nautiyal
2026-10-12  4:35   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 09/56] drm/i915/hdmi: Enable Scrambling only for TMDS mode Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 10/56] drm/i915/ddi: Simplify intel_ddi_enable() Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 11/56] drm/i915/ddi: Factor out common transcoder/vblank enable sequence Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 12/56] drm/i915/ddi: Update HDMI modeset sequence for MTL+ Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 13/56] drm/i915/hdmi: Add function to prepare registers for FRL mode Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 14/56] drm/i915/hdmi: Add functions for FRL training state machine Ankit Nautiyal
2026-10-12  4:49   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 15/56] drm/i915/intel_hdmi: Add helper to disable FRL Ankit Nautiyal
2026-10-12  4:44   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 16/56] drm/i915/hdmi: Reduce FRL rate cap on rate change during training Ankit Nautiyal
2026-10-12  4:47   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 17/56] drm/i915/hdmi: Introduce intel_hdmi_frl_level() for per-lane TxFFE Ankit Nautiyal
2026-10-12  4:49   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 18/56] drm/i915/hdmi: Drive per-lane TxFFE during FRL link training Ankit Nautiyal
2026-10-12  4:34   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 19/56] drm/i915/ltphy: Add PLL tables for HDMI FRL Ankit Nautiyal
2026-10-12  4:26   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 20/56] drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state Ankit Nautiyal
2026-10-12  4:40   ` sashiko-bot [this message]
2026-10-12  3:57 ` [PATCH v2 21/56] drm/i915/ltphy: Calculate port clock for HDMI FRL Ankit Nautiyal
2026-10-12  4:35   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 22/56] drm/i915/ltphy: Verify HDMI FRL tables Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 23/56] drm/i915/ddi_buf: Add Vswing table for HDMI FRL Ankit Nautiyal
2026-10-12  4:33   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 24/56] drm/i915/hdmi: Add provision for FRL mode while computing output format Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 25/56] drm/i915/cx0: Add helper to check if the FRL rate is valid Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 26/56] drm/i915/lt_phy: " Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 27/56] drm/i915/hdmi_frl_dfm_regs: Define DFM registers Ankit Nautiyal
2026-10-12  4:35   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 28/56] drm/i915/hdmi_frl_dfm: Define frl_dfm structure Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 29/56] drm/i915/hdmi_frl_dfm: Add non dsc frl capacity computation helpers Ankit Nautiyal
2026-10-12  4:48   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 30/56] drm/i915/hdmi_frl_dfm: Add support for DFM calculation with DSC Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 31/56] drm/i915/hdmi: Add helper to write FRL CFG register Ankit Nautiyal
2026-10-12  4:33   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 32/56] drm/i915/hdmi_frl_dfm: Add helpers to read/write FRL DFM registers Ankit Nautiyal
2026-10-12  4:42   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 33/56] drm/i915/hdmi: Rename port clock limit to specify tmds clock Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 34/56] drm/i915/hdmi: Rename port clock valid " Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 35/56] drm/i915/hdmi: Rename mode " Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 36/56] drm/i915/hdmi: Validate FRL modes in mode_valid using the FRL DFM Ankit Nautiyal
2026-10-12  4:49   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 37/56] drm/i915/hdmi: Add FRL port clock valid Ankit Nautiyal
2026-10-12  4:56   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 38/56] drm/i915/hdmi: Add FRL clock computation based on DFM Ankit Nautiyal
2026-10-12  4:51   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 39/56] drm/i915/hdmi: Add support for sending uevent to user for FRL training failure Ankit Nautiyal
2026-10-12  4:49   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 40/56] drm/i915/ddi: Wire FRL into the HDMI DDI enable/disable path Ankit Nautiyal
2026-10-12  4:54   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 41/56] drm/i915/ltphy: Fix HDMI FRL per-lane TX mapping Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 42/56] drm/i915/hdmi: Add read out for FRL state Ankit Nautiyal
2026-10-12  4:51   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 43/56] drm/i915/hdmi: Compute FRL Link M/N Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 44/56] drm/i915/hdmi_frl_dfm: Write and read back " Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 45/56] drm/i915/hdmi: Use the real pixel clock as crtc_clock for FRL Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 46/56] drm/i915/display: Add FRL members to the state checker Ankit Nautiyal
2026-10-12  4:54   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 47/56] drm/i915/hdmi: Compute output format for HDMI FRL mode Ankit Nautiyal
2026-10-12  4:53   ` sashiko-bot
2026-10-12  3:57 ` [PATCH v2 48/56] drm/i915/hdmi: Add a helper to check non DSC audio support for HDMI FRL Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 49/56] drm/i915/audio: Add the mode pruning logic " Ankit Nautiyal
2026-10-12  3:57 ` [PATCH v2 50/56] drm/i915/hdmi: Enable FRL based mode clock valid Ankit Nautiyal
2026-10-12  4:58   ` sashiko-bot
2026-10-12  3:58 ` [PATCH v2 51/56] drm/i915/joiner: Prepare to move joiner helpers to a new file Ankit Nautiyal
2026-10-12  3:58 ` [PATCH v2 52/56] drm/i915/joiner: Move joiner candidate helpers to intel_joiner.c Ankit Nautiyal
2026-10-12  3:58 ` [PATCH v2 53/56] drm/i915/joiner: Move joiner pipe mask helper " Ankit Nautiyal
2026-10-12  4:51   ` sashiko-bot
2026-10-12  3:58 ` [PATCH v2 54/56] drm/i915/hdmi: Iterate through joiner candidates in compute_config path Ankit Nautiyal
2026-10-12  3:58 ` [PATCH v2 55/56] drm/i915/hdmi: Iterate through joiner candidates in mode_valid path Ankit Nautiyal
2026-10-12  4:53   ` sashiko-bot
2026-10-12  3:58 ` [PATCH v2 56/56] drm/i915/hdmi: Allow Pipe joiner for HDMI Ankit Nautiyal
2026-10-12  5:01   ` sashiko-bot
2026-10-12  5:39 ` ✓ i915.CI.BAT: success for Enable HDMI FRL for MTL+ (rev2) Patchwork

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