From: Keith Packard <keithp@keithp.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Kenneth Graunke <kenneth@whitecape.org>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Use PIPE_CONTROL for flushing on gen6+.
Date: Mon, 26 Sep 2011 13:15:00 -0700 [thread overview]
Message-ID: <yunlitbkqm3.fsf@aiko.keithp.com> (raw)
In-Reply-To: <d08817$1l8egs@azsmga001.ch.intel.com>
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On Mon, 26 Sep 2011 20:16:04 +0100, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> PIPE_CONTROL and its workarounds is a very bitter pill to swallow if
> MI_FLUSH continues to function.
If you look at the simulator source code, you'll see that it implements
MI_FLUSH as a specific kind of PIPE_CONTROL. And that MI_FLUSH isn't
being validated anymore. If this is all true, then this isn't a huge
change, other than exposing which PIPE_CONTROL workarounds we're
supposed to be using in the MI_FLUSH paths...
--
keith.packard@intel.com
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next prev parent reply other threads:[~2011-09-26 20:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-26 18:59 [PATCH] drm/i915: Use PIPE_CONTROL for flushing on gen6+ Kenneth Graunke
2011-09-26 19:16 ` Chris Wilson
2011-09-26 19:23 ` Daniel Vetter
2011-09-26 19:43 ` Chris Wilson
2011-09-26 20:15 ` Keith Packard [this message]
2011-09-26 20:21 ` Kenneth Graunke
2011-09-26 20:31 ` Daniel Vetter
2011-09-26 20:38 ` Kenneth Graunke
2011-09-26 22:25 ` Eric Anholt
2011-10-03 20:00 ` Jesse Barnes
2011-10-03 21:14 ` Keith Packard
2011-10-03 21:21 ` Jesse Barnes
2011-10-03 22:59 ` Eric Anholt
2011-10-03 23:16 ` Jesse Barnes
-- strict thread matches above, loose matches on Subject: below --
2011-10-11 21:41 [PATCH 3/3] " Daniel Vetter
2011-10-16 8:23 ` [PATCH] " Daniel Vetter
2011-10-17 1:27 ` Ben Widawsky
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