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From: "Murthy, Arun R" <arun.r.murthy@intel.com>
To: Uma Shankar <uma.shankar@intel.com>,
	<intel-gfx@lists.freedesktop.org>,
	<intel-xe@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>
Cc: <chaitanya.kumar.borah@intel.com>,
	<ville.syrjala@linux.intel.com>, <pekka.paalanen@collabora.com>,
	<contact@emersion.fr>, <harry.wentland@amd.com>,
	<mwen@igalia.com>, <jadahl@redhat.com>,
	<sebastian.wick@redhat.com>, <swati2.sharma@intel.com>,
	<alex.hung@amd.com>, <jani.nikula@intel.com>,
	<suraj.kandpal@intel.com>
Subject: Re: [v7, 01/15] drm/i915/display: Add identifiers for driver specific blocks
Date: Tue, 2 Dec 2025 13:12:29 +0530	[thread overview]
Message-ID: <045b308b-c5ab-4ad2-b25e-3fbda2b14590@intel.com> (raw)
In-Reply-To: <20251201064655.3579280-2-uma.shankar@intel.com>

On 01-12-2025 12:16, Uma Shankar wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>
> Add macros to identify intel specific color blocks. It will help
> in mapping drm_color_ops to intel color HW blocks
>
> v2:- Prefix enums with INTEL_* (Jani, Suraj)
>     - Remove unnecessary comments (Jani)
>     - Commit message improvements (Suraj)
>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display_limits.h | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
> index f0fa27e365ab..55fd574ba313 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_limits.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
> @@ -138,4 +138,12 @@ enum hpd_pin {
>   	HPD_NUM_PINS
>   };
>   
> +enum intel_color_block {

Can this be intel_plane_color_block/pipeline as we get a new 
block/pipeline for crtc which can later be named as 
intel_crtc_color_block/pipeline

Thanks and Regards,
Arun R Murthy
-------------------

> +	INTEL_PLANE_CB_PRE_CSC_LUT,
> +	INTEL_PLANE_CB_CSC,
> +	INTEL_PLANE_CB_POST_CSC_LUT,
> +
> +	INTEL_CB_MAX
> +};
> +
>   #endif /* __INTEL_DISPLAY_LIMITS_H__ */

  reply	other threads:[~2025-12-02  7:42 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-01  6:46 [v7 00/15] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-12-01  6:46 ` [v7 01/15] drm/i915/display: Add identifiers for driver specific blocks Uma Shankar
2025-12-02  7:42   ` Murthy, Arun R [this message]
2025-12-02  8:04     ` [v7, " Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 02/15] drm/i915: Add intel_color_op Uma Shankar
2025-12-01 14:21   ` kernel test robot
2025-12-01  6:46 ` [v7 03/15] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-12-01  6:46 ` [v7 04/15] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-12-01  9:02   ` Kandpal, Suraj
2025-12-01 15:55   ` kernel test robot
2025-12-02  7:56   ` [v7,04/15] " Murthy, Arun R
2025-12-02  8:20     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 05/15] drm/i915/color: Add framework to program CSC Uma Shankar
2025-12-01  9:05   ` Kandpal, Suraj
2025-12-01 15:45   ` kernel test robot
2025-12-01  6:46 ` [v7 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-12-01  6:46 ` [v7 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-12-01  9:16   ` Kandpal, Suraj
2025-12-01 18:13   ` kernel test robot
2025-12-01  6:46 ` [v7 08/15] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-12-01  9:18   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 09/15] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-12-01  9:21   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-12-01  9:23   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 11/15] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-12-01  9:24   ` Kandpal, Suraj
2025-12-02  8:24     ` Shankar, Uma
2025-12-02 16:00       ` Kandpal, Suraj
2025-12-01 19:28   ` kernel test robot
2025-12-01  6:46 ` [v7 12/15] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-12-02 15:32   ` Kandpal, Suraj
2025-12-02 16:10     ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 13/15] drm/i915/display: Add registers for 3D LUT Uma Shankar
2025-12-01  9:26   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 14/15] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-12-02 15:42   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 15/15] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-12-01 21:14   ` kernel test robot
2025-12-01  6:47 ` ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01  6:48 ` ✓ CI.KUnit: success " Patchwork
2025-12-01  7:03 ` ✗ CI.checksparse: warning " Patchwork
2025-12-01  7:50 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-01  8:41 ` ✗ Xe.CI.Full: failure " Patchwork

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