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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
	pekka.paalanen@collabora.com, contact@emersion.fr,
	harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
	sebastian.wick@redhat.com, swati2.sharma@intel.com,
	alex.hung@amd.com, jani.nikula@intel.com,
	suraj.kandpal@intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT
Date: Mon,  1 Dec 2025 12:16:50 +0530	[thread overview]
Message-ID: <20251201064655.3579280-11-uma.shankar@intel.com> (raw)
In-Reply-To: <20251201064655.3579280-1-uma.shankar@intel.com>

Add framework that will help in loading LUT to Pre/Post CSC color
blocks.

v2: Add dsb support
v3: Align enum names
v4: Propagate change in lut data to crtc_state

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c       | 16 ++++++++++++++++
 .../gpu/drm/i915/display/intel_display_types.h   |  2 +-
 drivers/gpu/drm/i915/display/intel_plane.c       |  4 ++++
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 2f8e985d51e5..4ca359d68730 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -93,6 +93,10 @@ struct intel_color_funcs {
 	/* Plane CSC*/
 	void (*load_plane_csc_matrix)(struct intel_dsb *dsb,
 				      const struct intel_plane_state *plane_state);
+
+	/* Plane Pre/Post CSC */
+	void (*load_plane_luts)(struct intel_dsb *dsb,
+				const struct intel_plane_state *plane_state);
 };
 
 #define CTM_COEFF_SIGN	(1ULL << 63)
@@ -4077,11 +4081,23 @@ intel_color_load_plane_csc_matrix(struct intel_dsb *dsb,
 		display->funcs.color->load_plane_csc_matrix(dsb, plane_state);
 }
 
+static void
+intel_color_load_plane_luts(struct intel_dsb *dsb,
+			    const struct intel_plane_state *plane_state)
+{
+	struct intel_display *display = to_intel_display(plane_state);
+
+	if (display->funcs.color->load_plane_luts)
+		display->funcs.color->load_plane_luts(dsb, plane_state);
+}
+
 void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
 					const struct intel_plane_state *plane_state)
 {
 	if (plane_state->hw.ctm)
 		intel_color_load_plane_csc_matrix(dsb, plane_state);
+	if (plane_state->hw.degamma_lut || plane_state->hw.gamma_lut)
+		intel_color_load_plane_luts(dsb, plane_state);
 }
 
 void intel_color_crtc_init(struct intel_crtc *crtc)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 6d8217497583..c419a814cb34 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -646,7 +646,7 @@ struct intel_plane_state {
 		enum drm_color_encoding color_encoding;
 		enum drm_color_range color_range;
 		enum drm_scaling_filter scaling_filter;
-		struct drm_property_blob *ctm;
+		struct drm_property_blob *ctm, *degamma_lut, *gamma_lut;
 	} hw;
 
 	struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index 328b12af4d27..4e6ddb36b872 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -348,6 +348,10 @@ intel_plane_colorop_replace_blob(struct intel_plane_state *plane_state,
 {
 	if (intel_colorop->id == INTEL_PLANE_CB_CSC)
 		return drm_property_replace_blob(&plane_state->hw.ctm, blob);
+	else if (intel_colorop->id == INTEL_PLANE_CB_PRE_CSC_LUT)
+		return	drm_property_replace_blob(&plane_state->hw.degamma_lut, blob);
+	else if (intel_colorop->id == INTEL_PLANE_CB_POST_CSC_LUT)
+		return drm_property_replace_blob(&plane_state->hw.gamma_lut, blob);
 
 	return false;
 }
-- 
2.50.1


  parent reply	other threads:[~2025-12-01  6:36 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-01  6:46 [v7 00/15] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-12-01  6:46 ` [v7 01/15] drm/i915/display: Add identifiers for driver specific blocks Uma Shankar
2025-12-02  7:42   ` [v7, " Murthy, Arun R
2025-12-02  8:04     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 02/15] drm/i915: Add intel_color_op Uma Shankar
2025-12-01 14:21   ` kernel test robot
2025-12-01  6:46 ` [v7 03/15] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-12-01  6:46 ` [v7 04/15] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-12-01  9:02   ` Kandpal, Suraj
2025-12-01 15:55   ` kernel test robot
2025-12-02  7:56   ` [v7,04/15] " Murthy, Arun R
2025-12-02  8:20     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 05/15] drm/i915/color: Add framework to program CSC Uma Shankar
2025-12-01  9:05   ` Kandpal, Suraj
2025-12-01 15:45   ` kernel test robot
2025-12-01  6:46 ` [v7 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-12-01  6:46 ` [v7 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-12-01  9:16   ` Kandpal, Suraj
2025-12-01 18:13   ` kernel test robot
2025-12-01  6:46 ` [v7 08/15] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-12-01  9:18   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 09/15] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-12-01  9:21   ` Kandpal, Suraj
2025-12-01  6:46 ` Uma Shankar [this message]
2025-12-01  9:23   ` [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT Kandpal, Suraj
2025-12-01  6:46 ` [v7 11/15] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-12-01  9:24   ` Kandpal, Suraj
2025-12-02  8:24     ` Shankar, Uma
2025-12-02 16:00       ` Kandpal, Suraj
2025-12-01 19:28   ` kernel test robot
2025-12-01  6:46 ` [v7 12/15] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-12-02 15:32   ` Kandpal, Suraj
2025-12-02 16:10     ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 13/15] drm/i915/display: Add registers for 3D LUT Uma Shankar
2025-12-01  9:26   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 14/15] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-12-02 15:42   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 15/15] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-12-01 21:14   ` kernel test robot
2025-12-01  6:47 ` ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01  6:48 ` ✓ CI.KUnit: success " Patchwork
2025-12-01  7:03 ` ✗ CI.checksparse: warning " Patchwork
2025-12-01  7:50 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-01  8:41 ` ✗ Xe.CI.Full: failure " Patchwork

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