[PATCH v2 0/5] drm/i915/display: switch from intel_wakeref_t to struct ref_tracker *

[PATCH v2 0/5] drm/i915/display: switch from intel_wakeref_t to struct ref_tracker *

[Jani Nikula]

v2 of [1] fixing it for CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n.

[1] https://lore.kernel.org/r/cover.1763729370.git.jani.nikula@intel.com


Jani Nikula (5):
  drm/i915/pps: drop wakeref parameter from with_intel_pps_lock()
  drm/i915/pps: convert intel_wakeref_t to struct ref_tracker *
  drm/i915/power: drop wakeref parameter from
    with_intel_display_power*()
  drm/i915/power: convert intel_wakeref_t to struct ref_tracker *
  drm/{i915,xe}/display: drop intel_wakeref.h usage

 drivers/gpu/drm/i915/display/g4x_dp.c         |  5 +-
 drivers/gpu/drm/i915/display/g4x_hdmi.c       |  2 +-
 drivers/gpu/drm/i915/display/i9xx_plane.c     |  2 +-
 drivers/gpu/drm/i915/display/icl_dsi.c        |  4 +-
 drivers/gpu/drm/i915/display/intel_audio.c    |  6 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  4 +-
 drivers/gpu/drm/i915/display/intel_cmtg.c     |  3 +-
 drivers/gpu/drm/i915/display/intel_crt.c      |  6 +-
 drivers/gpu/drm/i915/display/intel_cursor.c   |  4 +-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 18 +++---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 16 ++---
 drivers/gpu/drm/i915/display/intel_display.c  | 23 +++----
 .../gpu/drm/i915/display/intel_display_core.h |  2 +-
 .../drm/i915/display/intel_display_debugfs.c  |  2 +-
 .../drm/i915/display/intel_display_power.c    | 26 ++++----
 .../drm/i915/display/intel_display_power.h    | 48 ++++++++------
 .../drm/i915/display/intel_display_types.h    |  6 +-
 drivers/gpu/drm/i915/display/intel_dmc.c      |  2 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  3 +-
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |  4 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 18 +++---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 +-
 drivers/gpu/drm/i915/display/intel_dsi.h      |  7 ++-
 drivers/gpu/drm/i915/display/intel_gmbus.c    |  4 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  4 +-
 drivers/gpu/drm/i915/display/intel_hotplug.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_lt_phy.c   | 14 ++---
 drivers/gpu/drm/i915/display/intel_lvds.c     |  2 +-
 .../drm/i915/display/intel_modeset_setup.c    |  2 +-
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |  2 +-
 drivers/gpu/drm/i915/display/intel_pps.c      | 63 ++++++-------------
 drivers/gpu/drm/i915/display/intel_pps.h      | 14 +++--
 drivers/gpu/drm/i915/display/intel_sprite.c   |  6 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 40 +++++-------
 drivers/gpu/drm/i915/display/intel_vdsc.c     |  2 +-
 .../drm/i915/display/skl_universal_plane.c    |  2 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  |  2 +-
 drivers/gpu/drm/i915/display/vlv_dsi.c        |  2 +-
 .../xe/compat-i915-headers/intel_wakeref.h    | 10 ---
 drivers/gpu/drm/xe/display/xe_display_rpm.c   |  3 +
 40 files changed, 177 insertions(+), 212 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h

-- 
2.47.3

[PATCH v2 1/5] drm/i915/pps: drop wakeref parameter from with_intel_pps_lock()

[Jani Nikula]

Add another level of macro abstraction, and declare the wakeref within
the for loop using __UNIQUE_ID. This allows us to drop a bunch of
boilerplate declarations and parameter passing.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c    |  3 +-
 drivers/gpu/drm/i915/display/intel_pps.c | 56 +++++++-----------------
 drivers/gpu/drm/i915/display/intel_pps.h |  7 ++-
 3 files changed, 22 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index a3ff21b2f69f..27f4c55d7484 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -684,12 +684,11 @@ static void intel_enable_dp(struct intel_atomic_state *state,
 	struct intel_display *display = to_intel_display(state);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	u32 dp_reg = intel_de_read(display, intel_dp->output_reg);
-	intel_wakeref_t wakeref;
 
 	if (drm_WARN_ON(display->drm, dp_reg & DP_PORT_EN))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		if (display->platform.valleyview || display->platform.cherryview)
 			vlv_pps_port_enable_unlocked(encoder, pipe_config);
 
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 25692a547764..34376255b85c 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -697,12 +697,10 @@ static void wait_panel_power_cycle(struct intel_dp *intel_dp)
 
 void intel_pps_wait_power_cycle(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		wait_panel_power_cycle(intel_dp);
 }
 
@@ -811,14 +809,13 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp)
 void intel_pps_vdd_on(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	intel_wakeref_t wakeref;
 	bool vdd;
 
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
 	vdd = false;
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		vdd = intel_pps_vdd_on_unlocked(intel_dp);
 	INTEL_DISPLAY_STATE_WARN(display, !vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
 				 dp_to_dig_port(intel_dp)->base.base.base.id,
@@ -873,8 +870,6 @@ static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
 
 void intel_pps_vdd_off_sync(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
@@ -883,7 +878,7 @@ void intel_pps_vdd_off_sync(struct intel_dp *intel_dp)
 	 * vdd might still be enabled due to the delayed vdd off.
 	 * Make sure vdd is actually turned off here.
 	 */
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		intel_pps_vdd_off_sync_unlocked(intel_dp);
 }
 
@@ -892,9 +887,8 @@ static void edp_panel_vdd_work(struct work_struct *__work)
 	struct intel_pps *pps = container_of(to_delayed_work(__work),
 					     struct intel_pps, panel_vdd_work);
 	struct intel_dp *intel_dp = container_of(pps, struct intel_dp, pps);
-	intel_wakeref_t wakeref;
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		if (!intel_dp->pps.want_panel_vdd)
 			intel_pps_vdd_off_sync_unlocked(intel_dp);
 	}
@@ -952,12 +946,10 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
 
 void intel_pps_vdd_off(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		intel_pps_vdd_off_unlocked(intel_dp, false);
 }
 
@@ -1026,12 +1018,10 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
 
 void intel_pps_on(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		intel_pps_on_unlocked(intel_dp);
 }
 
@@ -1082,12 +1072,10 @@ void intel_pps_off_unlocked(struct intel_dp *intel_dp)
 
 void intel_pps_off(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		intel_pps_off_unlocked(intel_dp);
 }
 
@@ -1095,7 +1083,6 @@ void intel_pps_off(struct intel_dp *intel_dp)
 void intel_pps_backlight_on(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	intel_wakeref_t wakeref;
 
 	/*
 	 * If we enable the backlight right away following a panel power
@@ -1105,7 +1092,7 @@ void intel_pps_backlight_on(struct intel_dp *intel_dp)
 	 */
 	wait_backlight_on(intel_dp);
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
 		u32 pp;
 
@@ -1121,12 +1108,11 @@ void intel_pps_backlight_on(struct intel_dp *intel_dp)
 void intel_pps_backlight_off(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	intel_wakeref_t wakeref;
 
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
 		u32 pp;
 
@@ -1149,11 +1135,10 @@ void intel_pps_backlight_power(struct intel_connector *connector, bool enable)
 {
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	intel_wakeref_t wakeref;
 	bool is_enabled;
 
 	is_enabled = false;
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		is_enabled = ilk_get_pp_control(intel_dp) & EDP_BLC_ENABLE;
 	if (is_enabled == enable)
 		return;
@@ -1251,9 +1236,7 @@ void vlv_pps_pipe_init(struct intel_dp *intel_dp)
 /* Call on all DP, not just eDP */
 void vlv_pps_pipe_reset(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp);
 }
 
@@ -1329,9 +1312,7 @@ void vlv_pps_port_disable(struct intel_encoder *encoder,
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
-	intel_wakeref_t wakeref;
-
-	with_intel_pps_lock(intel_dp, wakeref)
+	with_intel_pps_lock(intel_dp)
 		intel_dp->pps.vlv_active_pipe = INVALID_PIPE;
 }
 
@@ -1362,10 +1343,9 @@ static void pps_vdd_init(struct intel_dp *intel_dp)
 
 bool intel_pps_have_panel_power_or_vdd(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
 	bool have_power = false;
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		have_power = edp_have_panel_power(intel_dp) ||
 			     edp_have_panel_vdd(intel_dp);
 	}
@@ -1692,12 +1672,11 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
 void intel_pps_encoder_reset(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	intel_wakeref_t wakeref;
 
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		/*
 		 * Reinit the power sequencer also on the resume path, in case
 		 * BIOS did something nasty with it.
@@ -1716,7 +1695,6 @@ void intel_pps_encoder_reset(struct intel_dp *intel_dp)
 
 bool intel_pps_init(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
 	bool ret;
 
 	intel_dp->pps.initializing = true;
@@ -1724,7 +1702,7 @@ bool intel_pps_init(struct intel_dp *intel_dp)
 
 	pps_init_timestamps(intel_dp);
 
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		ret = pps_initial_setup(intel_dp);
 
 		pps_init_delays(intel_dp);
@@ -1760,9 +1738,7 @@ static void pps_init_late(struct intel_dp *intel_dp)
 
 void intel_pps_init_late(struct intel_dp *intel_dp)
 {
-	intel_wakeref_t wakeref;
-
-	with_intel_pps_lock(intel_dp, wakeref) {
+	with_intel_pps_lock(intel_dp) {
 		/* Reinit delays after per-panel info has been parsed from VBT */
 		pps_init_late(intel_dp);
 
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index c83007152f07..ad5c458ccdaf 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -20,8 +20,11 @@ struct intel_encoder;
 intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp);
 intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref);
 
-#define with_intel_pps_lock(dp, wf)						\
-	for ((wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
+#define __with_intel_pps_lock(dp, wf) \
+	for (intel_wakeref_t (wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
+
+#define with_intel_pps_lock(dp) \
+	__with_intel_pps_lock((dp), __UNIQUE_ID(wakeref))
 
 void intel_pps_backlight_on(struct intel_dp *intel_dp);
 void intel_pps_backlight_off(struct intel_dp *intel_dp);
-- 
2.47.3

Re: [PATCH v2 1/5] drm/i915/pps: drop wakeref parameter from with_intel_pps_lock()

[Luca Coelho]

On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
> Add another level of macro abstraction, and declare the wakeref within
> the for loop using __UNIQUE_ID. This allows us to drop a bunch of
> boilerplate declarations and parameter passing.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/g4x_dp.c    |  3 +-
>  drivers/gpu/drm/i915/display/intel_pps.c | 56 +++++++-----------------
>  drivers/gpu/drm/i915/display/intel_pps.h |  7 ++-
>  3 files changed, 22 insertions(+), 44 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index a3ff21b2f69f..27f4c55d7484 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -684,12 +684,11 @@ static void intel_enable_dp(struct intel_atomic_state *state,
>  	struct intel_display *display = to_intel_display(state);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	u32 dp_reg = intel_de_read(display, intel_dp->output_reg);
> -	intel_wakeref_t wakeref;
>  
>  	if (drm_WARN_ON(display->drm, dp_reg & DP_PORT_EN))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		if (display->platform.valleyview || display->platform.cherryview)
>  			vlv_pps_port_enable_unlocked(encoder, pipe_config);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 25692a547764..34376255b85c 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -697,12 +697,10 @@ static void wait_panel_power_cycle(struct intel_dp *intel_dp)
>  
>  void intel_pps_wait_power_cycle(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		wait_panel_power_cycle(intel_dp);
>  }
>  
> @@ -811,14 +809,13 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp)
>  void intel_pps_vdd_on(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	intel_wakeref_t wakeref;
>  	bool vdd;
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
>  	vdd = false;
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		vdd = intel_pps_vdd_on_unlocked(intel_dp);
>  	INTEL_DISPLAY_STATE_WARN(display, !vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
>  				 dp_to_dig_port(intel_dp)->base.base.base.id,
> @@ -873,8 +870,6 @@ static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
>  
>  void intel_pps_vdd_off_sync(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> @@ -883,7 +878,7 @@ void intel_pps_vdd_off_sync(struct intel_dp *intel_dp)
>  	 * vdd might still be enabled due to the delayed vdd off.
>  	 * Make sure vdd is actually turned off here.
>  	 */
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		intel_pps_vdd_off_sync_unlocked(intel_dp);
>  }
>  
> @@ -892,9 +887,8 @@ static void edp_panel_vdd_work(struct work_struct *__work)
>  	struct intel_pps *pps = container_of(to_delayed_work(__work),
>  					     struct intel_pps, panel_vdd_work);
>  	struct intel_dp *intel_dp = container_of(pps, struct intel_dp, pps);
> -	intel_wakeref_t wakeref;
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		if (!intel_dp->pps.want_panel_vdd)
>  			intel_pps_vdd_off_sync_unlocked(intel_dp);
>  	}
> @@ -952,12 +946,10 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
>  
>  void intel_pps_vdd_off(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		intel_pps_vdd_off_unlocked(intel_dp, false);
>  }
>  
> @@ -1026,12 +1018,10 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
>  
>  void intel_pps_on(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		intel_pps_on_unlocked(intel_dp);
>  }
>  
> @@ -1082,12 +1072,10 @@ void intel_pps_off_unlocked(struct intel_dp *intel_dp)
>  
>  void intel_pps_off(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		intel_pps_off_unlocked(intel_dp);
>  }
>  
> @@ -1095,7 +1083,6 @@ void intel_pps_off(struct intel_dp *intel_dp)
>  void intel_pps_backlight_on(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	intel_wakeref_t wakeref;
>  
>  	/*
>  	 * If we enable the backlight right away following a panel power
> @@ -1105,7 +1092,7 @@ void intel_pps_backlight_on(struct intel_dp *intel_dp)
>  	 */
>  	wait_backlight_on(intel_dp);
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
>  		u32 pp;
>  
> @@ -1121,12 +1108,11 @@ void intel_pps_backlight_on(struct intel_dp *intel_dp)
>  void intel_pps_backlight_off(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	intel_wakeref_t wakeref;
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
>  		u32 pp;
>  
> @@ -1149,11 +1135,10 @@ void intel_pps_backlight_power(struct intel_connector *connector, bool enable)
>  {
>  	struct intel_display *display = to_intel_display(connector);
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	intel_wakeref_t wakeref;
>  	bool is_enabled;
>  
>  	is_enabled = false;
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		is_enabled = ilk_get_pp_control(intel_dp) & EDP_BLC_ENABLE;
>  	if (is_enabled == enable)
>  		return;
> @@ -1251,9 +1236,7 @@ void vlv_pps_pipe_init(struct intel_dp *intel_dp)
>  /* Call on all DP, not just eDP */
>  void vlv_pps_pipe_reset(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp);
>  }
>  
> @@ -1329,9 +1312,7 @@ void vlv_pps_port_disable(struct intel_encoder *encoder,
>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> -	intel_wakeref_t wakeref;
> -
> -	with_intel_pps_lock(intel_dp, wakeref)
> +	with_intel_pps_lock(intel_dp)
>  		intel_dp->pps.vlv_active_pipe = INVALID_PIPE;
>  }
>  
> @@ -1362,10 +1343,9 @@ static void pps_vdd_init(struct intel_dp *intel_dp)
>  
>  bool intel_pps_have_panel_power_or_vdd(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
>  	bool have_power = false;
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		have_power = edp_have_panel_power(intel_dp) ||
>  			     edp_have_panel_vdd(intel_dp);
>  	}
> @@ -1692,12 +1672,11 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
>  void intel_pps_encoder_reset(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	intel_wakeref_t wakeref;
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		/*
>  		 * Reinit the power sequencer also on the resume path, in case
>  		 * BIOS did something nasty with it.
> @@ -1716,7 +1695,6 @@ void intel_pps_encoder_reset(struct intel_dp *intel_dp)
>  
>  bool intel_pps_init(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
>  	bool ret;
>  
>  	intel_dp->pps.initializing = true;
> @@ -1724,7 +1702,7 @@ bool intel_pps_init(struct intel_dp *intel_dp)
>  
>  	pps_init_timestamps(intel_dp);
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		ret = pps_initial_setup(intel_dp);
>  
>  		pps_init_delays(intel_dp);
> @@ -1760,9 +1738,7 @@ static void pps_init_late(struct intel_dp *intel_dp)
>  
>  void intel_pps_init_late(struct intel_dp *intel_dp)
>  {
> -	intel_wakeref_t wakeref;
> -
> -	with_intel_pps_lock(intel_dp, wakeref) {
> +	with_intel_pps_lock(intel_dp) {
>  		/* Reinit delays after per-panel info has been parsed from VBT */
>  		pps_init_late(intel_dp);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> index c83007152f07..ad5c458ccdaf 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.h
> +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> @@ -20,8 +20,11 @@ struct intel_encoder;
>  intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp);
>  intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref);
>  
> -#define with_intel_pps_lock(dp, wf)						\
> -	for ((wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
> +#define __with_intel_pps_lock(dp, wf) \
> +	for (intel_wakeref_t (wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
> +
> +#define with_intel_pps_lock(dp) \
> +	__with_intel_pps_lock((dp), __UNIQUE_ID(wakeref))
>  
>  void intel_pps_backlight_on(struct intel_dp *intel_dp);
>  void intel_pps_backlight_off(struct intel_dp *intel_dp);

Nice!

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

[PATCH v2 2/5] drm/i915/pps: convert intel_wakeref_t to struct ref_tracker *

[Jani Nikula]

Under the hood, intel_wakeref_t is just struct ref_tracker *. Use the
actual underlying type both for clarity (we *are* using intel_wakeref_t
as a pointer though it doesn't look like one) and to help i915, xe and
display coexistence without custom types.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +-
 drivers/gpu/drm/i915/display/intel_pps.c    | 7 +++----
 drivers/gpu/drm/i915/display/intel_pps.h    | 9 ++++-----
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 809799f63e32..38e03f3efac5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -246,7 +246,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 	u32 aux_clock_divider;
 	enum intel_display_power_domain aux_domain;
 	intel_wakeref_t aux_wakeref;
-	intel_wakeref_t pps_wakeref = NULL;
+	struct ref_tracker *pps_wakeref = NULL;
 	int i, ret, recv_bytes;
 	int try, clock = 0;
 	u32 status;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 34376255b85c..b217ec7aa758 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -67,10 +67,10 @@ static const char *pps_name(struct intel_dp *intel_dp)
 	return "PPS <invalid>";
 }
 
-intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
+struct ref_tracker *intel_pps_lock(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	/*
 	 * See vlv_pps_reset_all() why we need a power domain reference here.
@@ -81,8 +81,7 @@ intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
 	return wakeref;
 }
 
-intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp,
-				 intel_wakeref_t wakeref)
+struct ref_tracker *intel_pps_unlock(struct intel_dp *intel_dp, struct ref_tracker *wakeref)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index ad5c458ccdaf..f7c96d75be45 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -8,20 +8,19 @@
 
 #include <linux/types.h>
 
-#include "intel_wakeref.h"
-
 enum pipe;
 struct intel_connector;
 struct intel_crtc_state;
 struct intel_display;
 struct intel_dp;
 struct intel_encoder;
+struct ref_tracker;
 
-intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp);
-intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref);
+struct ref_tracker *intel_pps_lock(struct intel_dp *intel_dp);
+struct ref_tracker *intel_pps_unlock(struct intel_dp *intel_dp, struct ref_tracker *wakeref);
 
 #define __with_intel_pps_lock(dp, wf) \
-	for (intel_wakeref_t (wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
+	for (struct ref_tracker *(wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
 
 #define with_intel_pps_lock(dp) \
 	__with_intel_pps_lock((dp), __UNIQUE_ID(wakeref))
-- 
2.47.3

Re: [PATCH v2 2/5] drm/i915/pps: convert intel_wakeref_t to struct ref_tracker *

[Luca Coelho]

On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
> Under the hood, intel_wakeref_t is just struct ref_tracker *. Use the
> actual underlying type both for clarity (we *are* using intel_wakeref_t
> as a pointer though it doesn't look like one) and to help i915, xe and
> display coexistence without custom types.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_pps.c    | 7 +++----
>  drivers/gpu/drm/i915/display/intel_pps.h    | 9 ++++-----
>  3 files changed, 8 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 809799f63e32..38e03f3efac5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -246,7 +246,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>  	u32 aux_clock_divider;
>  	enum intel_display_power_domain aux_domain;
>  	intel_wakeref_t aux_wakeref;
> -	intel_wakeref_t pps_wakeref = NULL;
> +	struct ref_tracker *pps_wakeref = NULL;
>  	int i, ret, recv_bytes;
>  	int try, clock = 0;
>  	u32 status;
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 34376255b85c..b217ec7aa758 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -67,10 +67,10 @@ static const char *pps_name(struct intel_dp *intel_dp)
>  	return "PPS <invalid>";
>  }
>  
> -intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
> +struct ref_tracker *intel_pps_lock(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	/*
>  	 * See vlv_pps_reset_all() why we need a power domain reference here.
> @@ -81,8 +81,7 @@ intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
>  	return wakeref;
>  }
>  
> -intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp,
> -				 intel_wakeref_t wakeref)
> +struct ref_tracker *intel_pps_unlock(struct intel_dp *intel_dp, struct ref_tracker *wakeref)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> index ad5c458ccdaf..f7c96d75be45 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.h
> +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> @@ -8,20 +8,19 @@
>  
>  #include <linux/types.h>
>  
> -#include "intel_wakeref.h"
> -
>  enum pipe;
>  struct intel_connector;
>  struct intel_crtc_state;
>  struct intel_display;
>  struct intel_dp;
>  struct intel_encoder;
> +struct ref_tracker;
>  
> -intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp);
> -intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref);
> +struct ref_tracker *intel_pps_lock(struct intel_dp *intel_dp);
> +struct ref_tracker *intel_pps_unlock(struct intel_dp *intel_dp, struct ref_tracker *wakeref);
>  
>  #define __with_intel_pps_lock(dp, wf) \
> -	for (intel_wakeref_t (wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
> +	for (struct ref_tracker *(wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))
>  
>  #define with_intel_pps_lock(dp) \
>  	__with_intel_pps_lock((dp), __UNIQUE_ID(wakeref))


Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

[PATCH v2 3/5] drm/i915/power: drop wakeref parameter from with_intel_display_power*()

[Jani Nikula]

Add another level of macro abstraction, and declare the wakeref within
the for loop using __UNIQUE_ID. This allows us to drop a bunch of
boilerplate declarations and parameter passing.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c      |  3 +--
 drivers/gpu/drm/i915/display/intel_display.c   | 15 +++++----------
 .../gpu/drm/i915/display/intel_display_power.h | 14 ++++++++++----
 drivers/gpu/drm/i915/display/intel_dp.c        |  3 +--
 drivers/gpu/drm/i915/display/intel_tc.c        | 18 ++++++------------
 5 files changed, 23 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 165138b95cb2..e1fdc6fe9762 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -85,7 +85,6 @@ static bool intel_cmtg_transcoder_is_secondary(struct intel_display *display,
 					       enum transcoder trans)
 {
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
 	u32 val = 0;
 
 	if (!HAS_TRANSCODER(display, trans))
@@ -93,7 +92,7 @@ static bool intel_cmtg_transcoder_is_secondary(struct intel_display *display,
 
 	power_domain = POWER_DOMAIN_TRANSCODER(trans);
 
-	with_intel_display_power_if_enabled(display, power_domain, wakeref)
+	with_intel_display_power_if_enabled(display, power_domain)
 		val = intel_de_read(display, TRANS_DDI_FUNC_CTL2(display, trans));
 
 	return val & CMTG_SECONDARY_MODE;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 04f5c488f399..34e69b884713 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3469,12 +3469,11 @@ static bool transcoder_ddi_func_is_enabled(struct intel_display *display,
 					   enum transcoder cpu_transcoder)
 {
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
 	u32 tmp = 0;
 
 	power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
 
-	with_intel_display_power_if_enabled(display, power_domain, wakeref)
+	with_intel_display_power_if_enabled(display, power_domain)
 		tmp = intel_de_read(display,
 				    TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
 
@@ -3496,10 +3495,9 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display,
 					 joiner_pipes(display)) {
 		enum intel_display_power_domain power_domain;
 		enum pipe pipe = crtc->pipe;
-		intel_wakeref_t wakeref;
 
 		power_domain = POWER_DOMAIN_PIPE(pipe);
-		with_intel_display_power_if_enabled(display, power_domain, wakeref) {
+		with_intel_display_power_if_enabled(display, power_domain) {
 			u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
 
 			if (tmp & UNCOMPRESSED_JOINER_PRIMARY)
@@ -3525,10 +3523,9 @@ static void enabled_bigjoiner_pipes(struct intel_display *display,
 					 joiner_pipes(display)) {
 		enum intel_display_power_domain power_domain;
 		enum pipe pipe = crtc->pipe;
-		intel_wakeref_t wakeref;
 
 		power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);
-		with_intel_display_power_if_enabled(display, power_domain, wakeref) {
+		with_intel_display_power_if_enabled(display, power_domain) {
 			u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
 
 			if (!(tmp & BIG_JOINER_ENABLE))
@@ -3595,10 +3592,9 @@ static void enabled_ultrajoiner_pipes(struct intel_display *display,
 					 joiner_pipes(display)) {
 		enum intel_display_power_domain power_domain;
 		enum pipe pipe = crtc->pipe;
-		intel_wakeref_t wakeref;
 
 		power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);
-		with_intel_display_power_if_enabled(display, power_domain, wakeref) {
+		with_intel_display_power_if_enabled(display, power_domain) {
 			u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
 
 			if (!(tmp & ULTRA_JOINER_ENABLE))
@@ -3756,12 +3752,11 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
 	for_each_cpu_transcoder_masked(display, cpu_transcoder,
 				       panel_transcoder_mask) {
 		enum intel_display_power_domain power_domain;
-		intel_wakeref_t wakeref;
 		enum pipe trans_pipe;
 		u32 tmp = 0;
 
 		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
-		with_intel_display_power_if_enabled(display, power_domain, wakeref)
+		with_intel_display_power_if_enabled(display, power_domain)
 			tmp = intel_de_read(display,
 					    TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index f8813b0e16df..79ce8d94bf7d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -297,12 +297,18 @@ enum dbuf_slice {
 void gen9_dbuf_slices_update(struct intel_display *display,
 			     u8 req_slices);
 
-#define with_intel_display_power(display, domain, wf) \
-	for ((wf) = intel_display_power_get((display), (domain)); (wf); \
+#define __with_intel_display_power(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
 
-#define with_intel_display_power_if_enabled(display, domain, wf) \
-	for ((wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
+#define with_intel_display_power(display, domain) \
+	__with_intel_display_power(display, domain, __UNIQUE_ID(wakeref))
+
+#define __with_intel_display_power_if_enabled(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
 
+#define with_intel_display_power_if_enabled(display, domain) \
+	__with_intel_display_power_if_enabled(display, domain, __UNIQUE_ID(wakeref))
+
 #endif /* __INTEL_DISPLAY_POWER_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0ec82fcbcf48..7df0e5e13688 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5791,9 +5791,8 @@ bool intel_digital_port_connected_locked(struct intel_encoder *encoder)
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	bool is_glitch_free = intel_tc_port_handles_hpd_glitches(dig_port);
 	bool is_connected = false;
-	intel_wakeref_t wakeref;
 
-	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE) {
 		poll_timeout_us(is_connected = dig_port->connected(encoder),
 				is_connected || is_glitch_free,
 				30, 4000, false);
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 1e21fd02685d..c678216af352 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -269,10 +269,9 @@ assert_tc_port_power_enabled(struct intel_tc_port *tc)
 static u32 get_lane_mask(struct intel_tc_port *tc)
 {
 	struct intel_display *display = to_intel_display(tc->dig_port);
-	intel_wakeref_t wakeref;
 	u32 lane_mask;
 
-	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
+	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE)
 		lane_mask = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia));
 
 	drm_WARN_ON(display->drm, lane_mask == 0xffffffff);
@@ -296,7 +295,6 @@ get_pin_assignment(struct intel_tc_port *tc)
 	struct intel_display *display = to_intel_display(tc->dig_port);
 	enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base);
 	enum intel_tc_pin_assignment pin_assignment;
-	intel_wakeref_t wakeref;
 	i915_reg_t reg;
 	u32 mask;
 	u32 val;
@@ -312,7 +310,7 @@ get_pin_assignment(struct intel_tc_port *tc)
 		mask = DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx);
 	}
 
-	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
+	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE)
 		val = intel_de_read(display, reg);
 
 	drm_WARN_ON(display->drm, val == 0xffffffff);
@@ -527,12 +525,11 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	struct intel_display *display = to_intel_display(tc->dig_port);
 	struct intel_digital_port *dig_port = tc->dig_port;
 	u32 isr_bit = display->hotplug.pch_hpd[dig_port->base.hpd_pin];
-	intel_wakeref_t wakeref;
 	u32 fia_isr;
 	u32 pch_isr;
 	u32 mask = 0;
 
-	with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref) {
+	with_intel_display_power(display, tc_phy_cold_off_domain(tc)) {
 		fia_isr = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia));
 		pch_isr = intel_de_read(display, SDEISR);
 	}
@@ -774,10 +771,9 @@ tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
 static void tgl_tc_phy_init(struct intel_tc_port *tc)
 {
 	struct intel_display *display = to_intel_display(tc->dig_port);
-	intel_wakeref_t wakeref;
 	u32 val;
 
-	with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref)
+	with_intel_display_power(display, tc_phy_cold_off_domain(tc))
 		val = intel_de_read(display, PORT_TX_DFLEXDPSP(FIA1));
 
 	drm_WARN_ON(display->drm, val == 0xffffffff);
@@ -819,12 +815,11 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
 	u32 cpu_isr_bits = display->hotplug.hpd[hpd_pin];
 	u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
-	intel_wakeref_t wakeref;
 	u32 cpu_isr;
 	u32 pch_isr;
 	u32 mask = 0;
 
-	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE) {
 		cpu_isr = intel_de_read(display, GEN11_DE_HPD_ISR);
 		pch_isr = intel_de_read(display, SDEISR);
 	}
@@ -1015,12 +1010,11 @@ static u32 xelpdp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
 	u32 pica_isr_bits = display->hotplug.hpd[hpd_pin];
 	u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
-	intel_wakeref_t wakeref;
 	u32 pica_isr;
 	u32 pch_isr;
 	u32 mask = 0;
 
-	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE) {
 		pica_isr = intel_de_read(display, PICAINTERRUPT_ISR);
 		pch_isr = intel_de_read(display, SDEISR);
 	}
-- 
2.47.3

Re: [PATCH v2 3/5] drm/i915/power: drop wakeref parameter from with_intel_display_power*()

[Luca Coelho]

On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
> Add another level of macro abstraction, and declare the wakeref within
> the for loop using __UNIQUE_ID. This allows us to drop a bunch of
> boilerplate declarations and parameter passing.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cmtg.c      |  3 +--
>  drivers/gpu/drm/i915/display/intel_display.c   | 15 +++++----------
>  .../gpu/drm/i915/display/intel_display_power.h | 14 ++++++++++----
>  drivers/gpu/drm/i915/display/intel_dp.c        |  3 +--
>  drivers/gpu/drm/i915/display/intel_tc.c        | 18 ++++++------------
>  5 files changed, 23 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index 165138b95cb2..e1fdc6fe9762 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -85,7 +85,6 @@ static bool intel_cmtg_transcoder_is_secondary(struct intel_display *display,
>  					       enum transcoder trans)
>  {
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
>  	u32 val = 0;
>  
>  	if (!HAS_TRANSCODER(display, trans))
> @@ -93,7 +92,7 @@ static bool intel_cmtg_transcoder_is_secondary(struct intel_display *display,
>  
>  	power_domain = POWER_DOMAIN_TRANSCODER(trans);
>  
> -	with_intel_display_power_if_enabled(display, power_domain, wakeref)
> +	with_intel_display_power_if_enabled(display, power_domain)
>  		val = intel_de_read(display, TRANS_DDI_FUNC_CTL2(display, trans));
>  
>  	return val & CMTG_SECONDARY_MODE;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 04f5c488f399..34e69b884713 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3469,12 +3469,11 @@ static bool transcoder_ddi_func_is_enabled(struct intel_display *display,
>  					   enum transcoder cpu_transcoder)
>  {
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
>  	u32 tmp = 0;
>  
>  	power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
>  
> -	with_intel_display_power_if_enabled(display, power_domain, wakeref)
> +	with_intel_display_power_if_enabled(display, power_domain)
>  		tmp = intel_de_read(display,
>  				    TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
>  
> @@ -3496,10 +3495,9 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display,
>  					 joiner_pipes(display)) {
>  		enum intel_display_power_domain power_domain;
>  		enum pipe pipe = crtc->pipe;
> -		intel_wakeref_t wakeref;
>  
>  		power_domain = POWER_DOMAIN_PIPE(pipe);
> -		with_intel_display_power_if_enabled(display, power_domain, wakeref) {
> +		with_intel_display_power_if_enabled(display, power_domain) {
>  			u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
>  
>  			if (tmp & UNCOMPRESSED_JOINER_PRIMARY)
> @@ -3525,10 +3523,9 @@ static void enabled_bigjoiner_pipes(struct intel_display *display,
>  					 joiner_pipes(display)) {
>  		enum intel_display_power_domain power_domain;
>  		enum pipe pipe = crtc->pipe;
> -		intel_wakeref_t wakeref;
>  
>  		power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);
> -		with_intel_display_power_if_enabled(display, power_domain, wakeref) {
> +		with_intel_display_power_if_enabled(display, power_domain) {
>  			u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
>  
>  			if (!(tmp & BIG_JOINER_ENABLE))
> @@ -3595,10 +3592,9 @@ static void enabled_ultrajoiner_pipes(struct intel_display *display,
>  					 joiner_pipes(display)) {
>  		enum intel_display_power_domain power_domain;
>  		enum pipe pipe = crtc->pipe;
> -		intel_wakeref_t wakeref;
>  
>  		power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);
> -		with_intel_display_power_if_enabled(display, power_domain, wakeref) {
> +		with_intel_display_power_if_enabled(display, power_domain) {
>  			u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
>  
>  			if (!(tmp & ULTRA_JOINER_ENABLE))
> @@ -3756,12 +3752,11 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
>  	for_each_cpu_transcoder_masked(display, cpu_transcoder,
>  				       panel_transcoder_mask) {
>  		enum intel_display_power_domain power_domain;
> -		intel_wakeref_t wakeref;
>  		enum pipe trans_pipe;
>  		u32 tmp = 0;
>  
>  		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> -		with_intel_display_power_if_enabled(display, power_domain, wakeref)
> +		with_intel_display_power_if_enabled(display, power_domain)
>  			tmp = intel_de_read(display,
>  					    TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index f8813b0e16df..79ce8d94bf7d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -297,12 +297,18 @@ enum dbuf_slice {
>  void gen9_dbuf_slices_update(struct intel_display *display,
>  			     u8 req_slices);
>  
> -#define with_intel_display_power(display, domain, wf) \
> -	for ((wf) = intel_display_power_get((display), (domain)); (wf); \
> +#define __with_intel_display_power(display, domain, wf) \
> +	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
>  	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
>  
> -#define with_intel_display_power_if_enabled(display, domain, wf) \
> -	for ((wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
> +#define with_intel_display_power(display, domain) \
> +	__with_intel_display_power(display, domain, __UNIQUE_ID(wakeref))
> +
> +#define __with_intel_display_power_if_enabled(display, domain, wf) \
> +	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
>  	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
>  
> +#define with_intel_display_power_if_enabled(display, domain) \
> +	__with_intel_display_power_if_enabled(display, domain, __UNIQUE_ID(wakeref))
> +
>  #endif /* __INTEL_DISPLAY_POWER_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0ec82fcbcf48..7df0e5e13688 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5791,9 +5791,8 @@ bool intel_digital_port_connected_locked(struct intel_encoder *encoder)
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	bool is_glitch_free = intel_tc_port_handles_hpd_glitches(dig_port);
>  	bool is_connected = false;
> -	intel_wakeref_t wakeref;
>  
> -	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
> +	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE) {
>  		poll_timeout_us(is_connected = dig_port->connected(encoder),
>  				is_connected || is_glitch_free,
>  				30, 4000, false);
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 1e21fd02685d..c678216af352 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -269,10 +269,9 @@ assert_tc_port_power_enabled(struct intel_tc_port *tc)
>  static u32 get_lane_mask(struct intel_tc_port *tc)
>  {
>  	struct intel_display *display = to_intel_display(tc->dig_port);
> -	intel_wakeref_t wakeref;
>  	u32 lane_mask;
>  
> -	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
> +	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE)
>  		lane_mask = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia));
>  
>  	drm_WARN_ON(display->drm, lane_mask == 0xffffffff);
> @@ -296,7 +295,6 @@ get_pin_assignment(struct intel_tc_port *tc)
>  	struct intel_display *display = to_intel_display(tc->dig_port);
>  	enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base);
>  	enum intel_tc_pin_assignment pin_assignment;
> -	intel_wakeref_t wakeref;
>  	i915_reg_t reg;
>  	u32 mask;
>  	u32 val;
> @@ -312,7 +310,7 @@ get_pin_assignment(struct intel_tc_port *tc)
>  		mask = DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx);
>  	}
>  
> -	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
> +	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE)
>  		val = intel_de_read(display, reg);
>  
>  	drm_WARN_ON(display->drm, val == 0xffffffff);
> @@ -527,12 +525,11 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  	struct intel_display *display = to_intel_display(tc->dig_port);
>  	struct intel_digital_port *dig_port = tc->dig_port;
>  	u32 isr_bit = display->hotplug.pch_hpd[dig_port->base.hpd_pin];
> -	intel_wakeref_t wakeref;
>  	u32 fia_isr;
>  	u32 pch_isr;
>  	u32 mask = 0;
>  
> -	with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref) {
> +	with_intel_display_power(display, tc_phy_cold_off_domain(tc)) {
>  		fia_isr = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia));
>  		pch_isr = intel_de_read(display, SDEISR);
>  	}
> @@ -774,10 +771,9 @@ tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
>  static void tgl_tc_phy_init(struct intel_tc_port *tc)
>  {
>  	struct intel_display *display = to_intel_display(tc->dig_port);
> -	intel_wakeref_t wakeref;
>  	u32 val;
>  
> -	with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref)
> +	with_intel_display_power(display, tc_phy_cold_off_domain(tc))
>  		val = intel_de_read(display, PORT_TX_DFLEXDPSP(FIA1));
>  
>  	drm_WARN_ON(display->drm, val == 0xffffffff);
> @@ -819,12 +815,11 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
>  	u32 cpu_isr_bits = display->hotplug.hpd[hpd_pin];
>  	u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
> -	intel_wakeref_t wakeref;
>  	u32 cpu_isr;
>  	u32 pch_isr;
>  	u32 mask = 0;
>  
> -	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
> +	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE) {
>  		cpu_isr = intel_de_read(display, GEN11_DE_HPD_ISR);
>  		pch_isr = intel_de_read(display, SDEISR);
>  	}
> @@ -1015,12 +1010,11 @@ static u32 xelpdp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
>  	u32 pica_isr_bits = display->hotplug.hpd[hpd_pin];
>  	u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
> -	intel_wakeref_t wakeref;
>  	u32 pica_isr;
>  	u32 pch_isr;
>  	u32 mask = 0;
>  
> -	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
> +	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE) {
>  		pica_isr = intel_de_read(display, PICAINTERRUPT_ISR);
>  		pch_isr = intel_de_read(display, SDEISR);
>  	}

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

[PATCH v2 4/5] drm/i915/power: convert intel_wakeref_t to struct ref_tracker *

[Jani Nikula]

Under the hood, intel_wakeref_t is just struct ref_tracker *. Use the
actual underlying type both for clarity (we *are* using intel_wakeref_t
as a pointer though it doesn't look like one) and to help i915, xe and
display coexistence without custom types.

v2: Keep intel_wakeref.h includes as they are

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c         |  2 +-
 drivers/gpu/drm/i915/display/g4x_hdmi.c       |  2 +-
 drivers/gpu/drm/i915/display/i9xx_plane.c     |  2 +-
 drivers/gpu/drm/i915/display/icl_dsi.c        |  4 +--
 drivers/gpu/drm/i915/display/intel_audio.c    |  6 ++--
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  4 +--
 drivers/gpu/drm/i915/display/intel_crt.c      |  6 ++--
 drivers/gpu/drm/i915/display/intel_cursor.c   |  4 +--
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 18 +++++-----
 drivers/gpu/drm/i915/display/intel_ddi.c      | 16 ++++-----
 drivers/gpu/drm/i915/display/intel_display.c  |  8 ++---
 .../gpu/drm/i915/display/intel_display_core.h |  2 +-
 .../drm/i915/display/intel_display_debugfs.c  |  2 +-
 .../drm/i915/display/intel_display_power.c    | 26 +++++++--------
 .../drm/i915/display/intel_display_power.h    | 33 ++++++++++---------
 .../drm/i915/display/intel_display_types.h    |  6 ++--
 drivers/gpu/drm/i915/display/intel_dmc.c      |  2 +-
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 18 +++++-----
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 +--
 drivers/gpu/drm/i915/display/intel_dsi.h      |  7 ++--
 drivers/gpu/drm/i915/display/intel_gmbus.c    |  4 +--
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  4 +--
 drivers/gpu/drm/i915/display/intel_hotplug.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_lt_phy.c   | 14 ++++----
 drivers/gpu/drm/i915/display/intel_lvds.c     |  2 +-
 .../drm/i915/display/intel_modeset_setup.c    |  2 +-
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |  2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  6 ++--
 drivers/gpu/drm/i915/display/intel_tc.c       | 22 ++++++-------
 drivers/gpu/drm/i915/display/intel_vdsc.c     |  2 +-
 .../drm/i915/display/skl_universal_plane.c    |  2 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  |  2 +-
 drivers/gpu/drm/i915/display/vlv_dsi.c        |  2 +-
 .../xe/compat-i915-headers/intel_wakeref.h    |  4 ---
 drivers/gpu/drm/xe/display/xe_display_rpm.c   |  1 +
 36 files changed, 122 insertions(+), 123 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 27f4c55d7484..4cb753177fd8 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -302,7 +302,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	wakeref = intel_display_power_get_if_enabled(display,
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index f6e2d1ed5639..8b22447e8e23 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -68,7 +68,7 @@ static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	wakeref = intel_display_power_get_if_enabled(display,
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 51ccc6bd5f21..6b570335f393 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -724,7 +724,7 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
 	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 	u32 val;
 
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 9230792960f2..dac781f54661 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1411,7 +1411,7 @@ static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
 	enum port port;
 
 	for_each_dsi_port(port, intel_dsi->ports) {
-		intel_wakeref_t wakeref;
+		struct ref_tracker *wakeref;
 
 		wakeref = fetch_and_zero(&intel_dsi->io_wakeref[port]);
 		intel_display_power_put(display,
@@ -1722,7 +1722,7 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
 	enum transcoder dsi_trans;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	enum port port;
 	bool ret = false;
 	u32 tmp;
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 5bdaef38f13d..5f3c175afdd2 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -1042,10 +1042,10 @@ int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state)
 static unsigned long intel_audio_component_get_power(struct device *kdev)
 {
 	struct intel_display *display = to_intel_display(kdev);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	/* Catch potential impedance mismatches before they occur! */
-	BUILD_BUG_ON(sizeof(intel_wakeref_t) > sizeof(unsigned long));
+	BUILD_BUG_ON(sizeof(wakeref) > sizeof(unsigned long));
 
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_AUDIO_PLAYBACK);
 
@@ -1074,7 +1074,7 @@ static void intel_audio_component_put_power(struct device *kdev,
 					    unsigned long cookie)
 {
 	struct intel_display *display = to_intel_display(kdev);
-	intel_wakeref_t wakeref = (intel_wakeref_t)cookie;
+	struct ref_tracker *wakeref = (struct ref_tracker *)cookie;
 
 	/* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */
 	if (--display->audio.power_refcount == 0)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 5c90e53b4e46..ada08fd1447b 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -667,7 +667,7 @@ static void vlv_set_cdclk(struct intel_display *display,
 {
 	int cdclk = cdclk_config->cdclk;
 	u32 val, cmd = cdclk_config->voltage_level;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int ret;
 
 	switch (cdclk) {
@@ -757,7 +757,7 @@ static void chv_set_cdclk(struct intel_display *display,
 {
 	int cdclk = cdclk_config->cdclk;
 	u32 val, cmd = cdclk_config->voltage_level;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int ret;
 
 	switch (cdclk) {
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 82e89cdbe5a5..5f9a03877ea9 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -109,7 +109,7 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	wakeref = intel_display_power_get_if_enabled(display,
@@ -847,7 +847,7 @@ intel_crt_detect(struct drm_connector *connector,
 	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));
 	struct intel_encoder *encoder = &crt->base;
 	struct drm_atomic_state *state;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int status;
 
 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
@@ -936,7 +936,7 @@ static int intel_crt_get_modes(struct drm_connector *connector)
 	struct intel_display *display = to_intel_display(connector->dev);
 	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));
 	struct intel_encoder *encoder = &crt->base;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	struct i2c_adapter *ddc;
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index a10b2425b94d..341d1cb40295 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -324,7 +324,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
 {
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(PIPE_A);
@@ -727,7 +727,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
 {
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 	u32 val;
 
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 27be2a490297..7bd17723e7ab 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -105,11 +105,11 @@ static void intel_cx0_program_msgbus_timer(struct intel_encoder *encoder)
  * We also do the msgbus timer programming here to ensure that the timer
  * is already programmed before any access to the msgbus.
  */
-static intel_wakeref_t intel_cx0_phy_transaction_begin(struct intel_encoder *encoder)
+static struct ref_tracker *intel_cx0_phy_transaction_begin(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	intel_psr_pause(intel_dp);
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
@@ -118,7 +118,7 @@ static intel_wakeref_t intel_cx0_phy_transaction_begin(struct intel_encoder *enc
 	return wakeref;
 }
 
-static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, intel_wakeref_t wakeref)
+static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, struct ref_tracker *wakeref)
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -476,7 +476,7 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
 	struct intel_display *display = to_intel_display(encoder);
 	const struct intel_ddi_buf_trans *trans;
 	u8 owned_lane_mask;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int n_entries, ln;
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 
@@ -2252,7 +2252,7 @@ static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder,
 	struct intel_display *display = to_intel_display(encoder);
 	enum phy phy = intel_encoder_to_phy(encoder);
 	u8 lane = INTEL_CX0_LANE0;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int i;
 
 	cx0pll_state->use_c10 = true;
@@ -2756,7 +2756,7 @@ static void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
 	struct intel_c20pll_state *pll_state = &cx0pll_state->c20;
 	struct intel_display *display = to_intel_display(encoder);
 	bool cntx;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int i;
 
 	cx0pll_state->use_c10 = false;
@@ -3225,7 +3225,7 @@ static void intel_cx0pll_enable(struct intel_encoder *encoder,
 	bool lane_reversal = dig_port->lane_reversal;
 	u8 maxpclk_lane = lane_reversal ? INTEL_CX0_LANE1 :
 					  INTEL_CX0_LANE0;
-	intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);
+	struct ref_tracker *wakeref = intel_cx0_phy_transaction_begin(encoder);
 
 	/*
 	 * Lane reversal is never used in DP-alt mode, in that case the
@@ -3463,7 +3463,7 @@ void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
 				 const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int i;
 	u8 owned_lane_mask;
 
@@ -3510,7 +3510,7 @@ static void intel_cx0pll_disable(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
 	enum phy phy = intel_encoder_to_phy(encoder);
-	intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);
+	struct ref_tracker *wakeref = intel_cx0_phy_transaction_begin(encoder);
 
 	/* 1. Change owned PHY lane power to Disable state. */
 	intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index ed9798b0ec00..8158f9829ddf 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -728,7 +728,7 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
 			       bool enable, u32 hdcp_mask)
 {
 	struct intel_display *display = to_intel_display(intel_encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int ret = 0;
 
 	wakeref = intel_display_power_get_if_enabled(display,
@@ -749,7 +749,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
 	int type = intel_connector->base.connector_type;
 	enum port port = encoder->port;
 	enum transcoder cpu_transcoder;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	enum pipe pipe = 0;
 	u32 ddi_mode;
 	bool ret;
@@ -805,7 +805,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 	enum port port = encoder->port;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	enum pipe p;
 	u32 tmp;
 	u8 mst_pipe_mask = 0, dp128b132b_pipe_mask = 0;
@@ -848,7 +848,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 	for_each_pipe(display, p) {
 		enum transcoder cpu_transcoder = (enum transcoder)p;
 		u32 port_mask, ddi_select, ddi_mode;
-		intel_wakeref_t trans_wakeref;
+		struct ref_tracker *trans_wakeref;
 
 		trans_wakeref = intel_display_power_get_if_enabled(display,
 								   POWER_DOMAIN_TRANSCODER(cpu_transcoder));
@@ -1002,7 +1002,7 @@ main_link_aux_power_domain_put(struct intel_digital_port *dig_port,
 	struct intel_display *display = to_intel_display(dig_port);
 	enum intel_display_power_domain domain =
 		intel_ddi_main_link_aux_domain(dig_port, crtc_state);
-	intel_wakeref_t wf;
+	struct ref_tracker *wf;
 
 	wf = fetch_and_zero(&dig_port->aux_wakeref);
 	if (!wf)
@@ -3130,7 +3130,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	struct intel_dp *intel_dp = &dig_port->dp;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool is_mst = intel_crtc_has_type(old_crtc_state,
 					  INTEL_OUTPUT_DP_MST);
 
@@ -3198,7 +3198,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	dig_port->set_infoframes(encoder, false,
 				 old_crtc_state, old_conn_state);
@@ -3965,7 +3965,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
 
 	for_each_cpu_transcoder_masked(display, cpu_transcoder, transcoders) {
 		enum intel_display_power_domain power_domain;
-		intel_wakeref_t trans_wakeref;
+		struct ref_tracker *trans_wakeref;
 
 		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
 		trans_wakeref = intel_display_power_get_if_enabled(display,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 34e69b884713..62e97d725887 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -372,7 +372,7 @@ void assert_transcoder(struct intel_display *display,
 {
 	bool cur_state;
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	/* we keep both pipes enabled on 830 */
 	if (display->platform.i830)
@@ -3035,7 +3035,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
 	struct intel_display *display = to_intel_display(crtc);
 	enum intel_display_power_domain power_domain;
 	enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret = false;
 	u32 tmp;
 
@@ -3379,7 +3379,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
 	struct intel_display *display = to_intel_display(crtc);
 	enum intel_display_power_domain power_domain;
 	enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret = false;
 	u32 tmp;
 
@@ -7376,7 +7376,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
 	struct intel_crtc_state *new_crtc_state, *old_crtc_state;
 	struct intel_crtc *crtc;
 	struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {};
-	intel_wakeref_t wakeref = NULL;
+	struct ref_tracker *wakeref = NULL;
 	int i;
 
 	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9b36654b593d..5b2120afa806 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -386,7 +386,7 @@ struct intel_display {
 
 	struct {
 		struct intel_dmc *dmc;
-		intel_wakeref_t wakeref;
+		struct ref_tracker *wakeref;
 	} dmc;
 
 	struct {
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 9bbfdae8d024..aba13e8a9051 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -86,7 +86,7 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
 static int i915_sr_status(struct seq_file *m, void *unused)
 {
 	struct intel_display *display = node_to_intel_display(m->private);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool sr_enabled = false;
 
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 08db9bbbfcb1..7cbef1a68266 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -544,8 +544,8 @@ __intel_display_power_get_domain(struct intel_display *display,
  * Any power domain reference obtained by this function must have a symmetric
  * call to intel_display_power_put() to release the reference again.
  */
-intel_wakeref_t intel_display_power_get(struct intel_display *display,
-					enum intel_display_power_domain domain)
+struct ref_tracker *intel_display_power_get(struct intel_display *display,
+					    enum intel_display_power_domain domain)
 {
 	struct i915_power_domains *power_domains = &display->power.domains;
 	struct ref_tracker *wakeref;
@@ -571,7 +571,7 @@ intel_wakeref_t intel_display_power_get(struct intel_display *display,
  * Any power domain reference obtained by this function must have a symmetric
  * call to intel_display_power_put() to release the reference again.
  */
-intel_wakeref_t
+struct ref_tracker *
 intel_display_power_get_if_enabled(struct intel_display *display,
 				   enum intel_display_power_domain domain)
 {
@@ -638,7 +638,7 @@ static void __intel_display_power_put(struct intel_display *display,
 
 static void
 queue_async_put_domains_work(struct i915_power_domains *power_domains,
-			     intel_wakeref_t wakeref,
+			     struct ref_tracker *wakeref,
 			     int delay_ms)
 {
 	struct intel_display *display = container_of(power_domains,
@@ -740,7 +740,7 @@ intel_display_power_put_async_work(struct work_struct *work)
  */
 void __intel_display_power_put_async(struct intel_display *display,
 				     enum intel_display_power_domain domain,
-				     intel_wakeref_t wakeref,
+				     struct ref_tracker *wakeref,
 				     int delay_ms)
 {
 	struct i915_power_domains *power_domains = &display->power.domains;
@@ -799,7 +799,7 @@ void intel_display_power_flush_work(struct intel_display *display)
 {
 	struct i915_power_domains *power_domains = &display->power.domains;
 	struct intel_power_domain_mask async_put_mask;
-	intel_wakeref_t work_wakeref;
+	struct ref_tracker *work_wakeref;
 
 	mutex_lock(&power_domains->lock);
 
@@ -853,7 +853,7 @@ intel_display_power_flush_work_sync(struct intel_display *display)
  */
 void intel_display_power_put(struct intel_display *display,
 			     enum intel_display_power_domain domain,
-			     intel_wakeref_t wakeref)
+			     struct ref_tracker *wakeref)
 {
 	__intel_display_power_put(display, domain);
 	intel_display_rpm_put(display, wakeref);
@@ -885,7 +885,7 @@ intel_display_power_get_in_set(struct intel_display *display,
 			       struct intel_display_power_domain_set *power_domain_set,
 			       enum intel_display_power_domain domain)
 {
-	intel_wakeref_t __maybe_unused wf;
+	struct ref_tracker *__maybe_unused wf;
 
 	drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
 
@@ -901,7 +901,7 @@ intel_display_power_get_in_set_if_enabled(struct intel_display *display,
 					  struct intel_display_power_domain_set *power_domain_set,
 					  enum intel_display_power_domain domain)
 {
-	intel_wakeref_t wf;
+	struct ref_tracker *wf;
 
 	drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
 
@@ -928,7 +928,7 @@ intel_display_power_put_mask_in_set(struct intel_display *display,
 		    !bitmap_subset(mask->bits, power_domain_set->mask.bits, POWER_DOMAIN_NUM));
 
 	for_each_power_domain(domain, mask) {
-		intel_wakeref_t __maybe_unused wf = INTEL_WAKEREF_DEF;
+		struct ref_tracker *__maybe_unused wf = INTEL_WAKEREF_DEF;
 
 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 		wf = fetch_and_zero(&power_domain_set->wakerefs[domain]);
@@ -2004,7 +2004,7 @@ void intel_power_domains_init_hw(struct intel_display *display, bool resume)
  */
 void intel_power_domains_driver_remove(struct intel_display *display)
 {
-	intel_wakeref_t wakeref __maybe_unused =
+	struct ref_tracker *wakeref __maybe_unused =
 		fetch_and_zero(&display->power.domains.init_wakeref);
 
 	/* Remove the refcount we took to keep power well support disabled. */
@@ -2065,7 +2065,7 @@ void intel_power_domains_sanitize_state(struct intel_display *display)
  */
 void intel_power_domains_enable(struct intel_display *display)
 {
-	intel_wakeref_t wakeref __maybe_unused =
+	struct ref_tracker *wakeref __maybe_unused =
 		fetch_and_zero(&display->power.domains.init_wakeref);
 
 	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
@@ -2104,7 +2104,7 @@ void intel_power_domains_disable(struct intel_display *display)
 void intel_power_domains_suspend(struct intel_display *display, bool s2idle)
 {
 	struct i915_power_domains *power_domains = &display->power.domains;
-	intel_wakeref_t wakeref __maybe_unused =
+	struct ref_tracker *wakeref __maybe_unused =
 		fetch_and_zero(&power_domains->init_wakeref);
 
 	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 79ce8d94bf7d..6f8d921b4482 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -16,6 +16,7 @@ enum port;
 struct i915_power_well;
 struct intel_display;
 struct intel_encoder;
+struct ref_tracker;
 struct seq_file;
 
 /*
@@ -142,14 +143,14 @@ struct i915_power_domains {
 	u32 target_dc_state;
 	u32 allowed_dc_mask;
 
-	intel_wakeref_t init_wakeref;
-	intel_wakeref_t disable_wakeref;
+	struct ref_tracker *init_wakeref;
+	struct ref_tracker *disable_wakeref;
 
 	struct mutex lock;
 	int domain_use_count[POWER_DOMAIN_NUM];
 
 	struct delayed_work async_put_work;
-	intel_wakeref_t async_put_wakeref;
+	struct ref_tracker *async_put_wakeref;
 	struct intel_power_domain_mask async_put_domains[2];
 	int async_put_next_delay;
 
@@ -159,7 +160,7 @@ struct i915_power_domains {
 struct intel_display_power_domain_set {
 	struct intel_power_domain_mask mask;
 #ifdef CONFIG_DRM_I915_DEBUG_RUNTIME_PM
-	intel_wakeref_t wakerefs[POWER_DOMAIN_NUM];
+	struct ref_tracker *wakerefs[POWER_DOMAIN_NUM];
 #endif
 };
 
@@ -187,24 +188,24 @@ u32 intel_display_power_get_current_dc_state(struct intel_display *display);
 
 bool intel_display_power_is_enabled(struct intel_display *display,
 				    enum intel_display_power_domain domain);
-intel_wakeref_t intel_display_power_get(struct intel_display *display,
-					enum intel_display_power_domain domain);
-intel_wakeref_t
+struct ref_tracker *intel_display_power_get(struct intel_display *display,
+					    enum intel_display_power_domain domain);
+struct ref_tracker *
 intel_display_power_get_if_enabled(struct intel_display *display,
 				   enum intel_display_power_domain domain);
 void __intel_display_power_put_async(struct intel_display *display,
 				     enum intel_display_power_domain domain,
-				     intel_wakeref_t wakeref,
+				     struct ref_tracker *wakeref,
 				     int delay_ms);
 void intel_display_power_flush_work(struct intel_display *display);
 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 void intel_display_power_put(struct intel_display *display,
 			     enum intel_display_power_domain domain,
-			     intel_wakeref_t wakeref);
+			     struct ref_tracker *wakeref);
 static inline void
 intel_display_power_put_async(struct intel_display *display,
 			      enum intel_display_power_domain domain,
-			      intel_wakeref_t wakeref)
+			      struct ref_tracker *wakeref)
 {
 	__intel_display_power_put_async(display, domain, wakeref, -1);
 }
@@ -212,7 +213,7 @@ intel_display_power_put_async(struct intel_display *display,
 static inline void
 intel_display_power_put_async_delay(struct intel_display *display,
 				    enum intel_display_power_domain domain,
-				    intel_wakeref_t wakeref,
+				    struct ref_tracker *wakeref,
 				    int delay_ms)
 {
 	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
@@ -224,7 +225,7 @@ void intel_display_power_put_unchecked(struct intel_display *display,
 static inline void
 intel_display_power_put(struct intel_display *display,
 			enum intel_display_power_domain domain,
-			intel_wakeref_t wakeref)
+			struct ref_tracker *wakeref)
 {
 	intel_display_power_put_unchecked(display, domain);
 }
@@ -232,7 +233,7 @@ intel_display_power_put(struct intel_display *display,
 static inline void
 intel_display_power_put_async(struct intel_display *display,
 			      enum intel_display_power_domain domain,
-			      intel_wakeref_t wakeref)
+			      struct ref_tracker *wakeref)
 {
 	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, -1);
 }
@@ -240,7 +241,7 @@ intel_display_power_put_async(struct intel_display *display,
 static inline void
 intel_display_power_put_async_delay(struct intel_display *display,
 				    enum intel_display_power_domain domain,
-				    intel_wakeref_t wakeref,
+				    struct ref_tracker *wakeref,
 				    int delay_ms)
 {
 	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, delay_ms);
@@ -298,14 +299,14 @@ void gen9_dbuf_slices_update(struct intel_display *display,
 			     u8 req_slices);
 
 #define __with_intel_display_power(display, domain, wf) \
-	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
+	for (struct ref_tracker *(wf) = intel_display_power_get((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
 
 #define with_intel_display_power(display, domain) \
 	__with_intel_display_power(display, domain, __UNIQUE_ID(wakeref))
 
 #define __with_intel_display_power_if_enabled(display, domain, wf) \
-	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
+	for (struct ref_tracker *(wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
 
 #define with_intel_display_power_if_enabled(display, domain) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 38702a9e0f50..ed0f7448e6cd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1658,7 +1658,7 @@ struct intel_pps {
 	unsigned long last_power_on;
 	unsigned long last_backlight_off;
 	ktime_t panel_power_off_time;
-	intel_wakeref_t vdd_wakeref;
+	struct ref_tracker *vdd_wakeref;
 
 	union {
 		/*
@@ -1940,8 +1940,8 @@ struct intel_digital_port {
 	/* Used for DP and ICL+ TypeC/DP and TypeC/HDMI ports. */
 	enum aux_ch aux_ch;
 	enum intel_display_power_domain ddi_io_power_domain;
-	intel_wakeref_t ddi_io_wakeref;
-	intel_wakeref_t aux_wakeref;
+	struct ref_tracker *ddi_io_wakeref;
+	struct ref_tracker *aux_wakeref;
 
 	struct intel_tc_port *tc;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 6ebbd97e6351..2fb6fec6dc99 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1322,7 +1322,7 @@ static void intel_dmc_runtime_pm_get(struct intel_display *display)
 
 static void intel_dmc_runtime_pm_put(struct intel_display *display)
 {
-	intel_wakeref_t wakeref __maybe_unused =
+	struct ref_tracker *wakeref __maybe_unused =
 		fetch_and_zero(&display->dmc.wakeref);
 
 	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 38e03f3efac5..51b3a168ec33 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -245,7 +245,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 	i915_reg_t ch_ctl, ch_data[5];
 	u32 aux_clock_divider;
 	enum intel_display_power_domain aux_domain;
-	intel_wakeref_t aux_wakeref;
+	struct ref_tracker *aux_wakeref;
 	struct ref_tracker *pps_wakeref = NULL;
 	int i, ret, recv_bytes;
 	int try, clock = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index e0e5e5f65d19..9aa84a430f09 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -547,7 +547,7 @@ static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
 {
 	struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
 	const enum intel_dpll_id id = pll->info->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u32 val;
 
 	wakeref = intel_display_power_get_if_enabled(display,
@@ -768,7 +768,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
 {
 	struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
 	const enum intel_dpll_id id = pll->info->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u32 val;
 
 	wakeref = intel_display_power_get_if_enabled(display,
@@ -789,7 +789,7 @@ static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
 				      struct intel_dpll_hw_state *dpll_hw_state)
 {
 	struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u32 val;
 
 	wakeref = intel_display_power_get_if_enabled(display,
@@ -1447,7 +1447,7 @@ static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
 	struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
 	const struct skl_dpll_regs *regs = skl_dpll_regs;
 	const enum intel_dpll_id id = pll->info->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 	u32 val;
 
@@ -1485,7 +1485,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
 	struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
 	const struct skl_dpll_regs *regs = skl_dpll_regs;
 	const enum intel_dpll_id id = pll->info->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u32 val;
 	bool ret;
 
@@ -2188,7 +2188,7 @@ static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
 {
 	struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
 	enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	enum dpio_phy phy;
 	enum dpio_channel ch;
 	u32 val;
@@ -3598,7 +3598,7 @@ static bool mg_pll_get_hw_state(struct intel_display *display,
 	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
 	const enum intel_dpll_id id = pll->info->id;
 	enum tc_port tc_port = icl_pll_id_to_tc_port(id);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret = false;
 	u32 val;
 
@@ -3665,7 +3665,7 @@ static bool dkl_pll_get_hw_state(struct intel_display *display,
 	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
 	const enum intel_dpll_id id = pll->info->id;
 	enum tc_port tc_port = icl_pll_id_to_tc_port(id);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret = false;
 	u32 val;
 
@@ -3737,7 +3737,7 @@ static bool icl_pll_get_hw_state(struct intel_display *display,
 {
 	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
 	const enum intel_dpll_id id = pll->info->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret = false;
 	u32 val;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 322af5c55d7c..5b71c860515f 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -28,7 +28,6 @@
 #include <linux/types.h>
 
 #include "intel_display_power.h"
-#include "intel_wakeref.h"
 
 #define for_each_dpll(__display, __pll, __i) \
 	for ((__i) = 0; (__i) < (__display)->dpll.num_dpll && \
@@ -42,6 +41,7 @@ struct intel_crtc_state;
 struct intel_dpll_funcs;
 struct intel_encoder;
 struct intel_shared_dpll;
+struct ref_tracker;
 
 /**
  * enum intel_dpll_id - possible DPLL ids
@@ -396,7 +396,7 @@ struct intel_dpll {
 	 * @wakeref: In some platforms a device-level runtime pm reference may
 	 * need to be grabbed to disable DC states while this DPLL is enabled
 	 */
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 };
 
 #define SKL_DPLL0 0
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
index 89c7166a3860..489d26ffd235 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.h
+++ b/drivers/gpu/drm/i915/display/intel_dsi.h
@@ -29,6 +29,9 @@
 
 #include "intel_display_types.h"
 
+struct intel_dsi_host;
+struct ref_tracker;
+
 #define INTEL_DSI_VIDEO_MODE	0
 #define INTEL_DSI_COMMAND_MODE	1
 
@@ -37,13 +40,11 @@
 #define DSI_DUAL_LINK_FRONT_BACK	1
 #define DSI_DUAL_LINK_PIXEL_ALT		2
 
-struct intel_dsi_host;
-
 struct intel_dsi {
 	struct intel_encoder base;
 
 	struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
-	intel_wakeref_t io_wakeref[I915_MAX_PORTS];
+	struct ref_tracker *io_wakeref[I915_MAX_PORTS];
 
 	/* GPIO Desc for panel and backlight control */
 	struct gpio_desc *gpio_panel;
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index acc85853b2a7..2caff677600c 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -789,7 +789,7 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
 {
 	struct intel_gmbus *bus = to_intel_gmbus(adapter);
 	struct intel_display *display = bus->display;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int ret;
 
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
@@ -829,7 +829,7 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
 			.buf = buf,
 		}
 	};
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int ret;
 
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 908faf17f93d..055e68810d0d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2518,7 +2518,7 @@ intel_hdmi_set_edid(struct drm_connector *_connector)
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 	struct i2c_adapter *ddc = connector->base.ddc;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	const struct drm_edid *drm_edid;
 	bool connected = false;
 
@@ -2561,7 +2561,7 @@ intel_hdmi_detect(struct drm_connector *_connector, bool force)
 	enum drm_connector_status status = connector_status_disconnected;
 	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 	struct intel_encoder *encoder = &hdmi_to_dig_port(intel_hdmi)->base;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.base.id, connector->base.name);
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 7575a063f7be..970aa95ee344 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -785,7 +785,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
 		container_of(work, typeof(*display), hotplug.poll_init_work);
 	struct drm_connector_list_iter conn_iter;
 	struct intel_connector *connector;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool enabled;
 
 	mutex_lock(&display->drm->mode_config.mutex);
diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index aaf5a2433690..939c8975fd4c 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -1324,11 +1324,11 @@ intel_lt_phy_config_changed(struct intel_encoder *encoder,
 	return true;
 }
 
-static intel_wakeref_t intel_lt_phy_transaction_begin(struct intel_encoder *encoder)
+static struct ref_tracker *intel_lt_phy_transaction_begin(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	intel_psr_pause(intel_dp);
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
@@ -1336,7 +1336,7 @@ static intel_wakeref_t intel_lt_phy_transaction_begin(struct intel_encoder *enco
 	return wakeref;
 }
 
-static void intel_lt_phy_transaction_end(struct intel_encoder *encoder, intel_wakeref_t wakeref)
+static void intel_lt_phy_transaction_end(struct intel_encoder *encoder, struct ref_tracker *wakeref)
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1932,7 +1932,7 @@ void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
 	u8 owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder);
 	enum phy phy = intel_encoder_to_phy(encoder);
 	enum port port = encoder->port;
-	intel_wakeref_t wakeref = 0;
+	struct ref_tracker *wakeref = 0;
 	u32 lane_phy_pulse_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES
 					? (XE3PLPDP_LANE_PHY_PULSE_STATUS(0) |
 					   XE3PLPDP_LANE_PHY_PULSE_STATUS(1))
@@ -2060,7 +2060,7 @@ void intel_lt_phy_pll_disable(struct intel_encoder *encoder)
 	struct intel_display *display = to_intel_display(encoder);
 	enum phy phy = intel_encoder_to_phy(encoder);
 	enum port port = encoder->port;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u8 owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder);
 	u32 lane_pipe_reset = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES
 				? (XELPDP_LANE_PIPE_RESET(0) |
@@ -2137,7 +2137,7 @@ void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
 	struct intel_display *display = to_intel_display(encoder);
 	const struct intel_ddi_buf_trans *trans;
 	u8 owned_lane_mask;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int n_entries, ln;
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 
@@ -2222,7 +2222,7 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
 {
 	u8 owned_lane_mask;
 	u8 lane;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	int i, j, k;
 
 	pll_state->tbt_mode = intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder));
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 89aeb4fb340e..457d60863536 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -105,7 +105,7 @@ static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	wakeref = intel_display_power_get_if_enabled(display, encoder->power_domain);
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 0dcb0597879a..d10cbf69a5f8 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -940,7 +940,7 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
 {
 	struct intel_encoder *encoder;
 	struct intel_crtc *crtc;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
 
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 71cb0178c8b1..57586c78582d 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -588,7 +588,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name)
 	enum intel_display_power_domain power_domain;
 	enum intel_pipe_crc_source source;
 	enum pipe pipe = crtc->pipe;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u32 val = 0; /* shut up gcc */
 	int ret = 0;
 	bool enable;
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 69b6873a6044..2d1c293aeff6 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -462,7 +462,7 @@ vlv_sprite_get_hw_state(struct intel_plane *plane,
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
 	enum plane_id plane_id = plane->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
@@ -893,7 +893,7 @@ ivb_sprite_get_hw_state(struct intel_plane *plane,
 {
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
@@ -1233,7 +1233,7 @@ g4x_sprite_get_hw_state(struct intel_plane *plane,
 {
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index c678216af352..064f572bbc85 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -51,7 +51,7 @@ struct intel_tc_port {
 	const struct intel_tc_phy_ops *phy_ops;
 
 	struct mutex lock;	/* protects the TypeC port mode */
-	intel_wakeref_t lock_wakeref;
+	struct ref_tracker *lock_wakeref;
 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 	enum intel_display_power_domain lock_power_domain;
 #endif
@@ -182,7 +182,7 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 	       intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
 }
 
-static intel_wakeref_t
+static struct ref_tracker *
 __tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domain)
 {
 	struct intel_display *display = to_intel_display(tc->dig_port);
@@ -192,11 +192,11 @@ __tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domai
 	return intel_display_power_get(display, *domain);
 }
 
-static intel_wakeref_t
+static struct ref_tracker *
 tc_cold_block(struct intel_tc_port *tc)
 {
 	enum intel_display_power_domain domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 
 	wakeref = __tc_cold_block(tc, &domain);
 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
@@ -207,7 +207,7 @@ tc_cold_block(struct intel_tc_port *tc)
 
 static void
 __tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain,
-		  intel_wakeref_t wakeref)
+		  struct ref_tracker *wakeref)
 {
 	struct intel_display *display = to_intel_display(tc->dig_port);
 
@@ -215,7 +215,7 @@ __tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain doma
 }
 
 static void
-tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
+tc_cold_unblock(struct intel_tc_port *tc, struct ref_tracker *wakeref)
 {
 	struct intel_display __maybe_unused *display = to_intel_display(tc->dig_port);
 	enum intel_display_power_domain domain = tc_phy_cold_off_domain(tc);
@@ -625,7 +625,7 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
 static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc)
 {
 	enum intel_display_power_domain domain;
-	intel_wakeref_t tc_cold_wref;
+	struct ref_tracker *tc_cold_wref;
 
 	tc_cold_wref = __tc_cold_block(tc, &domain);
 
@@ -892,7 +892,7 @@ static void adlp_tc_phy_get_hw_state(struct intel_tc_port *tc)
 	struct intel_display *display = to_intel_display(tc->dig_port);
 	enum intel_display_power_domain port_power_domain =
 		tc_port_power_domain(tc);
-	intel_wakeref_t port_wakeref;
+	struct ref_tracker *port_wakeref;
 
 	port_wakeref = intel_display_power_get(display, port_power_domain);
 
@@ -911,7 +911,7 @@ static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
 	struct intel_display *display = to_intel_display(tc->dig_port);
 	enum intel_display_power_domain port_power_domain =
 		tc_port_power_domain(tc);
-	intel_wakeref_t port_wakeref;
+	struct ref_tracker *port_wakeref;
 
 	if (tc->mode == TC_PORT_TBT_ALT) {
 		tc->lock_wakeref = tc_cold_block(tc);
@@ -963,7 +963,7 @@ static void adlp_tc_phy_disconnect(struct intel_tc_port *tc)
 	struct intel_display *display = to_intel_display(tc->dig_port);
 	enum intel_display_power_domain port_power_domain =
 		tc_port_power_domain(tc);
-	intel_wakeref_t port_wakeref;
+	struct ref_tracker *port_wakeref;
 
 	port_wakeref = intel_display_power_get(display, port_power_domain);
 
@@ -1169,7 +1169,7 @@ static bool xelpdp_tc_phy_is_owned(struct intel_tc_port *tc)
 static void xelpdp_tc_phy_get_hw_state(struct intel_tc_port *tc)
 {
 	struct intel_display *display = to_intel_display(tc->dig_port);
-	intel_wakeref_t tc_cold_wref;
+	struct ref_tracker *tc_cold_wref;
 	enum intel_display_power_domain domain;
 
 	tc_cold_wref = __tc_cold_block(tc, &domain);
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 0e727fc5e80c..ad5fe841e4b3 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -999,7 +999,7 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	enum intel_display_power_domain power_domain;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	u32 dss_ctl1, dss_ctl2;
 
 	if (!intel_dsc_source_support(crtc_state))
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 89c8003ccfe7..0b5a1ec2f77a 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -939,7 +939,7 @@ skl_plane_get_hw_state(struct intel_plane *plane,
 	struct intel_display *display = to_intel_display(plane);
 	enum intel_display_power_domain power_domain;
 	enum plane_id plane_id = plane->id;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 7964cfffdaae..a6aab79812e5 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -718,7 +718,7 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
 	struct intel_display *display = to_intel_display(crtc);
 	enum intel_display_power_domain power_domain;
 	enum pipe pipe = crtc->pipe;
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	enum plane_id plane_id;
 
 	power_domain = POWER_DOMAIN_PIPE(pipe);
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 19bdd8662359..d705af3bf8ba 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -936,7 +936,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
-	intel_wakeref_t wakeref;
+	struct ref_tracker *wakeref;
 	enum port port;
 	bool active = false;
 
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
index 2a32faea9db5..910a8a60da64 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
@@ -3,8 +3,4 @@
  * Copyright © 2023 Intel Corporation
  */
 
-#include <linux/types.h>
-
-typedef struct ref_tracker *intel_wakeref_t;
-
 #define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
index 340f65884812..9416ec784e39 100644
--- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
+++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
@@ -5,6 +5,7 @@
 
 #include "intel_display_core.h"
 #include "intel_display_rpm.h"
+#include "intel_wakeref.h"
 #include "xe_device.h"
 #include "xe_device_types.h"
 #include "xe_pm.h"
-- 
2.47.3

Re: [PATCH v2 4/5] drm/i915/power: convert intel_wakeref_t to struct ref_tracker *

[Luca Coelho]

On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
> Under the hood, intel_wakeref_t is just struct ref_tracker *. Use the
> actual underlying type both for clarity (we *are* using intel_wakeref_t
> as a pointer though it doesn't look like one) and to help i915, xe and
> display coexistence without custom types.
> 
> v2: Keep intel_wakeref.h includes as they are
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/g4x_dp.c         |  2 +-
>  drivers/gpu/drm/i915/display/g4x_hdmi.c       |  2 +-
>  drivers/gpu/drm/i915/display/i9xx_plane.c     |  2 +-
>  drivers/gpu/drm/i915/display/icl_dsi.c        |  4 +--
>  drivers/gpu/drm/i915/display/intel_audio.c    |  6 ++--
>  drivers/gpu/drm/i915/display/intel_cdclk.c    |  4 +--
>  drivers/gpu/drm/i915/display/intel_crt.c      |  6 ++--
>  drivers/gpu/drm/i915/display/intel_cursor.c   |  4 +--
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 18 +++++-----
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 16 ++++-----
>  drivers/gpu/drm/i915/display/intel_display.c  |  8 ++---
>  .../gpu/drm/i915/display/intel_display_core.h |  2 +-
>  .../drm/i915/display/intel_display_debugfs.c  |  2 +-
>  .../drm/i915/display/intel_display_power.c    | 26 +++++++--------
>  .../drm/i915/display/intel_display_power.h    | 33 ++++++++++---------
>  .../drm/i915/display/intel_display_types.h    |  6 ++--
>  drivers/gpu/drm/i915/display/intel_dmc.c      |  2 +-
>  drivers/gpu/drm/i915/display/intel_dp_aux.c   |  2 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 18 +++++-----
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 +--
>  drivers/gpu/drm/i915/display/intel_dsi.h      |  7 ++--
>  drivers/gpu/drm/i915/display/intel_gmbus.c    |  4 +--
>  drivers/gpu/drm/i915/display/intel_hdmi.c     |  4 +--
>  drivers/gpu/drm/i915/display/intel_hotplug.c  |  2 +-
>  drivers/gpu/drm/i915/display/intel_lt_phy.c   | 14 ++++----
>  drivers/gpu/drm/i915/display/intel_lvds.c     |  2 +-
>  .../drm/i915/display/intel_modeset_setup.c    |  2 +-
>  drivers/gpu/drm/i915/display/intel_pipe_crc.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_sprite.c   |  6 ++--
>  drivers/gpu/drm/i915/display/intel_tc.c       | 22 ++++++-------
>  drivers/gpu/drm/i915/display/intel_vdsc.c     |  2 +-
>  .../drm/i915/display/skl_universal_plane.c    |  2 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c  |  2 +-
>  drivers/gpu/drm/i915/display/vlv_dsi.c        |  2 +-
>  .../xe/compat-i915-headers/intel_wakeref.h    |  4 ---
>  drivers/gpu/drm/xe/display/xe_display_rpm.c   |  1 +
>  36 files changed, 122 insertions(+), 123 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 27f4c55d7484..4cb753177fd8 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -302,7 +302,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index f6e2d1ed5639..8b22447e8e23 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -68,7 +68,7 @@ static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index 51ccc6bd5f21..6b570335f393 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -724,7 +724,7 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
>  	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  	u32 val;
>  
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 9230792960f2..dac781f54661 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1411,7 +1411,7 @@ static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
>  	enum port port;
>  
>  	for_each_dsi_port(port, intel_dsi->ports) {
> -		intel_wakeref_t wakeref;
> +		struct ref_tracker *wakeref;
>  
>  		wakeref = fetch_and_zero(&intel_dsi->io_wakeref[port]);
>  		intel_display_power_put(display,
> @@ -1722,7 +1722,7 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
>  	enum transcoder dsi_trans;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	enum port port;
>  	bool ret = false;
>  	u32 tmp;
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 5bdaef38f13d..5f3c175afdd2 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -1042,10 +1042,10 @@ int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state)
>  static unsigned long intel_audio_component_get_power(struct device *kdev)
>  {
>  	struct intel_display *display = to_intel_display(kdev);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	/* Catch potential impedance mismatches before they occur! */
> -	BUILD_BUG_ON(sizeof(intel_wakeref_t) > sizeof(unsigned long));
> +	BUILD_BUG_ON(sizeof(wakeref) > sizeof(unsigned long));
>  
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_AUDIO_PLAYBACK);
>  
> @@ -1074,7 +1074,7 @@ static void intel_audio_component_put_power(struct device *kdev,
>  					    unsigned long cookie)
>  {
>  	struct intel_display *display = to_intel_display(kdev);
> -	intel_wakeref_t wakeref = (intel_wakeref_t)cookie;
> +	struct ref_tracker *wakeref = (struct ref_tracker *)cookie;
>  
>  	/* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */
>  	if (--display->audio.power_refcount == 0)
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 5c90e53b4e46..ada08fd1447b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -667,7 +667,7 @@ static void vlv_set_cdclk(struct intel_display *display,
>  {
>  	int cdclk = cdclk_config->cdclk;
>  	u32 val, cmd = cdclk_config->voltage_level;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int ret;
>  
>  	switch (cdclk) {
> @@ -757,7 +757,7 @@ static void chv_set_cdclk(struct intel_display *display,
>  {
>  	int cdclk = cdclk_config->cdclk;
>  	u32 val, cmd = cdclk_config->voltage_level;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int ret;
>  
>  	switch (cdclk) {
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 82e89cdbe5a5..5f9a03877ea9 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -109,7 +109,7 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_crt *crt = intel_encoder_to_crt(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> @@ -847,7 +847,7 @@ intel_crt_detect(struct drm_connector *connector,
>  	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));
>  	struct intel_encoder *encoder = &crt->base;
>  	struct drm_atomic_state *state;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int status;
>  
>  	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
> @@ -936,7 +936,7 @@ static int intel_crt_get_modes(struct drm_connector *connector)
>  	struct intel_display *display = to_intel_display(connector->dev);
>  	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));
>  	struct intel_encoder *encoder = &crt->base;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	struct i2c_adapter *ddc;
>  	int ret;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index a10b2425b94d..341d1cb40295 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -324,7 +324,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
>  {
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	power_domain = POWER_DOMAIN_PIPE(PIPE_A);
> @@ -727,7 +727,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
>  {
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  	u32 val;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index 27be2a490297..7bd17723e7ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -105,11 +105,11 @@ static void intel_cx0_program_msgbus_timer(struct intel_encoder *encoder)
>   * We also do the msgbus timer programming here to ensure that the timer
>   * is already programmed before any access to the msgbus.
>   */
> -static intel_wakeref_t intel_cx0_phy_transaction_begin(struct intel_encoder *encoder)
> +static struct ref_tracker *intel_cx0_phy_transaction_begin(struct intel_encoder *encoder)
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	intel_psr_pause(intel_dp);
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
> @@ -118,7 +118,7 @@ static intel_wakeref_t intel_cx0_phy_transaction_begin(struct intel_encoder *enc
>  	return wakeref;
>  }
>  
> -static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, intel_wakeref_t wakeref)
> +static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, struct ref_tracker *wakeref)
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> @@ -476,7 +476,7 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
>  	struct intel_display *display = to_intel_display(encoder);
>  	const struct intel_ddi_buf_trans *trans;
>  	u8 owned_lane_mask;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int n_entries, ln;
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  
> @@ -2252,7 +2252,7 @@ static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder,
>  	struct intel_display *display = to_intel_display(encoder);
>  	enum phy phy = intel_encoder_to_phy(encoder);
>  	u8 lane = INTEL_CX0_LANE0;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int i;
>  
>  	cx0pll_state->use_c10 = true;
> @@ -2756,7 +2756,7 @@ static void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
>  	struct intel_c20pll_state *pll_state = &cx0pll_state->c20;
>  	struct intel_display *display = to_intel_display(encoder);
>  	bool cntx;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int i;
>  
>  	cx0pll_state->use_c10 = false;
> @@ -3225,7 +3225,7 @@ static void intel_cx0pll_enable(struct intel_encoder *encoder,
>  	bool lane_reversal = dig_port->lane_reversal;
>  	u8 maxpclk_lane = lane_reversal ? INTEL_CX0_LANE1 :
>  					  INTEL_CX0_LANE0;
> -	intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);
> +	struct ref_tracker *wakeref = intel_cx0_phy_transaction_begin(encoder);
>  
>  	/*
>  	 * Lane reversal is never used in DP-alt mode, in that case the
> @@ -3463,7 +3463,7 @@ void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
>  				 const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display = to_intel_display(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int i;
>  	u8 owned_lane_mask;
>  
> @@ -3510,7 +3510,7 @@ static void intel_cx0pll_disable(struct intel_encoder *encoder)
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	enum phy phy = intel_encoder_to_phy(encoder);
> -	intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);
> +	struct ref_tracker *wakeref = intel_cx0_phy_transaction_begin(encoder);
>  
>  	/* 1. Change owned PHY lane power to Disable state. */
>  	intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index ed9798b0ec00..8158f9829ddf 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -728,7 +728,7 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
>  			       bool enable, u32 hdcp_mask)
>  {
>  	struct intel_display *display = to_intel_display(intel_encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int ret = 0;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> @@ -749,7 +749,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>  	int type = intel_connector->base.connector_type;
>  	enum port port = encoder->port;
>  	enum transcoder cpu_transcoder;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	enum pipe pipe = 0;
>  	u32 ddi_mode;
>  	bool ret;
> @@ -805,7 +805,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	enum port port = encoder->port;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	enum pipe p;
>  	u32 tmp;
>  	u8 mst_pipe_mask = 0, dp128b132b_pipe_mask = 0;
> @@ -848,7 +848,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
>  	for_each_pipe(display, p) {
>  		enum transcoder cpu_transcoder = (enum transcoder)p;
>  		u32 port_mask, ddi_select, ddi_mode;
> -		intel_wakeref_t trans_wakeref;
> +		struct ref_tracker *trans_wakeref;
>  
>  		trans_wakeref = intel_display_power_get_if_enabled(display,
>  								   POWER_DOMAIN_TRANSCODER(cpu_transcoder));
> @@ -1002,7 +1002,7 @@ main_link_aux_power_domain_put(struct intel_digital_port *dig_port,
>  	struct intel_display *display = to_intel_display(dig_port);
>  	enum intel_display_power_domain domain =
>  		intel_ddi_main_link_aux_domain(dig_port, crtc_state);
> -	intel_wakeref_t wf;
> +	struct ref_tracker *wf;
>  
>  	wf = fetch_and_zero(&dig_port->aux_wakeref);
>  	if (!wf)
> @@ -3130,7 +3130,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	struct intel_dp *intel_dp = &dig_port->dp;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool is_mst = intel_crtc_has_type(old_crtc_state,
>  					  INTEL_OUTPUT_DP_MST);
>  
> @@ -3198,7 +3198,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	dig_port->set_infoframes(encoder, false,
>  				 old_crtc_state, old_conn_state);
> @@ -3965,7 +3965,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
>  
>  	for_each_cpu_transcoder_masked(display, cpu_transcoder, transcoders) {
>  		enum intel_display_power_domain power_domain;
> -		intel_wakeref_t trans_wakeref;
> +		struct ref_tracker *trans_wakeref;
>  
>  		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
>  		trans_wakeref = intel_display_power_get_if_enabled(display,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 34e69b884713..62e97d725887 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -372,7 +372,7 @@ void assert_transcoder(struct intel_display *display,
>  {
>  	bool cur_state;
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	/* we keep both pipes enabled on 830 */
>  	if (display->platform.i830)
> @@ -3035,7 +3035,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
>  	struct intel_display *display = to_intel_display(crtc);
>  	enum intel_display_power_domain power_domain;
>  	enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret = false;
>  	u32 tmp;
>  
> @@ -3379,7 +3379,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
>  	struct intel_display *display = to_intel_display(crtc);
>  	enum intel_display_power_domain power_domain;
>  	enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret = false;
>  	u32 tmp;
>  
> @@ -7376,7 +7376,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>  	struct intel_crtc_state *new_crtc_state, *old_crtc_state;
>  	struct intel_crtc *crtc;
>  	struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {};
> -	intel_wakeref_t wakeref = NULL;
> +	struct ref_tracker *wakeref = NULL;
>  	int i;
>  
>  	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 9b36654b593d..5b2120afa806 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -386,7 +386,7 @@ struct intel_display {
>  
>  	struct {
>  		struct intel_dmc *dmc;
> -		intel_wakeref_t wakeref;
> +		struct ref_tracker *wakeref;
>  	} dmc;
>  
>  	struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 9bbfdae8d024..aba13e8a9051 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -86,7 +86,7 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
>  static int i915_sr_status(struct seq_file *m, void *unused)
>  {
>  	struct intel_display *display = node_to_intel_display(m->private);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool sr_enabled = false;
>  
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 08db9bbbfcb1..7cbef1a68266 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -544,8 +544,8 @@ __intel_display_power_get_domain(struct intel_display *display,
>   * Any power domain reference obtained by this function must have a symmetric
>   * call to intel_display_power_put() to release the reference again.
>   */
> -intel_wakeref_t intel_display_power_get(struct intel_display *display,
> -					enum intel_display_power_domain domain)
> +struct ref_tracker *intel_display_power_get(struct intel_display *display,
> +					    enum intel_display_power_domain domain)
>  {
>  	struct i915_power_domains *power_domains = &display->power.domains;
>  	struct ref_tracker *wakeref;
> @@ -571,7 +571,7 @@ intel_wakeref_t intel_display_power_get(struct intel_display *display,
>   * Any power domain reference obtained by this function must have a symmetric
>   * call to intel_display_power_put() to release the reference again.
>   */
> -intel_wakeref_t
> +struct ref_tracker *
>  intel_display_power_get_if_enabled(struct intel_display *display,
>  				   enum intel_display_power_domain domain)
>  {
> @@ -638,7 +638,7 @@ static void __intel_display_power_put(struct intel_display *display,
>  
>  static void
>  queue_async_put_domains_work(struct i915_power_domains *power_domains,
> -			     intel_wakeref_t wakeref,
> +			     struct ref_tracker *wakeref,
>  			     int delay_ms)
>  {
>  	struct intel_display *display = container_of(power_domains,
> @@ -740,7 +740,7 @@ intel_display_power_put_async_work(struct work_struct *work)
>   */
>  void __intel_display_power_put_async(struct intel_display *display,
>  				     enum intel_display_power_domain domain,
> -				     intel_wakeref_t wakeref,
> +				     struct ref_tracker *wakeref,
>  				     int delay_ms)
>  {
>  	struct i915_power_domains *power_domains = &display->power.domains;
> @@ -799,7 +799,7 @@ void intel_display_power_flush_work(struct intel_display *display)
>  {
>  	struct i915_power_domains *power_domains = &display->power.domains;
>  	struct intel_power_domain_mask async_put_mask;
> -	intel_wakeref_t work_wakeref;
> +	struct ref_tracker *work_wakeref;
>  
>  	mutex_lock(&power_domains->lock);
>  
> @@ -853,7 +853,7 @@ intel_display_power_flush_work_sync(struct intel_display *display)
>   */
>  void intel_display_power_put(struct intel_display *display,
>  			     enum intel_display_power_domain domain,
> -			     intel_wakeref_t wakeref)
> +			     struct ref_tracker *wakeref)
>  {
>  	__intel_display_power_put(display, domain);
>  	intel_display_rpm_put(display, wakeref);
> @@ -885,7 +885,7 @@ intel_display_power_get_in_set(struct intel_display *display,
>  			       struct intel_display_power_domain_set *power_domain_set,
>  			       enum intel_display_power_domain domain)
>  {
> -	intel_wakeref_t __maybe_unused wf;
> +	struct ref_tracker *__maybe_unused wf;
>  
>  	drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
>  
> @@ -901,7 +901,7 @@ intel_display_power_get_in_set_if_enabled(struct intel_display *display,
>  					  struct intel_display_power_domain_set *power_domain_set,
>  					  enum intel_display_power_domain domain)
>  {
> -	intel_wakeref_t wf;
> +	struct ref_tracker *wf;
>  
>  	drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
>  
> @@ -928,7 +928,7 @@ intel_display_power_put_mask_in_set(struct intel_display *display,
>  		    !bitmap_subset(mask->bits, power_domain_set->mask.bits, POWER_DOMAIN_NUM));
>  
>  	for_each_power_domain(domain, mask) {
> -		intel_wakeref_t __maybe_unused wf = INTEL_WAKEREF_DEF;
> +		struct ref_tracker *__maybe_unused wf = INTEL_WAKEREF_DEF;
>  
>  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  		wf = fetch_and_zero(&power_domain_set->wakerefs[domain]);
> @@ -2004,7 +2004,7 @@ void intel_power_domains_init_hw(struct intel_display *display, bool resume)
>   */
>  void intel_power_domains_driver_remove(struct intel_display *display)
>  {
> -	intel_wakeref_t wakeref __maybe_unused =
> +	struct ref_tracker *wakeref __maybe_unused =
>  		fetch_and_zero(&display->power.domains.init_wakeref);
>  
>  	/* Remove the refcount we took to keep power well support disabled. */
> @@ -2065,7 +2065,7 @@ void intel_power_domains_sanitize_state(struct intel_display *display)
>   */
>  void intel_power_domains_enable(struct intel_display *display)
>  {
> -	intel_wakeref_t wakeref __maybe_unused =
> +	struct ref_tracker *wakeref __maybe_unused =
>  		fetch_and_zero(&display->power.domains.init_wakeref);
>  
>  	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
> @@ -2104,7 +2104,7 @@ void intel_power_domains_disable(struct intel_display *display)
>  void intel_power_domains_suspend(struct intel_display *display, bool s2idle)
>  {
>  	struct i915_power_domains *power_domains = &display->power.domains;
> -	intel_wakeref_t wakeref __maybe_unused =
> +	struct ref_tracker *wakeref __maybe_unused =
>  		fetch_and_zero(&power_domains->init_wakeref);
>  
>  	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index 79ce8d94bf7d..6f8d921b4482 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -16,6 +16,7 @@ enum port;
>  struct i915_power_well;
>  struct intel_display;
>  struct intel_encoder;
> +struct ref_tracker;
>  struct seq_file;
>  
>  /*
> @@ -142,14 +143,14 @@ struct i915_power_domains {
>  	u32 target_dc_state;
>  	u32 allowed_dc_mask;
>  
> -	intel_wakeref_t init_wakeref;
> -	intel_wakeref_t disable_wakeref;
> +	struct ref_tracker *init_wakeref;
> +	struct ref_tracker *disable_wakeref;
>  
>  	struct mutex lock;
>  	int domain_use_count[POWER_DOMAIN_NUM];
>  
>  	struct delayed_work async_put_work;
> -	intel_wakeref_t async_put_wakeref;
> +	struct ref_tracker *async_put_wakeref;
>  	struct intel_power_domain_mask async_put_domains[2];
>  	int async_put_next_delay;
>  
> @@ -159,7 +160,7 @@ struct i915_power_domains {
>  struct intel_display_power_domain_set {
>  	struct intel_power_domain_mask mask;
>  #ifdef CONFIG_DRM_I915_DEBUG_RUNTIME_PM
> -	intel_wakeref_t wakerefs[POWER_DOMAIN_NUM];
> +	struct ref_tracker *wakerefs[POWER_DOMAIN_NUM];
>  #endif
>  };
>  
> @@ -187,24 +188,24 @@ u32 intel_display_power_get_current_dc_state(struct intel_display *display);
>  
>  bool intel_display_power_is_enabled(struct intel_display *display,
>  				    enum intel_display_power_domain domain);
> -intel_wakeref_t intel_display_power_get(struct intel_display *display,
> -					enum intel_display_power_domain domain);
> -intel_wakeref_t
> +struct ref_tracker *intel_display_power_get(struct intel_display *display,
> +					    enum intel_display_power_domain domain);
> +struct ref_tracker *
>  intel_display_power_get_if_enabled(struct intel_display *display,
>  				   enum intel_display_power_domain domain);
>  void __intel_display_power_put_async(struct intel_display *display,
>  				     enum intel_display_power_domain domain,
> -				     intel_wakeref_t wakeref,
> +				     struct ref_tracker *wakeref,
>  				     int delay_ms);
>  void intel_display_power_flush_work(struct intel_display *display);
>  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  void intel_display_power_put(struct intel_display *display,
>  			     enum intel_display_power_domain domain,
> -			     intel_wakeref_t wakeref);
> +			     struct ref_tracker *wakeref);
>  static inline void
>  intel_display_power_put_async(struct intel_display *display,
>  			      enum intel_display_power_domain domain,
> -			      intel_wakeref_t wakeref)
> +			      struct ref_tracker *wakeref)
>  {
>  	__intel_display_power_put_async(display, domain, wakeref, -1);
>  }
> @@ -212,7 +213,7 @@ intel_display_power_put_async(struct intel_display *display,
>  static inline void
>  intel_display_power_put_async_delay(struct intel_display *display,
>  				    enum intel_display_power_domain domain,
> -				    intel_wakeref_t wakeref,
> +				    struct ref_tracker *wakeref,
>  				    int delay_ms)
>  {
>  	__intel_display_power_put_async(display, domain, wakeref, delay_ms);
> @@ -224,7 +225,7 @@ void intel_display_power_put_unchecked(struct intel_display *display,
>  static inline void
>  intel_display_power_put(struct intel_display *display,
>  			enum intel_display_power_domain domain,
> -			intel_wakeref_t wakeref)
> +			struct ref_tracker *wakeref)
>  {
>  	intel_display_power_put_unchecked(display, domain);
>  }
> @@ -232,7 +233,7 @@ intel_display_power_put(struct intel_display *display,
>  static inline void
>  intel_display_power_put_async(struct intel_display *display,
>  			      enum intel_display_power_domain domain,
> -			      intel_wakeref_t wakeref)
> +			      struct ref_tracker *wakeref)
>  {
>  	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, -1);
>  }
> @@ -240,7 +241,7 @@ intel_display_power_put_async(struct intel_display *display,
>  static inline void
>  intel_display_power_put_async_delay(struct intel_display *display,
>  				    enum intel_display_power_domain domain,
> -				    intel_wakeref_t wakeref,
> +				    struct ref_tracker *wakeref,
>  				    int delay_ms)
>  {
>  	__intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, delay_ms);
> @@ -298,14 +299,14 @@ void gen9_dbuf_slices_update(struct intel_display *display,
>  			     u8 req_slices);
>  
>  #define __with_intel_display_power(display, domain, wf) \
> -	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
> +	for (struct ref_tracker *(wf) = intel_display_power_get((display), (domain)); (wf); \
>  	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
>  
>  #define with_intel_display_power(display, domain) \
>  	__with_intel_display_power(display, domain, __UNIQUE_ID(wakeref))
>  
>  #define __with_intel_display_power_if_enabled(display, domain, wf) \
> -	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
> +	for (struct ref_tracker *(wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
>  	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
>  
>  #define with_intel_display_power_if_enabled(display, domain) \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 38702a9e0f50..ed0f7448e6cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1658,7 +1658,7 @@ struct intel_pps {
>  	unsigned long last_power_on;
>  	unsigned long last_backlight_off;
>  	ktime_t panel_power_off_time;
> -	intel_wakeref_t vdd_wakeref;
> +	struct ref_tracker *vdd_wakeref;
>  
>  	union {
>  		/*
> @@ -1940,8 +1940,8 @@ struct intel_digital_port {
>  	/* Used for DP and ICL+ TypeC/DP and TypeC/HDMI ports. */
>  	enum aux_ch aux_ch;
>  	enum intel_display_power_domain ddi_io_power_domain;
> -	intel_wakeref_t ddi_io_wakeref;
> -	intel_wakeref_t aux_wakeref;
> +	struct ref_tracker *ddi_io_wakeref;
> +	struct ref_tracker *aux_wakeref;
>  
>  	struct intel_tc_port *tc;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 6ebbd97e6351..2fb6fec6dc99 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -1322,7 +1322,7 @@ static void intel_dmc_runtime_pm_get(struct intel_display *display)
>  
>  static void intel_dmc_runtime_pm_put(struct intel_display *display)
>  {
> -	intel_wakeref_t wakeref __maybe_unused =
> +	struct ref_tracker *wakeref __maybe_unused =
>  		fetch_and_zero(&display->dmc.wakeref);
>  
>  	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 38e03f3efac5..51b3a168ec33 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -245,7 +245,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>  	i915_reg_t ch_ctl, ch_data[5];
>  	u32 aux_clock_divider;
>  	enum intel_display_power_domain aux_domain;
> -	intel_wakeref_t aux_wakeref;
> +	struct ref_tracker *aux_wakeref;
>  	struct ref_tracker *pps_wakeref = NULL;
>  	int i, ret, recv_bytes;
>  	int try, clock = 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index e0e5e5f65d19..9aa84a430f09 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -547,7 +547,7 @@ static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
>  {
>  	struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
>  	const enum intel_dpll_id id = pll->info->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u32 val;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> @@ -768,7 +768,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
>  {
>  	struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
>  	const enum intel_dpll_id id = pll->info->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u32 val;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> @@ -789,7 +789,7 @@ static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
>  				      struct intel_dpll_hw_state *dpll_hw_state)
>  {
>  	struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u32 val;
>  
>  	wakeref = intel_display_power_get_if_enabled(display,
> @@ -1447,7 +1447,7 @@ static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
>  	struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
>  	const struct skl_dpll_regs *regs = skl_dpll_regs;
>  	const enum intel_dpll_id id = pll->info->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  	u32 val;
>  
> @@ -1485,7 +1485,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
>  	struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
>  	const struct skl_dpll_regs *regs = skl_dpll_regs;
>  	const enum intel_dpll_id id = pll->info->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u32 val;
>  	bool ret;
>  
> @@ -2188,7 +2188,7 @@ static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
>  {
>  	struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
>  	enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	enum dpio_phy phy;
>  	enum dpio_channel ch;
>  	u32 val;
> @@ -3598,7 +3598,7 @@ static bool mg_pll_get_hw_state(struct intel_display *display,
>  	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
>  	const enum intel_dpll_id id = pll->info->id;
>  	enum tc_port tc_port = icl_pll_id_to_tc_port(id);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret = false;
>  	u32 val;
>  
> @@ -3665,7 +3665,7 @@ static bool dkl_pll_get_hw_state(struct intel_display *display,
>  	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
>  	const enum intel_dpll_id id = pll->info->id;
>  	enum tc_port tc_port = icl_pll_id_to_tc_port(id);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret = false;
>  	u32 val;
>  
> @@ -3737,7 +3737,7 @@ static bool icl_pll_get_hw_state(struct intel_display *display,
>  {
>  	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
>  	const enum intel_dpll_id id = pll->info->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret = false;
>  	u32 val;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 322af5c55d7c..5b71c860515f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -28,7 +28,6 @@
>  #include <linux/types.h>
>  
>  #include "intel_display_power.h"
> -#include "intel_wakeref.h"
>  
>  #define for_each_dpll(__display, __pll, __i) \
>  	for ((__i) = 0; (__i) < (__display)->dpll.num_dpll && \
> @@ -42,6 +41,7 @@ struct intel_crtc_state;
>  struct intel_dpll_funcs;
>  struct intel_encoder;
>  struct intel_shared_dpll;
> +struct ref_tracker;
>  
>  /**
>   * enum intel_dpll_id - possible DPLL ids
> @@ -396,7 +396,7 @@ struct intel_dpll {
>  	 * @wakeref: In some platforms a device-level runtime pm reference may
>  	 * need to be grabbed to disable DC states while this DPLL is enabled
>  	 */
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  };
>  
>  #define SKL_DPLL0 0
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
> index 89c7166a3860..489d26ffd235 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> @@ -29,6 +29,9 @@
>  
>  #include "intel_display_types.h"
>  
> +struct intel_dsi_host;
> +struct ref_tracker;
> +
>  #define INTEL_DSI_VIDEO_MODE	0
>  #define INTEL_DSI_COMMAND_MODE	1
>  
> @@ -37,13 +40,11 @@
>  #define DSI_DUAL_LINK_FRONT_BACK	1
>  #define DSI_DUAL_LINK_PIXEL_ALT		2
>  
> -struct intel_dsi_host;
> -
>  struct intel_dsi {
>  	struct intel_encoder base;
>  
>  	struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
> -	intel_wakeref_t io_wakeref[I915_MAX_PORTS];
> +	struct ref_tracker *io_wakeref[I915_MAX_PORTS];
>  
>  	/* GPIO Desc for panel and backlight control */
>  	struct gpio_desc *gpio_panel;
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index acc85853b2a7..2caff677600c 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -789,7 +789,7 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
>  {
>  	struct intel_gmbus *bus = to_intel_gmbus(adapter);
>  	struct intel_display *display = bus->display;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int ret;
>  
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
> @@ -829,7 +829,7 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
>  			.buf = buf,
>  		}
>  	};
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int ret;
>  
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 908faf17f93d..055e68810d0d 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2518,7 +2518,7 @@ intel_hdmi_set_edid(struct drm_connector *_connector)
>  	struct intel_display *display = to_intel_display(connector);
>  	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
>  	struct i2c_adapter *ddc = connector->base.ddc;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	const struct drm_edid *drm_edid;
>  	bool connected = false;
>  
> @@ -2561,7 +2561,7 @@ intel_hdmi_detect(struct drm_connector *_connector, bool force)
>  	enum drm_connector_status status = connector_status_disconnected;
>  	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
>  	struct intel_encoder *encoder = &hdmi_to_dig_port(intel_hdmi)->base;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
>  		    connector->base.base.id, connector->base.name);
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 7575a063f7be..970aa95ee344 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -785,7 +785,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
>  		container_of(work, typeof(*display), hotplug.poll_init_work);
>  	struct drm_connector_list_iter conn_iter;
>  	struct intel_connector *connector;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool enabled;
>  
>  	mutex_lock(&display->drm->mode_config.mutex);
> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index aaf5a2433690..939c8975fd4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -1324,11 +1324,11 @@ intel_lt_phy_config_changed(struct intel_encoder *encoder,
>  	return true;
>  }
>  
> -static intel_wakeref_t intel_lt_phy_transaction_begin(struct intel_encoder *encoder)
> +static struct ref_tracker *intel_lt_phy_transaction_begin(struct intel_encoder *encoder)
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	intel_psr_pause(intel_dp);
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
> @@ -1336,7 +1336,7 @@ static intel_wakeref_t intel_lt_phy_transaction_begin(struct intel_encoder *enco
>  	return wakeref;
>  }
>  
> -static void intel_lt_phy_transaction_end(struct intel_encoder *encoder, intel_wakeref_t wakeref)
> +static void intel_lt_phy_transaction_end(struct intel_encoder *encoder, struct ref_tracker *wakeref)
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> @@ -1932,7 +1932,7 @@ void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
>  	u8 owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder);
>  	enum phy phy = intel_encoder_to_phy(encoder);
>  	enum port port = encoder->port;
> -	intel_wakeref_t wakeref = 0;
> +	struct ref_tracker *wakeref = 0;
>  	u32 lane_phy_pulse_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES
>  					? (XE3PLPDP_LANE_PHY_PULSE_STATUS(0) |
>  					   XE3PLPDP_LANE_PHY_PULSE_STATUS(1))
> @@ -2060,7 +2060,7 @@ void intel_lt_phy_pll_disable(struct intel_encoder *encoder)
>  	struct intel_display *display = to_intel_display(encoder);
>  	enum phy phy = intel_encoder_to_phy(encoder);
>  	enum port port = encoder->port;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u8 owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder);
>  	u32 lane_pipe_reset = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES
>  				? (XELPDP_LANE_PIPE_RESET(0) |
> @@ -2137,7 +2137,7 @@ void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
>  	struct intel_display *display = to_intel_display(encoder);
>  	const struct intel_ddi_buf_trans *trans;
>  	u8 owned_lane_mask;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int n_entries, ln;
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  
> @@ -2222,7 +2222,7 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
>  {
>  	u8 owned_lane_mask;
>  	u8 lane;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	int i, j, k;
>  
>  	pll_state->tbt_mode = intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder));
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 89aeb4fb340e..457d60863536 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -105,7 +105,7 @@ static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	wakeref = intel_display_power_get_if_enabled(display, encoder->power_domain);
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index 0dcb0597879a..d10cbf69a5f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -940,7 +940,7 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
>  {
>  	struct intel_encoder *encoder;
>  	struct intel_crtc *crtc;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> index 71cb0178c8b1..57586c78582d 100644
> --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> @@ -588,7 +588,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name)
>  	enum intel_display_power_domain power_domain;
>  	enum intel_pipe_crc_source source;
>  	enum pipe pipe = crtc->pipe;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u32 val = 0; /* shut up gcc */
>  	int ret = 0;
>  	bool enable;
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 69b6873a6044..2d1c293aeff6 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -462,7 +462,7 @@ vlv_sprite_get_hw_state(struct intel_plane *plane,
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
>  	enum plane_id plane_id = plane->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
> @@ -893,7 +893,7 @@ ivb_sprite_get_hw_state(struct intel_plane *plane,
>  {
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
> @@ -1233,7 +1233,7 @@ g4x_sprite_get_hw_state(struct intel_plane *plane,
>  {
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index c678216af352..064f572bbc85 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -51,7 +51,7 @@ struct intel_tc_port {
>  	const struct intel_tc_phy_ops *phy_ops;
>  
>  	struct mutex lock;	/* protects the TypeC port mode */
> -	intel_wakeref_t lock_wakeref;
> +	struct ref_tracker *lock_wakeref;
>  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  	enum intel_display_power_domain lock_power_domain;
>  #endif
> @@ -182,7 +182,7 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
>  	       intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
>  }
>  
> -static intel_wakeref_t
> +static struct ref_tracker *
>  __tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domain)
>  {
>  	struct intel_display *display = to_intel_display(tc->dig_port);
> @@ -192,11 +192,11 @@ __tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domai
>  	return intel_display_power_get(display, *domain);
>  }
>  
> -static intel_wakeref_t
> +static struct ref_tracker *
>  tc_cold_block(struct intel_tc_port *tc)
>  {
>  	enum intel_display_power_domain domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  
>  	wakeref = __tc_cold_block(tc, &domain);
>  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> @@ -207,7 +207,7 @@ tc_cold_block(struct intel_tc_port *tc)
>  
>  static void
>  __tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain,
> -		  intel_wakeref_t wakeref)
> +		  struct ref_tracker *wakeref)
>  {
>  	struct intel_display *display = to_intel_display(tc->dig_port);
>  
> @@ -215,7 +215,7 @@ __tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain doma
>  }
>  
>  static void
> -tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
> +tc_cold_unblock(struct intel_tc_port *tc, struct ref_tracker *wakeref)
>  {
>  	struct intel_display __maybe_unused *display = to_intel_display(tc->dig_port);
>  	enum intel_display_power_domain domain = tc_phy_cold_off_domain(tc);
> @@ -625,7 +625,7 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
>  static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc)
>  {
>  	enum intel_display_power_domain domain;
> -	intel_wakeref_t tc_cold_wref;
> +	struct ref_tracker *tc_cold_wref;
>  
>  	tc_cold_wref = __tc_cold_block(tc, &domain);
>  
> @@ -892,7 +892,7 @@ static void adlp_tc_phy_get_hw_state(struct intel_tc_port *tc)
>  	struct intel_display *display = to_intel_display(tc->dig_port);
>  	enum intel_display_power_domain port_power_domain =
>  		tc_port_power_domain(tc);
> -	intel_wakeref_t port_wakeref;
> +	struct ref_tracker *port_wakeref;
>  
>  	port_wakeref = intel_display_power_get(display, port_power_domain);
>  
> @@ -911,7 +911,7 @@ static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
>  	struct intel_display *display = to_intel_display(tc->dig_port);
>  	enum intel_display_power_domain port_power_domain =
>  		tc_port_power_domain(tc);
> -	intel_wakeref_t port_wakeref;
> +	struct ref_tracker *port_wakeref;
>  
>  	if (tc->mode == TC_PORT_TBT_ALT) {
>  		tc->lock_wakeref = tc_cold_block(tc);
> @@ -963,7 +963,7 @@ static void adlp_tc_phy_disconnect(struct intel_tc_port *tc)
>  	struct intel_display *display = to_intel_display(tc->dig_port);
>  	enum intel_display_power_domain port_power_domain =
>  		tc_port_power_domain(tc);
> -	intel_wakeref_t port_wakeref;
> +	struct ref_tracker *port_wakeref;
>  
>  	port_wakeref = intel_display_power_get(display, port_power_domain);
>  
> @@ -1169,7 +1169,7 @@ static bool xelpdp_tc_phy_is_owned(struct intel_tc_port *tc)
>  static void xelpdp_tc_phy_get_hw_state(struct intel_tc_port *tc)
>  {
>  	struct intel_display *display = to_intel_display(tc->dig_port);
> -	intel_wakeref_t tc_cold_wref;
> +	struct ref_tracker *tc_cold_wref;
>  	enum intel_display_power_domain domain;
>  
>  	tc_cold_wref = __tc_cold_block(tc, &domain);
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 0e727fc5e80c..ad5fe841e4b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -999,7 +999,7 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	enum intel_display_power_domain power_domain;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	u32 dss_ctl1, dss_ctl2;
>  
>  	if (!intel_dsc_source_support(crtc_state))
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 89c8003ccfe7..0b5a1ec2f77a 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -939,7 +939,7 @@ skl_plane_get_hw_state(struct intel_plane *plane,
>  	struct intel_display *display = to_intel_display(plane);
>  	enum intel_display_power_domain power_domain;
>  	enum plane_id plane_id = plane->id;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	bool ret;
>  
>  	power_domain = POWER_DOMAIN_PIPE(plane->pipe);
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 7964cfffdaae..a6aab79812e5 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -718,7 +718,7 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
>  	struct intel_display *display = to_intel_display(crtc);
>  	enum intel_display_power_domain power_domain;
>  	enum pipe pipe = crtc->pipe;
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	enum plane_id plane_id;
>  
>  	power_domain = POWER_DOMAIN_PIPE(pipe);
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 19bdd8662359..d705af3bf8ba 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -936,7 +936,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
>  {
>  	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> -	intel_wakeref_t wakeref;
> +	struct ref_tracker *wakeref;
>  	enum port port;
>  	bool active = false;
>  
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> index 2a32faea9db5..910a8a60da64 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> @@ -3,8 +3,4 @@
>   * Copyright © 2023 Intel Corporation
>   */
>  
> -#include <linux/types.h>
> -
> -typedef struct ref_tracker *intel_wakeref_t;
> -
>  #define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
> diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
> index 340f65884812..9416ec784e39 100644
> --- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
> +++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
> @@ -5,6 +5,7 @@
>  
>  #include "intel_display_core.h"
>  #include "intel_display_rpm.h"
> +#include "intel_wakeref.h"

Just to be sure this is not a stray change, why did you add it here?


>  #include "xe_device.h"
>  #include "xe_device_types.h"
>  #include "xe_pm.h"

Regardless:

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

Re: [PATCH v2 4/5] drm/i915/power: convert intel_wakeref_t to struct ref_tracker *

[Jani Nikula]

On Mon, 01 Dec 2025, Luca Coelho <luca@coelho.fi> wrote:
> On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
>> diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
>> index 340f65884812..9416ec784e39 100644
>> --- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
>> +++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
>> @@ -5,6 +5,7 @@
>>  
>>  #include "intel_display_core.h"
>>  #include "intel_display_rpm.h"
>> +#include "intel_wakeref.h"
>
> Just to be sure this is not a stray change, why did you add it here?

I was pretty sure it was required, maybe depending on some kconfig,
because the include is being removed in some other places, but I can't
reproduce the fail now.

I'd say not a huge problem because it's being removed in the next patch
no matter what.

BR,
Jani.


>
>
>>  #include "xe_device.h"
>>  #include "xe_device_types.h"
>>  #include "xe_pm.h"
>
> Regardless:
>
> Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
>
> --
> Cheers,
> Luca.

-- 
Jani Nikula, Intel

Re: [PATCH v2 4/5] drm/i915/power: convert intel_wakeref_t to struct ref_tracker *

[Luca Coelho]

On Mon, 2025-12-01 at 14:25 +0200, Jani Nikula wrote:
> On Mon, 01 Dec 2025, Luca Coelho <luca@coelho.fi> wrote:
> > On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
> > > diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
> > > index 340f65884812..9416ec784e39 100644
> > > --- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
> > > +++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
> > > @@ -5,6 +5,7 @@
> > >  
> > >  #include "intel_display_core.h"
> > >  #include "intel_display_rpm.h"
> > > +#include "intel_wakeref.h"
> > 
> > Just to be sure this is not a stray change, why did you add it here?
> 
> I was pretty sure it was required, maybe depending on some kconfig,
> because the include is being removed in some other places, but I can't
> reproduce the fail now.
> 
> I'd say not a huge problem because it's being removed in the next patch
> no matter what.

Makes sense.  Thanks for the clarification. :)

--
Cheers,
Luca.

Re: [PATCH v2 4/5] drm/i915/power: convert intel_wakeref_t to struct ref_tracker *

[Jani Nikula]

On Mon, 01 Dec 2025, Luca Coelho <luca@coelho.fi> wrote:
> On Mon, 2025-12-01 at 14:25 +0200, Jani Nikula wrote:
>> On Mon, 01 Dec 2025, Luca Coelho <luca@coelho.fi> wrote:
>> > On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
>> > > diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
>> > > index 340f65884812..9416ec784e39 100644
>> > > --- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
>> > > +++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
>> > > @@ -5,6 +5,7 @@
>> > >  
>> > >  #include "intel_display_core.h"
>> > >  #include "intel_display_rpm.h"
>> > > +#include "intel_wakeref.h"
>> > 
>> > Just to be sure this is not a stray change, why did you add it here?
>> 
>> I was pretty sure it was required, maybe depending on some kconfig,
>> because the include is being removed in some other places, but I can't
>> reproduce the fail now.
>> 
>> I'd say not a huge problem because it's being removed in the next patch
>> no matter what.
>
> Makes sense.  Thanks for the clarification. :)

Thanks for the review, pushed the series to din.

BR,
Jani.

-- 
Jani Nikula, Intel

[PATCH v2 5/5] drm/{i915,xe}/display: drop intel_wakeref.h usage

[Jani Nikula]

Drop the display dependency on intel_wakeref.h header. The contract in
the parent interface is that -ENOENT means there's no tracking. It
doesn't actually require us to use a shared macro for it. Duplicate the
macro in the few places that need this instead of inlining, primarily
for documentation reasons.

This allows us to remove the xe compat intel_wakeref.h header.

v2: Define INTEL_WAKEREF_DEF in intel_display_power.h

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.h     | 5 +++--
 drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h | 6 ------
 drivers/gpu/drm/xe/display/xe_display_rpm.c            | 4 +++-
 3 files changed, 6 insertions(+), 9 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 6f8d921b4482..d616d5d09cbe 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -9,8 +9,6 @@
 #include <linux/mutex.h>
 #include <linux/workqueue.h>
 
-#include "intel_wakeref.h"
-
 enum aux_ch;
 enum port;
 struct i915_power_well;
@@ -19,6 +17,9 @@ struct intel_encoder;
 struct ref_tracker;
 struct seq_file;
 
+/* -ENOENT means we got the ref, but there's no tracking */
+#define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
+
 /*
  * Keep the pipe, transcoder, port (DDI_LANES,DDI_IO,AUX) domain instances
  * consecutive, so that the pipe,transcoder,port -> power domain macros
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
deleted file mode 100644
index 910a8a60da64..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
index 9416ec784e39..b3db40035499 100644
--- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
+++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
@@ -5,11 +5,13 @@
 
 #include "intel_display_core.h"
 #include "intel_display_rpm.h"
-#include "intel_wakeref.h"
 #include "xe_device.h"
 #include "xe_device_types.h"
 #include "xe_pm.h"
 
+/* -ENOENT means we got the ref, but there's no tracking */
+#define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
+
 static struct ref_tracker *xe_display_rpm_get(const struct drm_device *drm)
 {
 	return xe_pm_runtime_resume_and_get(to_xe_device(drm)) ? INTEL_WAKEREF_DEF : NULL;
-- 
2.47.3

Re: [PATCH v2 5/5] drm/{i915,xe}/display: drop intel_wakeref.h usage

[Luca Coelho]

On Tue, 2025-11-25 at 15:24 +0200, Jani Nikula wrote:
> Drop the display dependency on intel_wakeref.h header. The contract in
> the parent interface is that -ENOENT means there's no tracking. It
> doesn't actually require us to use a shared macro for it. Duplicate the
> macro in the few places that need this instead of inlining, primarily
> for documentation reasons.
> 
> This allows us to remove the xe compat intel_wakeref.h header.
> 
> v2: Define INTEL_WAKEREF_DEF in intel_display_power.h
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.h     | 5 +++--
>  drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h | 6 ------
>  drivers/gpu/drm/xe/display/xe_display_rpm.c            | 4 +++-
>  3 files changed, 6 insertions(+), 9 deletions(-)
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index 6f8d921b4482..d616d5d09cbe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -9,8 +9,6 @@
>  #include <linux/mutex.h>
>  #include <linux/workqueue.h>
>  
> -#include "intel_wakeref.h"
> -
>  enum aux_ch;
>  enum port;
>  struct i915_power_well;
> @@ -19,6 +17,9 @@ struct intel_encoder;
>  struct ref_tracker;
>  struct seq_file;
>  
> +/* -ENOENT means we got the ref, but there's no tracking */
> +#define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
> +
>  /*
>   * Keep the pipe, transcoder, port (DDI_LANES,DDI_IO,AUX) domain instances
>   * consecutive, so that the pipe,transcoder,port -> power domain macros
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> deleted file mode 100644
> index 910a8a60da64..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
> diff --git a/drivers/gpu/drm/xe/display/xe_display_rpm.c b/drivers/gpu/drm/xe/display/xe_display_rpm.c
> index 9416ec784e39..b3db40035499 100644
> --- a/drivers/gpu/drm/xe/display/xe_display_rpm.c
> +++ b/drivers/gpu/drm/xe/display/xe_display_rpm.c
> @@ -5,11 +5,13 @@
>  
>  #include "intel_display_core.h"
>  #include "intel_display_rpm.h"
> -#include "intel_wakeref.h"
>  #include "xe_device.h"
>  #include "xe_device_types.h"
>  #include "xe_pm.h"
>  
> +/* -ENOENT means we got the ref, but there's no tracking */
> +#define INTEL_WAKEREF_DEF ERR_PTR(-ENOENT)
> +
>  static struct ref_tracker *xe_display_rpm_get(const struct drm_device *drm)
>  {
>  	return xe_pm_runtime_resume_and_get(to_xe_device(drm)) ? INTEL_WAKEREF_DEF : NULL;

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

✗ CI.checkpatch: warning for drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)
URL   : https://patchwork.freedesktop.org/series/157907/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
2de9a3901bc28757c7906b454717b64e2a214021
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit af7518077349632a17ab35612a175f80ffbb2799
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Tue Nov 25 15:24:43 2025 +0200

    drm/{i915,xe}/display: drop intel_wakeref.h usage
    
    Drop the display dependency on intel_wakeref.h header. The contract in
    the parent interface is that -ENOENT means there's no tracking. It
    doesn't actually require us to use a shared macro for it. Duplicate the
    macro in the few places that need this instead of inlining, primarily
    for documentation reasons.
    
    This allows us to remove the xe compat intel_wakeref.h header.
    
    v2: Define INTEL_WAKEREF_DEF in intel_display_power.h
    
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 8052b0ba2e97387477c22ba816fabca9a4728aae drm-intel
bb4089bb7d89 drm/i915/pps: drop wakeref parameter from with_intel_pps_lock()
-:266: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dp' - possible side-effects?
#266: FILE: drivers/gpu/drm/i915/display/intel_pps.h:23:
+#define __with_intel_pps_lock(dp, wf) \
+	for (intel_wakeref_t (wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))

-:266: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#266: FILE: drivers/gpu/drm/i915/display/intel_pps.h:23:
+#define __with_intel_pps_lock(dp, wf) \
+	for (intel_wakeref_t (wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))

total: 0 errors, 0 warnings, 2 checks, 228 lines checked
84caf63709af drm/i915/pps: convert intel_wakeref_t to struct ref_tracker *
-:78: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#78: FILE: drivers/gpu/drm/i915/display/intel_pps.h:23:
+	for (struct ref_tracker *(wf) = intel_pps_lock(dp); (wf); (wf) = intel_pps_unlock((dp), (wf)))

total: 0 errors, 1 warnings, 0 checks, 53 lines checked
df99bfcd6101 drm/i915/power: drop wakeref parameter from with_intel_display_power*()
-:112: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#112: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:300:
+#define __with_intel_display_power(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)

-:112: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain' - possible side-effects?
#112: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:300:
+#define __with_intel_display_power(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)

-:112: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#112: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:300:
+#define __with_intel_display_power(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)

-:121: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#121: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:307:
+#define __with_intel_display_power_if_enabled(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)

-:121: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain' - possible side-effects?
#121: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:307:
+#define __with_intel_display_power_if_enabled(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)

-:121: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#121: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:307:
+#define __with_intel_display_power_if_enabled(display, domain, wf) \
+	for (intel_wakeref_t (wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
 	     intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)

total: 0 errors, 0 warnings, 6 checks, 182 lines checked
21f98cd74483 drm/i915/power: convert intel_wakeref_t to struct ref_tracker *
-:201: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#201: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:121:
+static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, struct ref_tracker *wakeref)

-:634: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#634: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:309:
+	for (struct ref_tracker *(wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \

total: 0 errors, 2 warnings, 0 checks, 929 lines checked
af7518077349 drm/{i915,xe}/display: drop intel_wakeref.h usage
-:42: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 31 lines checked

✓ CI.KUnit: success for drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)
URL   : https://patchwork.freedesktop.org/series/157907/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:07:46] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:07:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:08:22] Starting KUnit Kernel (1/1)...
[20:08:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:08:22] ================== guc_buf (11 subtests) ===================
[20:08:22] [PASSED] test_smallest
[20:08:22] [PASSED] test_largest
[20:08:22] [PASSED] test_granular
[20:08:22] [PASSED] test_unique
[20:08:22] [PASSED] test_overlap
[20:08:22] [PASSED] test_reusable
[20:08:22] [PASSED] test_too_big
[20:08:22] [PASSED] test_flush
[20:08:22] [PASSED] test_lookup
[20:08:22] [PASSED] test_data
[20:08:22] [PASSED] test_class
[20:08:22] ===================== [PASSED] guc_buf =====================
[20:08:22] =================== guc_dbm (7 subtests) ===================
[20:08:22] [PASSED] test_empty
[20:08:22] [PASSED] test_default
[20:08:22] ======================== test_size  ========================
[20:08:22] [PASSED] 4
[20:08:22] [PASSED] 8
[20:08:22] [PASSED] 32
[20:08:22] [PASSED] 256
[20:08:22] ==================== [PASSED] test_size ====================
[20:08:22] ======================= test_reuse  ========================
[20:08:22] [PASSED] 4
[20:08:22] [PASSED] 8
[20:08:22] [PASSED] 32
[20:08:22] [PASSED] 256
[20:08:22] =================== [PASSED] test_reuse ====================
[20:08:22] =================== test_range_overlap  ====================
[20:08:22] [PASSED] 4
[20:08:22] [PASSED] 8
[20:08:22] [PASSED] 32
[20:08:22] [PASSED] 256
[20:08:22] =============== [PASSED] test_range_overlap ================
[20:08:22] =================== test_range_compact  ====================
[20:08:22] [PASSED] 4
[20:08:22] [PASSED] 8
[20:08:22] [PASSED] 32
[20:08:22] [PASSED] 256
[20:08:22] =============== [PASSED] test_range_compact ================
[20:08:22] ==================== test_range_spare  =====================
[20:08:22] [PASSED] 4
[20:08:22] [PASSED] 8
[20:08:22] [PASSED] 32
[20:08:22] [PASSED] 256
[20:08:22] ================ [PASSED] test_range_spare =================
[20:08:22] ===================== [PASSED] guc_dbm =====================
[20:08:22] =================== guc_idm (6 subtests) ===================
[20:08:22] [PASSED] bad_init
[20:08:22] [PASSED] no_init
[20:08:22] [PASSED] init_fini
[20:08:22] [PASSED] check_used
[20:08:22] [PASSED] check_quota
[20:08:22] [PASSED] check_all
[20:08:22] ===================== [PASSED] guc_idm =====================
[20:08:22] ================== no_relay (3 subtests) ===================
[20:08:22] [PASSED] xe_drops_guc2pf_if_not_ready
[20:08:22] [PASSED] xe_drops_guc2vf_if_not_ready
[20:08:22] [PASSED] xe_rejects_send_if_not_ready
[20:08:22] ==================== [PASSED] no_relay =====================
[20:08:22] ================== pf_relay (14 subtests) ==================
[20:08:22] [PASSED] pf_rejects_guc2pf_too_short
[20:08:22] [PASSED] pf_rejects_guc2pf_too_long
[20:08:22] [PASSED] pf_rejects_guc2pf_no_payload
[20:08:22] [PASSED] pf_fails_no_payload
[20:08:22] [PASSED] pf_fails_bad_origin
[20:08:22] [PASSED] pf_fails_bad_type
[20:08:22] [PASSED] pf_txn_reports_error
[20:08:22] [PASSED] pf_txn_sends_pf2guc
[20:08:22] [PASSED] pf_sends_pf2guc
[20:08:22] [SKIPPED] pf_loopback_nop
[20:08:22] [SKIPPED] pf_loopback_echo
[20:08:22] [SKIPPED] pf_loopback_fail
[20:08:22] [SKIPPED] pf_loopback_busy
[20:08:22] [SKIPPED] pf_loopback_retry
[20:08:22] ==================== [PASSED] pf_relay =====================
[20:08:22] ================== vf_relay (3 subtests) ===================
[20:08:22] [PASSED] vf_rejects_guc2vf_too_short
[20:08:22] [PASSED] vf_rejects_guc2vf_too_long
[20:08:22] [PASSED] vf_rejects_guc2vf_no_payload
[20:08:22] ==================== [PASSED] vf_relay =====================
[20:08:22] ================ pf_gt_config (6 subtests) =================
[20:08:22] [PASSED] fair_contexts_1vf
[20:08:22] [PASSED] fair_doorbells_1vf
[20:08:22] [PASSED] fair_ggtt_1vf
[20:08:22] ====================== fair_contexts  ======================
[20:08:22] [PASSED] 1 VF
[20:08:22] [PASSED] 2 VFs
[20:08:22] [PASSED] 3 VFs
[20:08:22] [PASSED] 4 VFs
[20:08:22] [PASSED] 5 VFs
[20:08:22] [PASSED] 6 VFs
[20:08:22] [PASSED] 7 VFs
[20:08:22] [PASSED] 8 VFs
[20:08:22] [PASSED] 9 VFs
[20:08:22] [PASSED] 10 VFs
[20:08:22] [PASSED] 11 VFs
[20:08:22] [PASSED] 12 VFs
[20:08:22] [PASSED] 13 VFs
[20:08:22] [PASSED] 14 VFs
[20:08:22] [PASSED] 15 VFs
[20:08:22] [PASSED] 16 VFs
[20:08:22] [PASSED] 17 VFs
[20:08:22] [PASSED] 18 VFs
[20:08:22] [PASSED] 19 VFs
[20:08:22] [PASSED] 20 VFs
[20:08:22] [PASSED] 21 VFs
[20:08:22] [PASSED] 22 VFs
[20:08:22] [PASSED] 23 VFs
[20:08:22] [PASSED] 24 VFs
[20:08:22] [PASSED] 25 VFs
[20:08:22] [PASSED] 26 VFs
[20:08:22] [PASSED] 27 VFs
[20:08:22] [PASSED] 28 VFs
[20:08:22] [PASSED] 29 VFs
[20:08:22] [PASSED] 30 VFs
[20:08:22] [PASSED] 31 VFs
[20:08:22] [PASSED] 32 VFs
[20:08:22] [PASSED] 33 VFs
[20:08:22] [PASSED] 34 VFs
[20:08:22] [PASSED] 35 VFs
[20:08:22] [PASSED] 36 VFs
[20:08:22] [PASSED] 37 VFs
[20:08:22] [PASSED] 38 VFs
[20:08:22] [PASSED] 39 VFs
[20:08:22] [PASSED] 40 VFs
[20:08:22] [PASSED] 41 VFs
[20:08:22] [PASSED] 42 VFs
[20:08:22] [PASSED] 43 VFs
[20:08:22] [PASSED] 44 VFs
[20:08:22] [PASSED] 45 VFs
[20:08:22] [PASSED] 46 VFs
[20:08:22] [PASSED] 47 VFs
[20:08:22] [PASSED] 48 VFs
[20:08:22] [PASSED] 49 VFs
[20:08:22] [PASSED] 50 VFs
[20:08:22] [PASSED] 51 VFs
[20:08:22] [PASSED] 52 VFs
[20:08:22] [PASSED] 53 VFs
[20:08:22] [PASSED] 54 VFs
[20:08:22] [PASSED] 55 VFs
[20:08:22] [PASSED] 56 VFs
[20:08:22] [PASSED] 57 VFs
[20:08:22] [PASSED] 58 VFs
[20:08:22] [PASSED] 59 VFs
[20:08:22] [PASSED] 60 VFs
[20:08:22] [PASSED] 61 VFs
[20:08:22] [PASSED] 62 VFs
[20:08:22] [PASSED] 63 VFs
[20:08:22] ================== [PASSED] fair_contexts ==================
[20:08:22] ===================== fair_doorbells  ======================
[20:08:22] [PASSED] 1 VF
[20:08:22] [PASSED] 2 VFs
[20:08:22] [PASSED] 3 VFs
[20:08:22] [PASSED] 4 VFs
[20:08:22] [PASSED] 5 VFs
[20:08:22] [PASSED] 6 VFs
[20:08:22] [PASSED] 7 VFs
[20:08:22] [PASSED] 8 VFs
[20:08:22] [PASSED] 9 VFs
[20:08:22] [PASSED] 10 VFs
[20:08:22] [PASSED] 11 VFs
[20:08:22] [PASSED] 12 VFs
[20:08:22] [PASSED] 13 VFs
[20:08:22] [PASSED] 14 VFs
[20:08:22] [PASSED] 15 VFs
[20:08:22] [PASSED] 16 VFs
[20:08:22] [PASSED] 17 VFs
[20:08:22] [PASSED] 18 VFs
[20:08:22] [PASSED] 19 VFs
[20:08:22] [PASSED] 20 VFs
[20:08:22] [PASSED] 21 VFs
[20:08:22] [PASSED] 22 VFs
[20:08:22] [PASSED] 23 VFs
[20:08:22] [PASSED] 24 VFs
[20:08:22] [PASSED] 25 VFs
[20:08:22] [PASSED] 26 VFs
[20:08:22] [PASSED] 27 VFs
[20:08:22] [PASSED] 28 VFs
[20:08:22] [PASSED] 29 VFs
[20:08:22] [PASSED] 30 VFs
[20:08:22] [PASSED] 31 VFs
[20:08:22] [PASSED] 32 VFs
[20:08:22] [PASSED] 33 VFs
[20:08:22] [PASSED] 34 VFs
[20:08:22] [PASSED] 35 VFs
[20:08:22] [PASSED] 36 VFs
[20:08:22] [PASSED] 37 VFs
[20:08:22] [PASSED] 38 VFs
[20:08:22] [PASSED] 39 VFs
[20:08:22] [PASSED] 40 VFs
[20:08:22] [PASSED] 41 VFs
[20:08:22] [PASSED] 42 VFs
[20:08:22] [PASSED] 43 VFs
[20:08:22] [PASSED] 44 VFs
[20:08:22] [PASSED] 45 VFs
[20:08:22] [PASSED] 46 VFs
[20:08:22] [PASSED] 47 VFs
[20:08:22] [PASSED] 48 VFs
[20:08:22] [PASSED] 49 VFs
[20:08:22] [PASSED] 50 VFs
[20:08:22] [PASSED] 51 VFs
[20:08:22] [PASSED] 52 VFs
[20:08:22] [PASSED] 53 VFs
[20:08:22] [PASSED] 54 VFs
[20:08:22] [PASSED] 55 VFs
[20:08:22] [PASSED] 56 VFs
[20:08:22] [PASSED] 57 VFs
[20:08:22] [PASSED] 58 VFs
[20:08:22] [PASSED] 59 VFs
[20:08:22] [PASSED] 60 VFs
[20:08:22] [PASSED] 61 VFs
[20:08:22] [PASSED] 62 VFs
[20:08:22] [PASSED] 63 VFs
[20:08:22] ================= [PASSED] fair_doorbells ==================
[20:08:22] ======================== fair_ggtt  ========================
[20:08:22] [PASSED] 1 VF
[20:08:22] [PASSED] 2 VFs
[20:08:22] [PASSED] 3 VFs
[20:08:22] [PASSED] 4 VFs
[20:08:22] [PASSED] 5 VFs
[20:08:22] [PASSED] 6 VFs
[20:08:22] [PASSED] 7 VFs
[20:08:22] [PASSED] 8 VFs
[20:08:22] [PASSED] 9 VFs
[20:08:22] [PASSED] 10 VFs
[20:08:22] [PASSED] 11 VFs
[20:08:22] [PASSED] 12 VFs
[20:08:22] [PASSED] 13 VFs
[20:08:22] [PASSED] 14 VFs
[20:08:22] [PASSED] 15 VFs
[20:08:22] [PASSED] 16 VFs
[20:08:22] [PASSED] 17 VFs
[20:08:22] [PASSED] 18 VFs
[20:08:22] [PASSED] 19 VFs
[20:08:22] [PASSED] 20 VFs
[20:08:22] [PASSED] 21 VFs
[20:08:22] [PASSED] 22 VFs
[20:08:22] [PASSED] 23 VFs
[20:08:22] [PASSED] 24 VFs
[20:08:22] [PASSED] 25 VFs
[20:08:22] [PASSED] 26 VFs
[20:08:22] [PASSED] 27 VFs
[20:08:22] [PASSED] 28 VFs
[20:08:22] [PASSED] 29 VFs
[20:08:22] [PASSED] 30 VFs
[20:08:22] [PASSED] 31 VFs
[20:08:22] [PASSED] 32 VFs
[20:08:22] [PASSED] 33 VFs
[20:08:22] [PASSED] 34 VFs
[20:08:22] [PASSED] 35 VFs
[20:08:22] [PASSED] 36 VFs
[20:08:22] [PASSED] 37 VFs
[20:08:22] [PASSED] 38 VFs
[20:08:22] [PASSED] 39 VFs
[20:08:22] [PASSED] 40 VFs
[20:08:22] [PASSED] 41 VFs
[20:08:22] [PASSED] 42 VFs
[20:08:22] [PASSED] 43 VFs
[20:08:22] [PASSED] 44 VFs
[20:08:22] [PASSED] 45 VFs
[20:08:22] [PASSED] 46 VFs
[20:08:22] [PASSED] 47 VFs
[20:08:22] [PASSED] 48 VFs
[20:08:22] [PASSED] 49 VFs
[20:08:22] [PASSED] 50 VFs
[20:08:22] [PASSED] 51 VFs
[20:08:22] [PASSED] 52 VFs
[20:08:22] [PASSED] 53 VFs
[20:08:22] [PASSED] 54 VFs
[20:08:22] [PASSED] 55 VFs
[20:08:22] [PASSED] 56 VFs
[20:08:22] [PASSED] 57 VFs
[20:08:22] [PASSED] 58 VFs
[20:08:22] [PASSED] 59 VFs
[20:08:22] [PASSED] 60 VFs
[20:08:22] [PASSED] 61 VFs
[20:08:22] [PASSED] 62 VFs
[20:08:22] [PASSED] 63 VFs
[20:08:22] ==================== [PASSED] fair_ggtt ====================
[20:08:22] ================== [PASSED] pf_gt_config ===================
[20:08:22] ===================== lmtt (1 subtest) =====================
[20:08:22] ======================== test_ops  =========================
[20:08:22] [PASSED] 2-level
[20:08:22] [PASSED] multi-level
[20:08:22] ==================== [PASSED] test_ops =====================
[20:08:22] ====================== [PASSED] lmtt =======================
[20:08:22] ================= pf_service (11 subtests) =================
[20:08:22] [PASSED] pf_negotiate_any
[20:08:22] [PASSED] pf_negotiate_base_match
[20:08:22] [PASSED] pf_negotiate_base_newer
[20:08:22] [PASSED] pf_negotiate_base_next
[20:08:22] [SKIPPED] pf_negotiate_base_older
[20:08:22] [PASSED] pf_negotiate_base_prev
[20:08:22] [PASSED] pf_negotiate_latest_match
[20:08:22] [PASSED] pf_negotiate_latest_newer
[20:08:22] [PASSED] pf_negotiate_latest_next
[20:08:22] [SKIPPED] pf_negotiate_latest_older
[20:08:22] [SKIPPED] pf_negotiate_latest_prev
[20:08:22] =================== [PASSED] pf_service ====================
[20:08:22] ================= xe_guc_g2g (2 subtests) ==================
[20:08:22] ============== xe_live_guc_g2g_kunit_default  ==============
[20:08:22] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:08:22] ============== xe_live_guc_g2g_kunit_allmem  ===============
[20:08:22] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:08:22] =================== [SKIPPED] xe_guc_g2g ===================
[20:08:22] =================== xe_mocs (2 subtests) ===================
[20:08:22] ================ xe_live_mocs_kernel_kunit  ================
[20:08:22] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:08:22] ================ xe_live_mocs_reset_kunit  =================
[20:08:22] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:08:22] ==================== [SKIPPED] xe_mocs =====================
[20:08:22] ================= xe_migrate (2 subtests) ==================
[20:08:22] ================= xe_migrate_sanity_kunit  =================
[20:08:22] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:08:22] ================== xe_validate_ccs_kunit  ==================
[20:08:22] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:08:22] =================== [SKIPPED] xe_migrate ===================
[20:08:22] ================== xe_dma_buf (1 subtest) ==================
[20:08:22] ==================== xe_dma_buf_kunit  =====================
[20:08:22] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:08:22] =================== [SKIPPED] xe_dma_buf ===================
[20:08:22] ================= xe_bo_shrink (1 subtest) =================
[20:08:22] =================== xe_bo_shrink_kunit  ====================
[20:08:22] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:08:22] ================== [SKIPPED] xe_bo_shrink ==================
[20:08:22] ==================== xe_bo (2 subtests) ====================
[20:08:22] ================== xe_ccs_migrate_kunit  ===================
[20:08:22] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:08:22] ==================== xe_bo_evict_kunit  ====================
[20:08:22] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:08:22] ===================== [SKIPPED] xe_bo ======================
[20:08:22] ==================== args (11 subtests) ====================
[20:08:22] [PASSED] count_args_test
[20:08:22] [PASSED] call_args_example
[20:08:22] [PASSED] call_args_test
[20:08:22] [PASSED] drop_first_arg_example
[20:08:22] [PASSED] drop_first_arg_test
[20:08:22] [PASSED] first_arg_example
[20:08:22] [PASSED] first_arg_test
[20:08:22] [PASSED] last_arg_example
[20:08:22] [PASSED] last_arg_test
[20:08:22] [PASSED] pick_arg_example
[20:08:22] [PASSED] sep_comma_example
[20:08:22] ====================== [PASSED] args =======================
[20:08:22] =================== xe_pci (3 subtests) ====================
[20:08:22] ==================== check_graphics_ip  ====================
[20:08:22] [PASSED] 12.00 Xe_LP
[20:08:22] [PASSED] 12.10 Xe_LP+
[20:08:22] [PASSED] 12.55 Xe_HPG
[20:08:22] [PASSED] 12.60 Xe_HPC
[20:08:22] [PASSED] 12.70 Xe_LPG
[20:08:22] [PASSED] 12.71 Xe_LPG
[20:08:22] [PASSED] 12.74 Xe_LPG+
[20:08:22] [PASSED] 20.01 Xe2_HPG
[20:08:22] [PASSED] 20.02 Xe2_HPG
[20:08:22] [PASSED] 20.04 Xe2_LPG
[20:08:22] [PASSED] 30.00 Xe3_LPG
[20:08:22] [PASSED] 30.01 Xe3_LPG
[20:08:22] [PASSED] 30.03 Xe3_LPG
[20:08:22] [PASSED] 30.04 Xe3_LPG
[20:08:22] [PASSED] 30.05 Xe3_LPG
[20:08:22] [PASSED] 35.11 Xe3p_XPC
[20:08:22] ================ [PASSED] check_graphics_ip ================
[20:08:22] ===================== check_media_ip  ======================
[20:08:22] [PASSED] 12.00 Xe_M
[20:08:22] [PASSED] 12.55 Xe_HPM
[20:08:22] [PASSED] 13.00 Xe_LPM+
[20:08:22] [PASSED] 13.01 Xe2_HPM
[20:08:22] [PASSED] 20.00 Xe2_LPM
[20:08:22] [PASSED] 30.00 Xe3_LPM
[20:08:22] [PASSED] 30.02 Xe3_LPM
[20:08:22] [PASSED] 35.00 Xe3p_LPM
[20:08:22] [PASSED] 35.03 Xe3p_HPM
[20:08:22] ================= [PASSED] check_media_ip ==================
[20:08:22] =================== check_platform_desc  ===================
[20:08:22] [PASSED] 0x9A60 (TIGERLAKE)
[20:08:22] [PASSED] 0x9A68 (TIGERLAKE)
[20:08:22] [PASSED] 0x9A70 (TIGERLAKE)
[20:08:22] [PASSED] 0x9A40 (TIGERLAKE)
[20:08:22] [PASSED] 0x9A49 (TIGERLAKE)
[20:08:22] [PASSED] 0x9A59 (TIGERLAKE)
[20:08:22] [PASSED] 0x9A78 (TIGERLAKE)
[20:08:22] [PASSED] 0x9AC0 (TIGERLAKE)
[20:08:22] [PASSED] 0x9AC9 (TIGERLAKE)
[20:08:22] [PASSED] 0x9AD9 (TIGERLAKE)
[20:08:22] [PASSED] 0x9AF8 (TIGERLAKE)
[20:08:22] [PASSED] 0x4C80 (ROCKETLAKE)
[20:08:22] [PASSED] 0x4C8A (ROCKETLAKE)
[20:08:22] [PASSED] 0x4C8B (ROCKETLAKE)
[20:08:22] [PASSED] 0x4C8C (ROCKETLAKE)
[20:08:22] [PASSED] 0x4C90 (ROCKETLAKE)
[20:08:22] [PASSED] 0x4C9A (ROCKETLAKE)
[20:08:22] [PASSED] 0x4680 (ALDERLAKE_S)
[20:08:22] [PASSED] 0x4682 (ALDERLAKE_S)
[20:08:22] [PASSED] 0x4688 (ALDERLAKE_S)
[20:08:22] [PASSED] 0x468A (ALDERLAKE_S)
[20:08:22] [PASSED] 0x468B (ALDERLAKE_S)
[20:08:22] [PASSED] 0x4690 (ALDERLAKE_S)
[20:08:22] [PASSED] 0x4692 (ALDERLAKE_S)
[20:08:22] [PASSED] 0x4693 (ALDERLAKE_S)
[20:08:22] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46AA (ALDERLAKE_P)
[20:08:22] [PASSED] 0x462A (ALDERLAKE_P)
[20:08:22] [PASSED] 0x4626 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x4628 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[20:08:22] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:08:22] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:08:22] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:08:22] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:08:22] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:08:22] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:08:22] [PASSED] 0xA721 (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA720 (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:08:22] [PASSED] 0xA780 (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA781 (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA782 (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA783 (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA788 (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA789 (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA78A (ALDERLAKE_S)
[20:08:22] [PASSED] 0xA78B (ALDERLAKE_S)
[20:08:22] [PASSED] 0x4905 (DG1)
[20:08:22] [PASSED] 0x4906 (DG1)
[20:08:22] [PASSED] 0x4907 (DG1)
[20:08:22] [PASSED] 0x4908 (DG1)
[20:08:22] [PASSED] 0x4909 (DG1)
[20:08:22] [PASSED] 0x56C0 (DG2)
[20:08:22] [PASSED] 0x56C2 (DG2)
[20:08:22] [PASSED] 0x56C1 (DG2)
[20:08:22] [PASSED] 0x7D51 (METEORLAKE)
[20:08:22] [PASSED] 0x7DD1 (METEORLAKE)
[20:08:22] [PASSED] 0x7D41 (METEORLAKE)
[20:08:22] [PASSED] 0x7D67 (METEORLAKE)
[20:08:22] [PASSED] 0xB640 (METEORLAKE)
[20:08:22] [PASSED] 0x56A0 (DG2)
[20:08:22] [PASSED] 0x56A1 (DG2)
[20:08:22] [PASSED] 0x56A2 (DG2)
[20:08:22] [PASSED] 0x56BE (DG2)
[20:08:22] [PASSED] 0x56BF (DG2)
[20:08:22] [PASSED] 0x5690 (DG2)
[20:08:22] [PASSED] 0x5691 (DG2)
[20:08:22] [PASSED] 0x5692 (DG2)
[20:08:22] [PASSED] 0x56A5 (DG2)
[20:08:22] [PASSED] 0x56A6 (DG2)
[20:08:22] [PASSED] 0x56B0 (DG2)
[20:08:22] [PASSED] 0x56B1 (DG2)
[20:08:22] [PASSED] 0x56BA (DG2)
[20:08:22] [PASSED] 0x56BB (DG2)
[20:08:22] [PASSED] 0x56BC (DG2)
[20:08:22] [PASSED] 0x56BD (DG2)
[20:08:22] [PASSED] 0x5693 (DG2)
[20:08:22] [PASSED] 0x5694 (DG2)
[20:08:22] [PASSED] 0x5695 (DG2)
[20:08:22] [PASSED] 0x56A3 (DG2)
[20:08:22] [PASSED] 0x56A4 (DG2)
[20:08:22] [PASSED] 0x56B2 (DG2)
[20:08:22] [PASSED] 0x56B3 (DG2)
[20:08:22] [PASSED] 0x5696 (DG2)
[20:08:22] [PASSED] 0x5697 (DG2)
[20:08:22] [PASSED] 0xB69 (PVC)
[20:08:22] [PASSED] 0xB6E (PVC)
[20:08:22] [PASSED] 0xBD4 (PVC)
[20:08:22] [PASSED] 0xBD5 (PVC)
[20:08:22] [PASSED] 0xBD6 (PVC)
[20:08:22] [PASSED] 0xBD7 (PVC)
[20:08:22] [PASSED] 0xBD8 (PVC)
[20:08:22] [PASSED] 0xBD9 (PVC)
[20:08:22] [PASSED] 0xBDA (PVC)
[20:08:22] [PASSED] 0xBDB (PVC)
[20:08:22] [PASSED] 0xBE0 (PVC)
[20:08:22] [PASSED] 0xBE1 (PVC)
[20:08:22] [PASSED] 0xBE5 (PVC)
[20:08:22] [PASSED] 0x7D40 (METEORLAKE)
[20:08:22] [PASSED] 0x7D45 (METEORLAKE)
[20:08:22] [PASSED] 0x7D55 (METEORLAKE)
[20:08:22] [PASSED] 0x7D60 (METEORLAKE)
[20:08:22] [PASSED] 0x7DD5 (METEORLAKE)
[20:08:22] [PASSED] 0x6420 (LUNARLAKE)
[20:08:22] [PASSED] 0x64A0 (LUNARLAKE)
[20:08:22] [PASSED] 0x64B0 (LUNARLAKE)
[20:08:22] [PASSED] 0xE202 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE209 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE20B (BATTLEMAGE)
[20:08:22] [PASSED] 0xE20C (BATTLEMAGE)
[20:08:22] [PASSED] 0xE20D (BATTLEMAGE)
[20:08:22] [PASSED] 0xE210 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE211 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE212 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE216 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE220 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE221 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE222 (BATTLEMAGE)
[20:08:22] [PASSED] 0xE223 (BATTLEMAGE)
[20:08:22] [PASSED] 0xB080 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB081 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB082 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB083 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB084 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB085 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB086 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB087 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB08F (PANTHERLAKE)
[20:08:22] [PASSED] 0xB090 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:08:22] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:08:22] [PASSED] 0xD740 (NOVALAKE_S)
[20:08:22] [PASSED] 0xD741 (NOVALAKE_S)
[20:08:22] [PASSED] 0xD742 (NOVALAKE_S)
[20:08:22] [PASSED] 0xD743 (NOVALAKE_S)
[20:08:22] [PASSED] 0xD744 (NOVALAKE_S)
[20:08:22] [PASSED] 0xD745 (NOVALAKE_S)
[20:08:22] [PASSED] 0x674C (CRESCENTISLAND)
[20:08:22] [PASSED] 0xFD80 (PANTHERLAKE)
[20:08:22] [PASSED] 0xFD81 (PANTHERLAKE)
[20:08:22] =============== [PASSED] check_platform_desc ===============
[20:08:22] ===================== [PASSED] xe_pci ======================
[20:08:22] =================== xe_rtp (2 subtests) ====================
[20:08:22] =============== xe_rtp_process_to_sr_tests  ================
[20:08:22] [PASSED] coalesce-same-reg
[20:08:22] [PASSED] no-match-no-add
[20:08:22] [PASSED] match-or
[20:08:22] [PASSED] match-or-xfail
[20:08:22] [PASSED] no-match-no-add-multiple-rules
[20:08:22] [PASSED] two-regs-two-entries
[20:08:22] [PASSED] clr-one-set-other
[20:08:22] [PASSED] set-field
[20:08:22] [PASSED] conflict-duplicate
[20:08:22] [PASSED] conflict-not-disjoint
[20:08:22] [PASSED] conflict-reg-type
[20:08:22] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:08:22] ================== xe_rtp_process_tests  ===================
[20:08:22] [PASSED] active1
[20:08:22] [PASSED] active2
[20:08:22] [PASSED] active-inactive
[20:08:22] [PASSED] inactive-active
[20:08:22] [PASSED] inactive-1st_or_active-inactive
[20:08:22] [PASSED] inactive-2nd_or_active-inactive
[20:08:22] [PASSED] inactive-last_or_active-inactive
[20:08:22] [PASSED] inactive-no_or_active-inactive
[20:08:22] ============== [PASSED] xe_rtp_process_tests ===============
[20:08:22] ===================== [PASSED] xe_rtp ======================
[20:08:22] ==================== xe_wa (1 subtest) =====================
[20:08:22] ======================== xe_wa_gt  =========================
[20:08:22] [PASSED] TIGERLAKE B0
[20:08:22] [PASSED] DG1 A0
[20:08:22] [PASSED] DG1 B0
[20:08:22] [PASSED] ALDERLAKE_S A0
[20:08:22] [PASSED] ALDERLAKE_S B0
[20:08:22] [PASSED] ALDERLAKE_S C0
[20:08:22] [PASSED] ALDERLAKE_S D0
[20:08:22] [PASSED] ALDERLAKE_P A0
[20:08:22] [PASSED] ALDERLAKE_P B0
[20:08:22] [PASSED] ALDERLAKE_P C0
[20:08:22] [PASSED] ALDERLAKE_S RPLS D0
[20:08:22] [PASSED] ALDERLAKE_P RPLU E0
[20:08:22] [PASSED] DG2 G10 C0
[20:08:22] [PASSED] DG2 G11 B1
[20:08:22] [PASSED] DG2 G12 A1
[20:08:22] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:08:22] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:08:22] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:08:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:08:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:08:22] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:08:22] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:08:22] ==================== [PASSED] xe_wa_gt =====================
[20:08:22] ====================== [PASSED] xe_wa ======================
[20:08:22] ============================================================
[20:08:22] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[20:08:22] Elapsed time: 36.180s total, 4.329s configuring, 31.334s building, 0.465s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:08:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:08:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:08:50] Starting KUnit Kernel (1/1)...
[20:08:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:08:50] ============ drm_test_pick_cmdline (2 subtests) ============
[20:08:50] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:08:50] =============== drm_test_pick_cmdline_named  ===============
[20:08:50] [PASSED] NTSC
[20:08:50] [PASSED] NTSC-J
[20:08:50] [PASSED] PAL
[20:08:50] [PASSED] PAL-M
[20:08:50] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:08:50] ============== [PASSED] drm_test_pick_cmdline ==============
[20:08:50] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:08:50] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:08:50] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:08:50] =========== drm_validate_clone_mode (2 subtests) ===========
[20:08:50] ============== drm_test_check_in_clone_mode  ===============
[20:08:50] [PASSED] in_clone_mode
[20:08:50] [PASSED] not_in_clone_mode
[20:08:50] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:08:50] =============== drm_test_check_valid_clones  ===============
[20:08:50] [PASSED] not_in_clone_mode
[20:08:50] [PASSED] valid_clone
[20:08:50] [PASSED] invalid_clone
[20:08:50] =========== [PASSED] drm_test_check_valid_clones ===========
[20:08:50] ============= [PASSED] drm_validate_clone_mode =============
[20:08:50] ============= drm_validate_modeset (1 subtest) =============
[20:08:50] [PASSED] drm_test_check_connector_changed_modeset
[20:08:50] ============== [PASSED] drm_validate_modeset ===============
[20:08:50] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:08:50] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:08:50] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:08:50] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:08:50] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:08:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:08:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:08:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:08:50] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:08:50] ============== drm_bridge_alloc (2 subtests) ===============
[20:08:50] [PASSED] drm_test_drm_bridge_alloc_basic
[20:08:50] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:08:50] ================ [PASSED] drm_bridge_alloc =================
[20:08:50] ================== drm_buddy (8 subtests) ==================
[20:08:50] [PASSED] drm_test_buddy_alloc_limit
[20:08:50] [PASSED] drm_test_buddy_alloc_optimistic
[20:08:50] [PASSED] drm_test_buddy_alloc_pessimistic
[20:08:50] [PASSED] drm_test_buddy_alloc_pathological
[20:08:50] [PASSED] drm_test_buddy_alloc_contiguous
[20:08:50] [PASSED] drm_test_buddy_alloc_clear
[20:08:50] [PASSED] drm_test_buddy_alloc_range_bias
[20:08:50] [PASSED] drm_test_buddy_fragmentation_performance
[20:08:50] ==================== [PASSED] drm_buddy ====================
[20:08:50] ============= drm_cmdline_parser (40 subtests) =============
[20:08:50] [PASSED] drm_test_cmdline_force_d_only
[20:08:50] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:08:50] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:08:50] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:08:50] [PASSED] drm_test_cmdline_force_e_only
[20:08:50] [PASSED] drm_test_cmdline_res
[20:08:50] [PASSED] drm_test_cmdline_res_vesa
[20:08:50] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:08:50] [PASSED] drm_test_cmdline_res_rblank
[20:08:50] [PASSED] drm_test_cmdline_res_bpp
[20:08:50] [PASSED] drm_test_cmdline_res_refresh
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:08:50] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:08:50] [PASSED] drm_test_cmdline_res_margins_force_on
[20:08:50] [PASSED] drm_test_cmdline_res_vesa_margins
[20:08:50] [PASSED] drm_test_cmdline_name
[20:08:50] [PASSED] drm_test_cmdline_name_bpp
[20:08:50] [PASSED] drm_test_cmdline_name_option
[20:08:50] [PASSED] drm_test_cmdline_name_bpp_option
[20:08:50] [PASSED] drm_test_cmdline_rotate_0
[20:08:50] [PASSED] drm_test_cmdline_rotate_90
[20:08:50] [PASSED] drm_test_cmdline_rotate_180
[20:08:50] [PASSED] drm_test_cmdline_rotate_270
[20:08:50] [PASSED] drm_test_cmdline_hmirror
[20:08:50] [PASSED] drm_test_cmdline_vmirror
[20:08:50] [PASSED] drm_test_cmdline_margin_options
[20:08:50] [PASSED] drm_test_cmdline_multiple_options
[20:08:50] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:08:50] [PASSED] drm_test_cmdline_extra_and_option
[20:08:50] [PASSED] drm_test_cmdline_freestanding_options
[20:08:50] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:08:50] [PASSED] drm_test_cmdline_panel_orientation
[20:08:50] ================ drm_test_cmdline_invalid  =================
[20:08:50] [PASSED] margin_only
[20:08:50] [PASSED] interlace_only
[20:08:50] [PASSED] res_missing_x
[20:08:50] [PASSED] res_missing_y
[20:08:50] [PASSED] res_bad_y
[20:08:50] [PASSED] res_missing_y_bpp
[20:08:50] [PASSED] res_bad_bpp
[20:08:50] [PASSED] res_bad_refresh
[20:08:50] [PASSED] res_bpp_refresh_force_on_off
[20:08:50] [PASSED] res_invalid_mode
[20:08:50] [PASSED] res_bpp_wrong_place_mode
[20:08:50] [PASSED] name_bpp_refresh
[20:08:50] [PASSED] name_refresh
[20:08:50] [PASSED] name_refresh_wrong_mode
[20:08:50] [PASSED] name_refresh_invalid_mode
[20:08:50] [PASSED] rotate_multiple
[20:08:50] [PASSED] rotate_invalid_val
[20:08:50] [PASSED] rotate_truncated
[20:08:50] [PASSED] invalid_option
[20:08:50] [PASSED] invalid_tv_option
[20:08:50] [PASSED] truncated_tv_option
[20:08:50] ============ [PASSED] drm_test_cmdline_invalid =============
[20:08:50] =============== drm_test_cmdline_tv_options  ===============
[20:08:50] [PASSED] NTSC
[20:08:50] [PASSED] NTSC_443
[20:08:50] [PASSED] NTSC_J
[20:08:50] [PASSED] PAL
[20:08:50] [PASSED] PAL_M
[20:08:50] [PASSED] PAL_N
[20:08:50] [PASSED] SECAM
[20:08:50] [PASSED] MONO_525
[20:08:50] [PASSED] MONO_625
[20:08:50] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:08:50] =============== [PASSED] drm_cmdline_parser ================
[20:08:50] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:08:50] [PASSED] drm_test_connector_hdmi_init_valid
[20:08:50] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:08:50] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:08:50] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:08:50] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:08:50] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:08:50] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:08:50] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:08:50] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:08:50] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:08:50] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:08:50] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:08:50] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:08:50] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:08:50] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:08:50] [PASSED] drm_test_connector_hdmi_init_null_product
[20:08:50] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:08:50] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:08:50] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:08:50] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:08:50] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:08:50] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:08:50] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:08:50] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:08:50] [PASSED] HDMI-A
[20:08:50] [PASSED] HDMI-B
[20:08:50] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:08:50] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:08:50] [PASSED] Unknown
[20:08:50] [PASSED] VGA
[20:08:50] [PASSED] DVI-I
[20:08:50] [PASSED] DVI-D
[20:08:50] [PASSED] DVI-A
[20:08:50] [PASSED] Composite
[20:08:50] [PASSED] SVIDEO
[20:08:50] [PASSED] LVDS
[20:08:50] [PASSED] Component
[20:08:50] [PASSED] DIN
[20:08:50] [PASSED] DP
[20:08:50] [PASSED] TV
[20:08:50] [PASSED] eDP
[20:08:50] [PASSED] Virtual
[20:08:50] [PASSED] DSI
[20:08:50] [PASSED] DPI
[20:08:50] [PASSED] Writeback
[20:08:50] [PASSED] SPI
[20:08:50] [PASSED] USB
[20:08:50] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:08:50] ============ [PASSED] drmm_connector_hdmi_init =============
[20:08:50] ============= drmm_connector_init (3 subtests) =============
[20:08:50] [PASSED] drm_test_drmm_connector_init
[20:08:50] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:08:50] ========= drm_test_drmm_connector_init_type_valid  =========
[20:08:50] [PASSED] Unknown
[20:08:50] [PASSED] VGA
[20:08:50] [PASSED] DVI-I
[20:08:50] [PASSED] DVI-D
[20:08:50] [PASSED] DVI-A
[20:08:50] [PASSED] Composite
[20:08:50] [PASSED] SVIDEO
[20:08:50] [PASSED] LVDS
[20:08:50] [PASSED] Component
[20:08:50] [PASSED] DIN
[20:08:50] [PASSED] DP
[20:08:50] [PASSED] HDMI-A
[20:08:50] [PASSED] HDMI-B
[20:08:50] [PASSED] TV
[20:08:50] [PASSED] eDP
[20:08:50] [PASSED] Virtual
[20:08:50] [PASSED] DSI
[20:08:50] [PASSED] DPI
[20:08:50] [PASSED] Writeback
[20:08:50] [PASSED] SPI
[20:08:50] [PASSED] USB
[20:08:50] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:08:50] =============== [PASSED] drmm_connector_init ===============
[20:08:50] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_init
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:08:50] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:08:50] [PASSED] Unknown
[20:08:50] [PASSED] VGA
[20:08:50] [PASSED] DVI-I
[20:08:50] [PASSED] DVI-D
[20:08:50] [PASSED] DVI-A
[20:08:50] [PASSED] Composite
[20:08:50] [PASSED] SVIDEO
[20:08:50] [PASSED] LVDS
[20:08:50] [PASSED] Component
[20:08:50] [PASSED] DIN
[20:08:50] [PASSED] DP
[20:08:50] [PASSED] HDMI-A
[20:08:50] [PASSED] HDMI-B
[20:08:50] [PASSED] TV
[20:08:50] [PASSED] eDP
[20:08:50] [PASSED] Virtual
[20:08:50] [PASSED] DSI
[20:08:50] [PASSED] DPI
[20:08:50] [PASSED] Writeback
[20:08:50] [PASSED] SPI
[20:08:50] [PASSED] USB
[20:08:50] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:08:50] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:08:50] [PASSED] Unknown
[20:08:50] [PASSED] VGA
[20:08:50] [PASSED] DVI-I
[20:08:50] [PASSED] DVI-D
[20:08:50] [PASSED] DVI-A
[20:08:50] [PASSED] Composite
[20:08:50] [PASSED] SVIDEO
[20:08:50] [PASSED] LVDS
[20:08:50] [PASSED] Component
[20:08:50] [PASSED] DIN
[20:08:50] [PASSED] DP
[20:08:50] [PASSED] HDMI-A
[20:08:50] [PASSED] HDMI-B
[20:08:50] [PASSED] TV
[20:08:50] [PASSED] eDP
[20:08:50] [PASSED] Virtual
[20:08:50] [PASSED] DSI
[20:08:50] [PASSED] DPI
[20:08:50] [PASSED] Writeback
[20:08:50] [PASSED] SPI
[20:08:50] [PASSED] USB
[20:08:50] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:08:50] =========== [PASSED] drm_connector_dynamic_init ============
[20:08:50] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:08:50] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:08:50] ======= drm_connector_dynamic_register (7 subtests) ========
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:08:50] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:08:50] ========= [PASSED] drm_connector_dynamic_register ==========
[20:08:50] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:08:50] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:08:50] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:08:50] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:08:50] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:08:50] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:08:50] [PASSED] NTSC
[20:08:50] [PASSED] NTSC-443
[20:08:50] [PASSED] NTSC-J
[20:08:50] [PASSED] PAL
[20:08:50] [PASSED] PAL-M
[20:08:50] [PASSED] PAL-N
[20:08:50] [PASSED] SECAM
[20:08:50] [PASSED] Mono
[20:08:50] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:08:50] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:08:50] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:08:50] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:08:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:08:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:08:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:08:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:08:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:08:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:08:50] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:08:50] [PASSED] VIC 96
[20:08:50] [PASSED] VIC 97
[20:08:50] [PASSED] VIC 101
[20:08:50] [PASSED] VIC 102
[20:08:50] [PASSED] VIC 106
[20:08:50] [PASSED] VIC 107
[20:08:50] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:08:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:08:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:08:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:08:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:08:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:08:50] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:08:50] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:08:50] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:08:50] [PASSED] Automatic
[20:08:50] [PASSED] Full
[20:08:50] [PASSED] Limited 16:235
[20:08:50] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:08:50] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:08:50] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:08:50] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:08:50] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:08:50] [PASSED] RGB
[20:08:50] [PASSED] YUV 4:2:0
[20:08:50] [PASSED] YUV 4:2:2
[20:08:50] [PASSED] YUV 4:4:4
[20:08:50] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:08:50] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:08:50] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:08:50] ============= drm_damage_helper (21 subtests) ==============
[20:08:50] [PASSED] drm_test_damage_iter_no_damage
[20:08:50] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:08:50] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:08:50] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:08:50] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:08:50] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:08:50] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:08:50] [PASSED] drm_test_damage_iter_simple_damage
[20:08:50] [PASSED] drm_test_damage_iter_single_damage
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:08:50] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:08:50] [PASSED] drm_test_damage_iter_damage
[20:08:50] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:08:50] [PASSED] drm_test_damage_iter_damage_one_outside
[20:08:50] [PASSED] drm_test_damage_iter_damage_src_moved
[20:08:50] [PASSED] drm_test_damage_iter_damage_not_visible
[20:08:50] ================ [PASSED] drm_damage_helper ================
[20:08:50] ============== drm_dp_mst_helper (3 subtests) ==============
[20:08:50] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:08:50] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:08:50] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:08:50] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:08:50] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:08:50] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:08:50] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:08:50] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:08:50] [PASSED] Link rate 2000000 lane count 4
[20:08:50] [PASSED] Link rate 2000000 lane count 2
[20:08:50] [PASSED] Link rate 2000000 lane count 1
[20:08:50] [PASSED] Link rate 1350000 lane count 4
[20:08:50] [PASSED] Link rate 1350000 lane count 2
[20:08:50] [PASSED] Link rate 1350000 lane count 1
[20:08:50] [PASSED] Link rate 1000000 lane count 4
[20:08:50] [PASSED] Link rate 1000000 lane count 2
[20:08:50] [PASSED] Link rate 1000000 lane count 1
[20:08:50] [PASSED] Link rate 810000 lane count 4
[20:08:50] [PASSED] Link rate 810000 lane count 2
[20:08:50] [PASSED] Link rate 810000 lane count 1
[20:08:50] [PASSED] Link rate 540000 lane count 4
[20:08:50] [PASSED] Link rate 540000 lane count 2
[20:08:50] [PASSED] Link rate 540000 lane count 1
[20:08:50] [PASSED] Link rate 270000 lane count 4
[20:08:50] [PASSED] Link rate 270000 lane count 2
[20:08:50] [PASSED] Link rate 270000 lane count 1
[20:08:50] [PASSED] Link rate 162000 lane count 4
[20:08:50] [PASSED] Link rate 162000 lane count 2
[20:08:50] [PASSED] Link rate 162000 lane count 1
[20:08:50] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:08:50] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:08:50] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:08:50] [PASSED] DP_POWER_UP_PHY with port number
[20:08:50] [PASSED] DP_POWER_DOWN_PHY with port number
[20:08:50] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:08:50] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:08:50] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:08:50] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:08:50] [PASSED] DP_QUERY_PAYLOAD with port number
[20:08:50] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:08:50] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:08:50] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:08:50] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:08:50] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:08:50] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:08:50] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:08:50] [PASSED] DP_REMOTE_I2C_READ with port number
[20:08:50] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:08:50] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:08:50] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:08:50] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:08:50] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:08:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:08:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:08:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:08:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:08:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:08:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:08:50] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:08:50] ================ [PASSED] drm_dp_mst_helper ================
[20:08:50] ================== drm_exec (7 subtests) ===================
[20:08:50] [PASSED] sanitycheck
[20:08:50] [PASSED] test_lock
[20:08:50] [PASSED] test_lock_unlock
[20:08:50] [PASSED] test_duplicates
[20:08:50] [PASSED] test_prepare
[20:08:50] [PASSED] test_prepare_array
[20:08:50] [PASSED] test_multiple_loops
[20:08:50] ==================== [PASSED] drm_exec =====================
[20:08:50] =========== drm_format_helper_test (17 subtests) ===========
[20:08:50] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:08:50] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:08:50] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:08:50] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:08:50] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:08:50] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:08:50] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:08:50] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:08:50] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:08:50] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:08:50] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:08:50] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:08:50] ==================== drm_test_fb_swab  =====================
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ================ [PASSED] drm_test_fb_swab =================
[20:08:50] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:08:50] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:08:50] [PASSED] single_pixel_source_buffer
[20:08:50] [PASSED] single_pixel_clip_rectangle
[20:08:50] [PASSED] well_known_colors
[20:08:50] [PASSED] destination_pitch
[20:08:50] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:08:50] ================= drm_test_fb_clip_offset  =================
[20:08:50] [PASSED] pass through
[20:08:50] [PASSED] horizontal offset
[20:08:50] [PASSED] vertical offset
[20:08:50] [PASSED] horizontal and vertical offset
[20:08:50] [PASSED] horizontal offset (custom pitch)
[20:08:50] [PASSED] vertical offset (custom pitch)
[20:08:50] [PASSED] horizontal and vertical offset (custom pitch)
[20:08:50] ============= [PASSED] drm_test_fb_clip_offset =============
[20:08:50] =================== drm_test_fb_memcpy  ====================
[20:08:50] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:08:50] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:08:50] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:08:50] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:08:50] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:08:50] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:08:50] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:08:50] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:08:50] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:08:50] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:08:50] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:08:50] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:08:50] =============== [PASSED] drm_test_fb_memcpy ================
[20:08:50] ============= [PASSED] drm_format_helper_test ==============
[20:08:50] ================= drm_format (18 subtests) =================
[20:08:50] [PASSED] drm_test_format_block_width_invalid
[20:08:50] [PASSED] drm_test_format_block_width_one_plane
[20:08:50] [PASSED] drm_test_format_block_width_two_plane
[20:08:50] [PASSED] drm_test_format_block_width_three_plane
[20:08:50] [PASSED] drm_test_format_block_width_tiled
[20:08:50] [PASSED] drm_test_format_block_height_invalid
[20:08:50] [PASSED] drm_test_format_block_height_one_plane
[20:08:50] [PASSED] drm_test_format_block_height_two_plane
[20:08:50] [PASSED] drm_test_format_block_height_three_plane
[20:08:50] [PASSED] drm_test_format_block_height_tiled
[20:08:50] [PASSED] drm_test_format_min_pitch_invalid
[20:08:50] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:08:50] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:08:50] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:08:50] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:08:50] [PASSED] drm_test_format_min_pitch_two_plane
[20:08:50] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:08:50] [PASSED] drm_test_format_min_pitch_tiled
[20:08:50] =================== [PASSED] drm_format ====================
[20:08:50] ============== drm_framebuffer (10 subtests) ===============
[20:08:50] ========== drm_test_framebuffer_check_src_coords  ==========
[20:08:50] [PASSED] Success: source fits into fb
[20:08:50] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:08:50] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:08:50] [PASSED] Fail: overflowing fb with source width
[20:08:50] [PASSED] Fail: overflowing fb with source height
[20:08:50] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:08:50] [PASSED] drm_test_framebuffer_cleanup
[20:08:50] =============== drm_test_framebuffer_create  ===============
[20:08:50] [PASSED] ABGR8888 normal sizes
[20:08:50] [PASSED] ABGR8888 max sizes
[20:08:50] [PASSED] ABGR8888 pitch greater than min required
[20:08:50] [PASSED] ABGR8888 pitch less than min required
[20:08:50] [PASSED] ABGR8888 Invalid width
[20:08:50] [PASSED] ABGR8888 Invalid buffer handle
[20:08:50] [PASSED] No pixel format
[20:08:50] [PASSED] ABGR8888 Width 0
[20:08:50] [PASSED] ABGR8888 Height 0
[20:08:50] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:08:50] [PASSED] ABGR8888 Large buffer offset
[20:08:50] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:08:50] [PASSED] ABGR8888 Invalid flag
[20:08:50] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:08:50] [PASSED] ABGR8888 Valid buffer modifier
[20:08:50] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:08:50] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] NV12 Normal sizes
[20:08:50] [PASSED] NV12 Max sizes
[20:08:50] [PASSED] NV12 Invalid pitch
[20:08:50] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:08:50] [PASSED] NV12 different  modifier per-plane
[20:08:50] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:08:50] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] NV12 Modifier for inexistent plane
[20:08:50] [PASSED] NV12 Handle for inexistent plane
[20:08:50] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:08:50] [PASSED] YVU420 Normal sizes
[20:08:50] [PASSED] YVU420 Max sizes
[20:08:50] [PASSED] YVU420 Invalid pitch
[20:08:50] [PASSED] YVU420 Different pitches
[20:08:50] [PASSED] YVU420 Different buffer offsets/pitches
[20:08:50] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:08:50] [PASSED] YVU420 Valid modifier
[20:08:50] [PASSED] YVU420 Different modifiers per plane
[20:08:50] [PASSED] YVU420 Modifier for inexistent plane
[20:08:50] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:08:50] [PASSED] X0L2 Normal sizes
[20:08:50] [PASSED] X0L2 Max sizes
[20:08:50] [PASSED] X0L2 Invalid pitch
[20:08:50] [PASSED] X0L2 Pitch greater than minimum required
[20:08:50] [PASSED] X0L2 Handle for inexistent plane
[20:08:50] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:08:50] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:08:50] [PASSED] X0L2 Valid modifier
[20:08:50] [PASSED] X0L2 Modifier for inexistent plane
[20:08:50] =========== [PASSED] drm_test_framebuffer_create ===========
[20:08:50] [PASSED] drm_test_framebuffer_free
[20:08:50] [PASSED] drm_test_framebuffer_init
[20:08:50] [PASSED] drm_test_framebuffer_init_bad_format
[20:08:50] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:08:50] [PASSED] drm_test_framebuffer_lookup
[20:08:50] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:08:50] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:08:50] ================= [PASSED] drm_framebuffer =================
[20:08:50] ================ drm_gem_shmem (8 subtests) ================
[20:08:50] [PASSED] drm_gem_shmem_test_obj_create
[20:08:50] [PASSED] drm_gem_shmem_test_obj_create_private
[20:08:50] [PASSED] drm_gem_shmem_test_pin_pages
[20:08:50] [PASSED] drm_gem_shmem_test_vmap
[20:08:50] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:08:50] [PASSED] drm_gem_shmem_test_get_sg_table
[20:08:50] [PASSED] drm_gem_shmem_test_madvise
[20:08:50] [PASSED] drm_gem_shmem_test_purge
[20:08:50] ================== [PASSED] drm_gem_shmem ==================
[20:08:50] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:08:50] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:08:50] [PASSED] Automatic
[20:08:50] [PASSED] Full
[20:08:50] [PASSED] Limited 16:235
[20:08:50] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:08:50] [PASSED] drm_test_check_disable_connector
[20:08:50] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:08:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:08:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:08:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:08:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:08:50] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:08:50] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:08:50] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:08:50] [PASSED] drm_test_check_output_bpc_dvi
[20:08:50] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:08:50] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:08:50] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:08:50] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:08:50] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:08:50] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:08:50] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:08:50] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:08:50] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:08:50] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:08:50] [PASSED] drm_test_check_broadcast_rgb_value
[20:08:50] [PASSED] drm_test_check_bpc_8_value
[20:08:50] [PASSED] drm_test_check_bpc_10_value
[20:08:50] [PASSED] drm_test_check_bpc_12_value
[20:08:50] [PASSED] drm_test_check_format_value
[20:08:50] [PASSED] drm_test_check_tmds_char_value
[20:08:50] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:08:50] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:08:50] [PASSED] drm_test_check_mode_valid
[20:08:50] [PASSED] drm_test_check_mode_valid_reject
[20:08:50] [PASSED] drm_test_check_mode_valid_reject_rate
[20:08:50] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:08:50] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:08:50] ================= drm_managed (2 subtests) =================
[20:08:50] [PASSED] drm_test_managed_release_action
[20:08:50] [PASSED] drm_test_managed_run_action
[20:08:50] =================== [PASSED] drm_managed ===================
[20:08:50] =================== drm_mm (6 subtests) ====================
[20:08:50] [PASSED] drm_test_mm_init
[20:08:50] [PASSED] drm_test_mm_debug
[20:08:50] [PASSED] drm_test_mm_align32
[20:08:50] [PASSED] drm_test_mm_align64
[20:08:50] [PASSED] drm_test_mm_lowest
[20:08:50] [PASSED] drm_test_mm_highest
[20:08:50] ===================== [PASSED] drm_mm ======================
[20:08:50] ============= drm_modes_analog_tv (5 subtests) =============
[20:08:50] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:08:50] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:08:50] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:08:50] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:08:50] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:08:50] =============== [PASSED] drm_modes_analog_tv ===============
[20:08:50] ============== drm_plane_helper (2 subtests) ===============
[20:08:50] =============== drm_test_check_plane_state  ================
[20:08:50] [PASSED] clipping_simple
[20:08:50] [PASSED] clipping_rotate_reflect
[20:08:50] [PASSED] positioning_simple
[20:08:50] [PASSED] upscaling
[20:08:50] [PASSED] downscaling
[20:08:50] [PASSED] rounding1
[20:08:50] [PASSED] rounding2
[20:08:50] [PASSED] rounding3
[20:08:50] [PASSED] rounding4
[20:08:50] =========== [PASSED] drm_test_check_plane_state ============
[20:08:50] =========== drm_test_check_invalid_plane_state  ============
[20:08:50] [PASSED] positioning_invalid
[20:08:50] [PASSED] upscaling_invalid
[20:08:50] [PASSED] downscaling_invalid
[20:08:50] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:08:50] ================ [PASSED] drm_plane_helper =================
[20:08:50] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:08:50] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:08:50] [PASSED] None
[20:08:50] [PASSED] PAL
[20:08:50] [PASSED] NTSC
[20:08:50] [PASSED] Both, NTSC Default
[20:08:50] [PASSED] Both, PAL Default
[20:08:50] [PASSED] Both, NTSC Default, with PAL on command-line
[20:08:50] [PASSED] Both, PAL Default, with NTSC on command-line
[20:08:50] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:08:50] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:08:50] ================== drm_rect (9 subtests) ===================
[20:08:50] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:08:50] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:08:50] [PASSED] drm_test_rect_clip_scaled_clipped
[20:08:50] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:08:50] ================= drm_test_rect_intersect  =================
[20:08:50] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:08:50] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:08:50] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:08:50] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:08:50] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:08:50] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:08:50] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:08:50] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:08:50] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:08:50] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:08:50] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:08:50] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:08:50] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:08:50] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:08:50] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:08:50] ============= [PASSED] drm_test_rect_intersect =============
[20:08:50] ================ drm_test_rect_calc_hscale  ================
[20:08:50] [PASSED] normal use
[20:08:50] [PASSED] out of max range
[20:08:50] [PASSED] out of min range
[20:08:50] [PASSED] zero dst
[20:08:50] [PASSED] negative src
[20:08:50] [PASSED] negative dst
[20:08:50] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:08:50] ================ drm_test_rect_calc_vscale  ================
[20:08:50] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[20:08:50] [PASSED] out of max range
[20:08:50] [PASSED] out of min range
[20:08:50] [PASSED] zero dst
[20:08:50] [PASSED] negative src
[20:08:50] [PASSED] negative dst
[20:08:50] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:08:50] ================== drm_test_rect_rotate  ===================
[20:08:50] [PASSED] reflect-x
[20:08:50] [PASSED] reflect-y
[20:08:50] [PASSED] rotate-0
[20:08:50] [PASSED] rotate-90
[20:08:50] [PASSED] rotate-180
[20:08:50] [PASSED] rotate-270
[20:08:50] ============== [PASSED] drm_test_rect_rotate ===============
[20:08:50] ================ drm_test_rect_rotate_inv  =================
[20:08:50] [PASSED] reflect-x
[20:08:50] [PASSED] reflect-y
[20:08:50] [PASSED] rotate-0
[20:08:50] [PASSED] rotate-90
[20:08:50] [PASSED] rotate-180
[20:08:50] [PASSED] rotate-270
[20:08:50] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:08:50] ==================== [PASSED] drm_rect =====================
[20:08:50] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:08:50] ============ drm_test_sysfb_build_fourcc_list  =============
[20:08:50] [PASSED] no native formats
[20:08:50] [PASSED] XRGB8888 as native format
[20:08:50] [PASSED] remove duplicates
[20:08:50] [PASSED] convert alpha formats
[20:08:50] [PASSED] random formats
[20:08:50] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:08:50] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:08:50] ============================================================
[20:08:50] Testing complete. Ran 622 tests: passed: 622
[20:08:50] Elapsed time: 27.607s total, 1.736s configuring, 25.453s building, 0.389s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:08:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:08:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:09:01] Starting KUnit Kernel (1/1)...
[20:09:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:09:01] ================= ttm_device (5 subtests) ==================
[20:09:01] [PASSED] ttm_device_init_basic
[20:09:01] [PASSED] ttm_device_init_multiple
[20:09:01] [PASSED] ttm_device_fini_basic
[20:09:01] [PASSED] ttm_device_init_no_vma_man
[20:09:01] ================== ttm_device_init_pools  ==================
[20:09:01] [PASSED] No DMA allocations, no DMA32 required
[20:09:01] [PASSED] DMA allocations, DMA32 required
[20:09:01] [PASSED] No DMA allocations, DMA32 required
[20:09:01] [PASSED] DMA allocations, no DMA32 required
[20:09:01] ============== [PASSED] ttm_device_init_pools ==============
[20:09:01] =================== [PASSED] ttm_device ====================
[20:09:01] ================== ttm_pool (8 subtests) ===================
[20:09:01] ================== ttm_pool_alloc_basic  ===================
[20:09:01] [PASSED] One page
[20:09:01] [PASSED] More than one page
[20:09:01] [PASSED] Above the allocation limit
[20:09:01] [PASSED] One page, with coherent DMA mappings enabled
[20:09:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:09:01] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:09:01] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:09:01] [PASSED] One page
[20:09:01] [PASSED] More than one page
[20:09:01] [PASSED] Above the allocation limit
[20:09:01] [PASSED] One page, with coherent DMA mappings enabled
[20:09:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:09:01] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:09:01] [PASSED] ttm_pool_alloc_order_caching_match
[20:09:01] [PASSED] ttm_pool_alloc_caching_mismatch
[20:09:01] [PASSED] ttm_pool_alloc_order_mismatch
[20:09:01] [PASSED] ttm_pool_free_dma_alloc
[20:09:01] [PASSED] ttm_pool_free_no_dma_alloc
[20:09:01] [PASSED] ttm_pool_fini_basic
[20:09:01] ==================== [PASSED] ttm_pool =====================
[20:09:01] ================ ttm_resource (8 subtests) =================
[20:09:01] ================= ttm_resource_init_basic  =================
[20:09:01] [PASSED] Init resource in TTM_PL_SYSTEM
[20:09:01] [PASSED] Init resource in TTM_PL_VRAM
[20:09:01] [PASSED] Init resource in a private placement
[20:09:01] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:09:01] ============= [PASSED] ttm_resource_init_basic =============
[20:09:01] [PASSED] ttm_resource_init_pinned
[20:09:01] [PASSED] ttm_resource_fini_basic
[20:09:01] [PASSED] ttm_resource_manager_init_basic
[20:09:01] [PASSED] ttm_resource_manager_usage_basic
[20:09:01] [PASSED] ttm_resource_manager_set_used_basic
[20:09:01] [PASSED] ttm_sys_man_alloc_basic
[20:09:01] [PASSED] ttm_sys_man_free_basic
[20:09:01] ================== [PASSED] ttm_resource ===================
[20:09:01] =================== ttm_tt (15 subtests) ===================
[20:09:01] ==================== ttm_tt_init_basic  ====================
[20:09:01] [PASSED] Page-aligned size
[20:09:01] [PASSED] Extra pages requested
[20:09:01] ================ [PASSED] ttm_tt_init_basic ================
[20:09:01] [PASSED] ttm_tt_init_misaligned
[20:09:01] [PASSED] ttm_tt_fini_basic
[20:09:01] [PASSED] ttm_tt_fini_sg
[20:09:01] [PASSED] ttm_tt_fini_shmem
[20:09:01] [PASSED] ttm_tt_create_basic
[20:09:01] [PASSED] ttm_tt_create_invalid_bo_type
[20:09:01] [PASSED] ttm_tt_create_ttm_exists
[20:09:01] [PASSED] ttm_tt_create_failed
[20:09:01] [PASSED] ttm_tt_destroy_basic
[20:09:01] [PASSED] ttm_tt_populate_null_ttm
[20:09:01] [PASSED] ttm_tt_populate_populated_ttm
[20:09:01] [PASSED] ttm_tt_unpopulate_basic
[20:09:01] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:09:01] [PASSED] ttm_tt_swapin_basic
[20:09:01] ===================== [PASSED] ttm_tt ======================
[20:09:01] =================== ttm_bo (14 subtests) ===================
[20:09:01] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:09:01] [PASSED] Cannot be interrupted and sleeps
[20:09:01] [PASSED] Cannot be interrupted, locks straight away
[20:09:01] [PASSED] Can be interrupted, sleeps
[20:09:01] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:09:01] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:09:01] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:09:01] [PASSED] ttm_bo_reserve_double_resv
[20:09:01] [PASSED] ttm_bo_reserve_interrupted
[20:09:01] [PASSED] ttm_bo_reserve_deadlock
[20:09:01] [PASSED] ttm_bo_unreserve_basic
[20:09:01] [PASSED] ttm_bo_unreserve_pinned
[20:09:01] [PASSED] ttm_bo_unreserve_bulk
[20:09:01] [PASSED] ttm_bo_fini_basic
[20:09:01] [PASSED] ttm_bo_fini_shared_resv
[20:09:01] [PASSED] ttm_bo_pin_basic
[20:09:01] [PASSED] ttm_bo_pin_unpin_resource
[20:09:01] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:09:01] ===================== [PASSED] ttm_bo ======================
[20:09:01] ============== ttm_bo_validate (21 subtests) ===============
[20:09:01] ============== ttm_bo_init_reserved_sys_man  ===============
[20:09:01] [PASSED] Buffer object for userspace
[20:09:01] [PASSED] Kernel buffer object
[20:09:01] [PASSED] Shared buffer object
[20:09:01] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:09:01] ============== ttm_bo_init_reserved_mock_man  ==============
[20:09:01] [PASSED] Buffer object for userspace
[20:09:01] [PASSED] Kernel buffer object
[20:09:01] [PASSED] Shared buffer object
[20:09:01] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:09:01] [PASSED] ttm_bo_init_reserved_resv
[20:09:01] ================== ttm_bo_validate_basic  ==================
[20:09:01] [PASSED] Buffer object for userspace
[20:09:01] [PASSED] Kernel buffer object
[20:09:01] [PASSED] Shared buffer object
[20:09:01] ============== [PASSED] ttm_bo_validate_basic ==============
[20:09:01] [PASSED] ttm_bo_validate_invalid_placement
[20:09:01] ============= ttm_bo_validate_same_placement  ==============
[20:09:01] [PASSED] System manager
[20:09:01] [PASSED] VRAM manager
[20:09:01] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:09:01] [PASSED] ttm_bo_validate_failed_alloc
[20:09:01] [PASSED] ttm_bo_validate_pinned
[20:09:01] [PASSED] ttm_bo_validate_busy_placement
[20:09:01] ================ ttm_bo_validate_multihop  =================
[20:09:01] [PASSED] Buffer object for userspace
[20:09:01] [PASSED] Kernel buffer object
[20:09:01] [PASSED] Shared buffer object
[20:09:01] ============ [PASSED] ttm_bo_validate_multihop =============
[20:09:01] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:09:01] [PASSED] Buffer object in system domain, no page vector
[20:09:01] [PASSED] Buffer object in system domain with an existing page vector
[20:09:01] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:09:01] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:09:01] [PASSED] Buffer object for userspace
[20:09:01] [PASSED] Kernel buffer object
[20:09:01] [PASSED] Shared buffer object
[20:09:01] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:09:01] [PASSED] ttm_bo_validate_move_fence_signaled
[20:09:01] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:09:01] [PASSED] Waits for GPU
[20:09:01] [PASSED] Tries to lock straight away
[20:09:01] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:09:01] [PASSED] ttm_bo_validate_happy_evict
[20:09:01] [PASSED] ttm_bo_validate_all_pinned_evict
[20:09:01] [PASSED] ttm_bo_validate_allowed_only_evict
[20:09:01] [PASSED] ttm_bo_validate_deleted_evict
[20:09:01] [PASSED] ttm_bo_validate_busy_domain_evict
[20:09:01] [PASSED] ttm_bo_validate_evict_gutting
[20:09:01] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:09:01] ================= [PASSED] ttm_bo_validate =================
[20:09:01] ============================================================
[20:09:01] Testing complete. Ran 101 tests: passed: 101
[20:09:01] Elapsed time: 11.276s total, 1.733s configuring, 9.328s building, 0.181s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)
URL   : https://patchwork.freedesktop.org/series/157907/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 8052b0ba2e97387477c22ba816fabca9a4728aae
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:39: warning: Using plain integer as NULL pointer
-O:drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2471 bytes --]

== Series Details ==

Series: drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)
URL   : https://patchwork.freedesktop.org/series/157907/
State : success

== Summary ==

CI Bug Log - changes from xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362_BAT -> xe-pw-157907v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-157907v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-plain-flip@a-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +1 other test dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/bat-adlp-7/igt@kms_flip@basic-plain-flip@a-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/bat-adlp-7/igt@kms_flip@basic-plain-flip@a-edp1.html

  
#### Possible fixes ####

  * igt@xe_waitfence@abstime:
    - bat-dg2-oem2:       [TIMEOUT][3] ([Intel XE#6506]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/bat-dg2-oem2/igt@xe_waitfence@abstime.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/bat-dg2-oem2/igt@xe_waitfence@abstime.html

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [FAIL][5] ([Intel XE#6519]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519


Build changes
-------------

  * Linux: xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362 -> xe-pw-157907v2

  IGT_8638: 72d5c74eb3cf46af2f46daba8109d84c3dd19363 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362: 0a21e96e0b6840d2a4e0b45a957679eeddeb4362
  xe-pw-157907v2: 157907v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/index.html

[-- Attachment #2: Type: text/html, Size: 3092 bytes --]

✗ Xe.CI.Full: failure for drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 45501 bytes --]

== Series Details ==

Series: drm/i915/display: switch from intel_wakeref_t to struct ref_tracker * (rev2)
URL   : https://patchwork.freedesktop.org/series/157907/
State : failure

== Summary ==

CI Bug Log - changes from xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362_FULL -> xe-pw-157907v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-157907v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-157907v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-157907v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-bmg:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_hdr@bpc-switch-dpms.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [ABORT][3]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html

  
Known issues
------------

  Here are the changes found in xe-pw-157907v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][4] ([Intel XE#2953] / [Intel XE#4173])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2370])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-adlp:         NOTRUN -> [SKIP][6] ([Intel XE#1124]) +3 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2327]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-180:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][8] ([Intel XE#4543]) +2 other tests dmesg-fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-adlp:         NOTRUN -> [SKIP][10] ([Intel XE#607])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_bw@linear-tiling-1-displays-2160x1440p:
    - shard-adlp:         NOTRUN -> [SKIP][11] ([Intel XE#367])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][12] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][13] ([Intel XE#787]) +8 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][14] ([Intel XE#2907]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [PASS][15] -> [INCOMPLETE][16] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4:
    - shard-dg2-set2:     [PASS][17] -> [INCOMPLETE][18] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-adlp:         NOTRUN -> [SKIP][19] ([Intel XE#4418])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-adlp:         NOTRUN -> [SKIP][20] ([Intel XE#373]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_content_protection@content-type-change:
    - shard-adlp:         NOTRUN -> [SKIP][21] ([Intel XE#455]) +9 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2390])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2320]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-adlp:         NOTRUN -> [SKIP][24] ([Intel XE#308])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][25] -> [SKIP][26] ([Intel XE#2291]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
    - shard-adlp:         NOTRUN -> [SKIP][27] ([Intel XE#309]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-adlp:         NOTRUN -> [SKIP][28] ([Intel XE#323])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dp_aux_dev:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#3009])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-7/igt@kms_dp_aux_dev.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@kms_dp_aux_dev.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [PASS][31] -> [SKIP][32] ([Intel XE#2316]) +5 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][33] ([Intel XE#310]) +3 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2316])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
    - shard-adlp:         NOTRUN -> [ABORT][35] ([Intel XE#6675]) +2 other tests abort
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
    - shard-adlp:         [PASS][36] -> [DMESG-WARN][37] ([Intel XE#4543]) +2 other tests dmesg-warn
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2293]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][40] ([Intel XE#4543] / [Intel XE#4921]) +1 other test dmesg-fail
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-x:
    - shard-adlp:         [PASS][41] -> [DMESG-FAIL][42] ([Intel XE#4543])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-x.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-x.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][43] ([Intel XE#6312])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2311]) +6 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#4141]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
    - shard-adlp:         NOTRUN -> [SKIP][46] ([Intel XE#651]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2313]) +7 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-adlp:         NOTRUN -> [SKIP][48] ([Intel XE#653]) +5 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2312]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-adlp:         NOTRUN -> [SKIP][50] ([Intel XE#656]) +8 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-adlp:         NOTRUN -> [SKIP][51] ([Intel XE#2925] / [Intel XE#346])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2934])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0:
    - shard-adlp:         NOTRUN -> [FAIL][53] ([Intel XE#5195]) +4 other tests fail
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#4596])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#870])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#1439] / [Intel XE#836])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-adlp:         NOTRUN -> [SKIP][57] ([Intel XE#836])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#1406] / [Intel XE#1489])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
    - shard-adlp:         NOTRUN -> [SKIP][59] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr@fbc-pr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_psr@fbc-pr-suspend.html

  * igt@kms_psr@pr-suspend:
    - shard-adlp:         NOTRUN -> [SKIP][61] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +4 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@kms_psr@pr-suspend.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#6503])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][63] -> [ABORT][64] ([Intel XE#6675]) +1 other test abort
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-dg2-466/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-6.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-dg2-464/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-6.html

  * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-edp-1:
    - shard-lnl:          [PASS][65] -> [ABORT][66] ([Intel XE#6675]) +3 other tests abort
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-lnl-1/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-edp-1.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-lnl-3/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-edp-1.html

  * igt@xe_ccs@ctrl-surf-copy:
    - shard-adlp:         NOTRUN -> [SKIP][67] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-2/igt@xe_ccs@ctrl-surf-copy.html

  * igt@xe_compute_preempt@compute-preempt-many-vram:
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#5191])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_compute_preempt@compute-preempt-many-vram.html

  * igt@xe_create@create-big-vram:
    - shard-adlp:         NOTRUN -> [SKIP][69] ([Intel XE#1062])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_create@create-big-vram.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#4837]) +2 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_eudebug@basic-read-event:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#4837] / [Intel XE#5565]) +3 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_eudebug@basic-read-event.html

  * igt@xe_evict@evict-beng-small-external-cm:
    - shard-adlp:         NOTRUN -> [SKIP][72] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@xe_evict@evict-beng-small-external-cm.html

  * igt@xe_evict@evict-large-cm:
    - shard-adlp:         NOTRUN -> [SKIP][73] ([Intel XE#261] / [Intel XE#5564])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_evict@evict-large-cm.html

  * igt@xe_evict@evict-large-multi-vm-cm:
    - shard-adlp:         NOTRUN -> [SKIP][74] ([Intel XE#261])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-2/igt@xe_evict@evict-large-multi-vm-cm.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd:
    - shard-adlp:         NOTRUN -> [SKIP][75] ([Intel XE#688])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-adlp:         NOTRUN -> [SKIP][76] ([Intel XE#1392] / [Intel XE#5575])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#2322])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html

  * igt@xe_exec_fault_mode@many-execqueues-userptr-prefetch:
    - shard-adlp:         NOTRUN -> [SKIP][78] ([Intel XE#288] / [Intel XE#5561]) +6 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_exec_fault_mode@many-execqueues-userptr-prefetch.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
    - shard-adlp:         NOTRUN -> [SKIP][79] ([Intel XE#2360]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-2/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html

  * igt@xe_exec_system_allocator@many-new-busy:
    - shard-adlp:         NOTRUN -> [SKIP][80] ([Intel XE#4915]) +107 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_exec_system_allocator@many-new-busy.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#4943]) +6 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-huge-nomemset.html

  * igt@xe_module_load@force-load:
    - shard-adlp:         NOTRUN -> [SKIP][82] ([Intel XE#378] / [Intel XE#5612])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_module_load@force-load.html

  * igt@xe_oa@privileged-forked-access-vaddr:
    - shard-adlp:         NOTRUN -> [SKIP][83] ([Intel XE#3573]) +2 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-3/igt@xe_oa@privileged-forked-access-vaddr.html

  * igt@xe_pm@s3-exec-after:
    - shard-bmg:          NOTRUN -> [ABORT][84] ([Intel XE#6675]) +1 other test abort
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@xe_pm@s3-exec-after.html

  * igt@xe_pm@s4-basic:
    - shard-adlp:         [PASS][85] -> [ABORT][86] ([Intel XE#6675]) +3 other tests abort
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-3/igt@xe_pm@s4-basic.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-3/igt@xe_pm@s4-basic.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
    - shard-adlp:         NOTRUN -> [SKIP][87] ([Intel XE#4733] / [Intel XE#5594])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-4/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html

  * igt@xe_query@multigpu-query-config:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#944])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_query@multigpu-query-config.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-adlp:         NOTRUN -> [SKIP][89] ([Intel XE#944]) +2 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_vram@vf-access-after-resize-down:
    - shard-adlp:         NOTRUN -> [SKIP][90] ([Intel XE#6376])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-6/igt@xe_sriov_vram@vf-access-after-resize-down.html

  
#### Possible fixes ####

  * igt@kms_async_flips@test-cursor-atomic:
    - shard-adlp:         [DMESG-WARN][91] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][92] +1 other test pass
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-8/igt@kms_async_flips@test-cursor-atomic.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-9/igt@kms_async_flips@test-cursor-atomic.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-bmg:          [SKIP][93] ([Intel XE#2291]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][95] ([Intel XE#4633]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-bmg:          [SKIP][97] ([Intel XE#2316]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][99] ([Intel XE#4543]) -> [PASS][100] +1 other test pass
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-9/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-8/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y:
    - shard-adlp:         [DMESG-FAIL][101] ([Intel XE#4543]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
    - shard-adlp:         [FAIL][103] ([Intel XE#1874]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-edp-1:
    - shard-lnl:          [ABORT][105] ([Intel XE#6675]) -> [PASS][106] +1 other test pass
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-lnl-8/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-edp-1.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-lnl-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-edp-1.html

  * igt@testdisplay:
    - shard-bmg:          [ABORT][107] -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-7/igt@testdisplay.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@testdisplay.html

  * igt@xe_exec_system_allocator@many-stride-malloc-prefetch:
    - shard-bmg:          [WARN][109] ([Intel XE#5786]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html

  * igt@xe_exec_system_allocator@once-large-malloc-race-nomemset:
    - shard-bmg:          [SKIP][111] -> [PASS][112] +4 other tests pass
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@xe_exec_system_allocator@once-large-malloc-race-nomemset.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_exec_system_allocator@once-large-malloc-race-nomemset.html

  * igt@xe_pm@s2idle-vm-bind-unbind-all:
    - shard-bmg:          [ABORT][113] ([Intel XE#6675]) -> [PASS][114] +2 other tests pass
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-4/igt@xe_pm@s2idle-vm-bind-unbind-all.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@xe_pm@s2idle-vm-bind-unbind-all.html

  * igt@xe_pm@s2idle-vm-bind-userptr:
    - shard-adlp:         [ABORT][115] ([Intel XE#6675]) -> [PASS][116] +4 other tests pass
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-1/igt@xe_pm@s2idle-vm-bind-userptr.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-2/igt@xe_pm@s2idle-vm-bind-userptr.html

  * igt@xe_pmu@engine-activity-accuracy-90:
    - shard-lnl:          [FAIL][117] ([Intel XE#6251]) -> [PASS][118] +2 other tests pass
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-lnl-7/igt@xe_pmu@engine-activity-accuracy-90.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90.html

  
#### Warnings ####

  * igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-1:
    - shard-adlp:         [ABORT][119] ([Intel XE#6675]) -> [DMESG-WARN][120] ([Intel XE#4543])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-6/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-1.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-1/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-1.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          [SKIP][121] -> [SKIP][122] ([Intel XE#1124])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs:
    - shard-bmg:          [SKIP][123] -> [SKIP][124] ([Intel XE#2887])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html

  * igt@kms_content_protection@lic-type-0:
    - shard-bmg:          [FAIL][125] ([Intel XE#1178]) -> [SKIP][126] ([Intel XE#2341])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-8/igt@kms_content_protection@lic-type-0.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][127] ([Intel XE#2311]) -> [SKIP][128] ([Intel XE#2312]) +8 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][129] ([Intel XE#4141]) -> [SKIP][130] ([Intel XE#2312]) +4 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-bmg:          [SKIP][131] ([Intel XE#2312]) -> [SKIP][132] ([Intel XE#4141]) +2 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][133] ([Intel XE#2312]) -> [SKIP][134] ([Intel XE#2311]) +7 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][135] ([Intel XE#2312]) -> [SKIP][136] ([Intel XE#2313]) +5 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][137] ([Intel XE#2313]) -> [SKIP][138] ([Intel XE#2312]) +9 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-edp-1:
    - shard-lnl:          [INCOMPLETE][139] -> [ABORT][140] ([Intel XE#6675])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-lnl-8/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-edp-1.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-lnl-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-bmg:          [SKIP][141] ([Intel XE#1406]) -> [SKIP][142] ([Intel XE#1406] / [Intel XE#1489])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][143] ([Intel XE#362]) -> [SKIP][144] ([Intel XE#1500])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge-nomemset:
    - shard-bmg:          [SKIP][145] -> [SKIP][146] ([Intel XE#4943])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge-nomemset.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge-nomemset.html

  * igt@xe_pm@s3-d3hot-basic-exec:
    - shard-bmg:          [SKIP][147] -> [ABORT][148] ([Intel XE#6675])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-bmg-2/igt@xe_pm@s3-d3hot-basic-exec.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-bmg-1/igt@xe_pm@s3-d3hot-basic-exec.html

  * igt@xe_pm@s3-vm-bind-userptr:
    - shard-adlp:         [ABORT][149] ([Intel XE#6675]) -> [INCOMPLETE][150] ([Intel XE#6255])
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-9/igt@xe_pm@s3-vm-bind-userptr.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-8/igt@xe_pm@s3-vm-bind-userptr.html

  * igt@xe_sriov_scheduling@equal-throughput:
    - shard-adlp:         [DMESG-FAIL][151] ([Intel XE#3868] / [Intel XE#5213]) -> [DMESG-FAIL][152] ([Intel XE#3868] / [Intel XE#5213] / [Intel XE#5545]) +1 other test dmesg-fail
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362/shard-adlp-9/igt@xe_sriov_scheduling@equal-throughput.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/shard-adlp-8/igt@xe_sriov_scheduling@equal-throughput.html

  
  [Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5195
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
  [Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
  [Intel XE#6255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6255
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6675]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6675
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362 -> xe-pw-157907v2

  IGT_8638: 72d5c74eb3cf46af2f46daba8109d84c3dd19363 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4144-0a21e96e0b6840d2a4e0b45a957679eeddeb4362: 0a21e96e0b6840d2a4e0b45a957679eeddeb4362
  xe-pw-157907v2: 157907v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157907v2/index.html

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