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* [Intel-xe] [PATCH v3 0/5] Try to handle TLB invalidations from CT fast-path
@ 2023-07-04 13:45 Matthew Auld
  2023-07-04 13:45 ` [Intel-xe] [PATCH v3 1/5] drm/xe: hold mem_access.ref for " Matthew Auld
                   ` (12 more replies)
  0 siblings, 13 replies; 15+ messages in thread
From: Matthew Auld @ 2023-07-04 13:45 UTC (permalink / raw)
  To: intel-xe

In various test cases and workloads that put the system under a heavy load, we
can sometimes see errors with missed TLB invalidations. If we handle the TLB
completions directly from IRQ we can see a big improvement.

-- 
2.41.0


^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2023-07-04 18:42 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-07-04 13:45 [Intel-xe] [PATCH v3 0/5] Try to handle TLB invalidations from CT fast-path Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 1/5] drm/xe: hold mem_access.ref for " Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 2/5] drm/xe/ct: serialise fast_lock during CT disable Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 3/5] drm/xe/gt: tweak placement for signalling TLB fences after GT reset Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 4/5] drm/xe/tlb: also update seqno_recv during reset Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 5/5] drm/xe: handle TLB invalidations from CT fast-path Matthew Auld
2023-07-04 13:48 ` [Intel-xe] ✓ CI.Patch_applied: success for Try to " Patchwork
2023-07-04 13:49 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-07-04 13:50 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-07-04 13:54 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-07-04 13:54 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-07-04 13:55 ` [Intel-xe] ✓ CI.checksparse: " Patchwork
2023-07-04 14:42 ` [Intel-xe] ○ CI.BAT: info " Patchwork
2023-07-04 18:19 ` [Intel-xe] [PATCH v3 0/5] " Souza, Jose
2023-07-04 18:42   ` Souza, Jose

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