From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 04/14] drm/i915: Pass intel_dbuf_bw to skl_*_calc_dbuf_bw() explicitly
Date: Fri, 7 Mar 2025 20:01:29 +0200 [thread overview]
Message-ID: <20250307180139.15744-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20250307180139.15744-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make skl_*_calc_dbuf_bw() a bit lower level passing in the
to be mutated dbuf_bw struct in explicitly. This will allow
more reuse later.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 640a24e83b6d..c9e15a068b67 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1155,14 +1155,13 @@ static bool intel_bw_state_changed(struct drm_i915_private *i915,
return false;
}
-static void skl_plane_calc_dbuf_bw(struct intel_bw_state *bw_state,
+static void skl_plane_calc_dbuf_bw(struct intel_dbuf_bw *dbuf_bw,
struct intel_crtc *crtc,
enum plane_id plane_id,
const struct skl_ddb_entry *ddb,
unsigned int data_rate)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- struct intel_dbuf_bw *dbuf_bw = &bw_state->dbuf_bw[crtc->pipe];
unsigned int dbuf_mask = skl_ddb_dbuf_slice_mask(i915, ddb);
enum dbuf_slice slice;
@@ -1176,12 +1175,11 @@ static void skl_plane_calc_dbuf_bw(struct intel_bw_state *bw_state,
}
}
-static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state,
+static void skl_crtc_calc_dbuf_bw(struct intel_dbuf_bw *dbuf_bw,
const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- struct intel_dbuf_bw *dbuf_bw = &bw_state->dbuf_bw[crtc->pipe];
enum plane_id plane_id;
memset(dbuf_bw, 0, sizeof(*dbuf_bw));
@@ -1197,12 +1195,12 @@ static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state,
if (plane_id == PLANE_CURSOR)
continue;
- skl_plane_calc_dbuf_bw(bw_state, crtc, plane_id,
+ skl_plane_calc_dbuf_bw(dbuf_bw, crtc, plane_id,
&crtc_state->wm.skl.plane_ddb[plane_id],
crtc_state->data_rate[plane_id]);
if (DISPLAY_VER(i915) < 11)
- skl_plane_calc_dbuf_bw(bw_state, crtc, plane_id,
+ skl_plane_calc_dbuf_bw(dbuf_bw, crtc, plane_id,
&crtc_state->wm.skl.plane_ddb_y[plane_id],
crtc_state->data_rate[plane_id]);
}
@@ -1276,7 +1274,8 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state,
old_bw_state = intel_atomic_get_old_bw_state(state);
- skl_crtc_calc_dbuf_bw(new_bw_state, crtc_state);
+ skl_crtc_calc_dbuf_bw(&new_bw_state->dbuf_bw[crtc->pipe],
+ crtc_state);
}
if (!old_bw_state)
--
2.45.3
next prev parent reply other threads:[~2025-03-07 18:02 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-07 18:01 [PATCH 00/14] drm/i915: sagv/bw cleanup Ville Syrjala
2025-03-07 18:01 ` [PATCH 01/14] drm/i915: Drop the cached per-pipe min_cdclk[] from bw state Ville Syrjala
2025-03-07 18:01 ` [PATCH 02/14] drm/i915: s/intel_crtc_bw/intel_dbuf_bw/ Ville Syrjala
2025-03-07 18:01 ` [PATCH 03/14] drm/i915: Extract intel_dbuf_bw_changed() Ville Syrjala
2025-03-07 18:01 ` Ville Syrjala [this message]
2025-03-07 18:01 ` [PATCH 05/14] drm/i915: Avoid triggering unwanted cdclk changes due to dbuf bandwidth changes Ville Syrjala
2025-03-07 18:01 ` [PATCH 06/14] drm/i915: Do more bw readout Ville Syrjala
2025-03-07 18:01 ` [PATCH 07/14] drm/i915: Flag even inactive crtcs as "inherited" Ville Syrjala
2025-03-07 18:01 ` [PATCH 08/14] drm/i915: Drop force_check_qgv Ville Syrjala
2025-03-07 18:01 ` [PATCH 09/14] drm/i915: Extract intel_bw_modeset_checks() Ville Syrjala
2025-03-07 18:01 ` [PATCH 10/14] drm/i915: Extract intel_bw_check_sagv_mask() Ville Syrjala
2025-03-07 18:01 ` [PATCH 11/14] drm/i915: Make intel_bw_check_sagv_mask() internal to intel_bw.c Ville Syrjala
2025-03-07 18:01 ` [PATCH 12/14] drm/i915: Make intel_bw_modeset_checks() internal to intel_bw_atomic_check() Ville Syrjala
2025-03-07 18:01 ` [PATCH 13/14] drm/i915: Skip bw stuff if per-crtc sagv state doesn't change Ville Syrjala
2025-03-07 18:01 ` [PATCH 14/14] drm/i915: Eliminate intel_compute_sagv_mask() Ville Syrjala
2025-03-07 19:11 ` ✓ CI.Patch_applied: success for drm/i915: sagv/bw cleanup Patchwork
2025-03-07 19:12 ` ✗ CI.checkpatch: warning " Patchwork
2025-03-07 19:13 ` ✓ CI.KUnit: success " Patchwork
2025-03-07 19:29 ` ✓ CI.Build: " Patchwork
2025-03-07 19:32 ` ✓ CI.Hooks: " Patchwork
2025-03-07 19:33 ` ✗ CI.checksparse: warning " Patchwork
2025-03-07 19:56 ` ✓ Xe.CI.BAT: success " Patchwork
2025-03-08 23:24 ` ✗ Xe.CI.Full: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250307180139.15744-5-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox