[PATCH 6/8] drm/xe/gt: Inline gt_fw_domain_init

[Maarten Lankhorst <dev@lankhorst.se>]

Have only a single init function for whole of GT to keep things
readable.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_gt.c | 100 +++++++++++++++++--------------------
 1 file changed, 45 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 80b64fbd68775..dfe0def966e71 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -396,59 +396,6 @@ static void dump_pat_on_error(struct xe_gt *gt)
 	xe_pat_dump(gt, &p);
 }
 
-static int gt_fw_domain_init(struct xe_gt *gt)
-{
-	unsigned int fw_ref;
-	int err;
-
-	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
-	if (!fw_ref)
-		return -ETIMEDOUT;
-
-	if (!xe_gt_is_media_type(gt)) {
-		err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
-		if (err)
-			goto err_force_wake;
-		if (IS_SRIOV_PF(gt_to_xe(gt)))
-			xe_lmtt_init(&gt_to_tile(gt)->sriov.pf.lmtt);
-	}
-
-	/* Enable per hw engine IRQs */
-	xe_irq_enable_hwe(gt);
-
-	/* Rerun MCR init as we now have hw engine list */
-	xe_gt_mcr_init(gt);
-
-	err = xe_hw_engines_init_early(gt);
-	if (err) {
-		dump_pat_on_error(gt);
-		goto err_force_wake;
-	}
-
-	err = xe_hw_engine_class_sysfs_init(gt);
-	if (err)
-		goto err_force_wake;
-
-	/* Initialize CCS mode sysfs after early initialization of HW engines */
-	err = xe_gt_ccs_mode_sysfs_init(gt);
-	if (err)
-		goto err_force_wake;
-
-	/*
-	 * Stash hardware-reported version.  Since this register does not exist
-	 * on pre-MTL platforms, reading it there will (correctly) return 0.
-	 */
-	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
-
-	xe_force_wake_put(gt_to_fw(gt), fw_ref);
-	return 0;
-
-err_force_wake:
-	xe_force_wake_put(gt_to_fw(gt), fw_ref);
-
-	return err;
-}
-
 static int all_fw_domain_init(struct xe_gt *gt)
 {
 	unsigned int fw_ref;
@@ -582,6 +529,7 @@ static void xe_gt_fini(void *arg)
 
 int xe_gt_init(struct xe_gt *gt)
 {
+	unsigned int fw_ref;
 	int err;
 	int i;
 
@@ -606,9 +554,46 @@ int xe_gt_init(struct xe_gt *gt)
 	if (err)
 		return err;
 
-	err = gt_fw_domain_init(gt);
+	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
+	if (!fw_ref)
+		return -ETIMEDOUT;
+
+	if (!xe_gt_is_media_type(gt)) {
+		err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
+		if (err)
+			goto err_force_wake;
+
+		if (IS_SRIOV_PF(gt_to_xe(gt)))
+			xe_lmtt_init(&gt_to_tile(gt)->sriov.pf.lmtt);
+	}
+
+	/* Enable per hw engine IRQs */
+	xe_irq_enable_hwe(gt);
+
+	/* Rerun MCR init as we now have hw engine list */
+	xe_gt_mcr_init(gt);
+
+	err = xe_hw_engines_init_early(gt);
+	if (err) {
+		dump_pat_on_error(gt);
+		goto err_force_wake;
+	}
+
+	err = xe_hw_engine_class_sysfs_init(gt);
+	if (err)
+		goto err_force_wake;
+
+	/* Initialize CCS mode sysfs after early initialization of HW engines */
+	err = xe_gt_ccs_mode_sysfs_init(gt);
 	if (err)
-		return err;
+		goto err_force_wake;
+
+	/*
+	 * Stash hardware-reported version.  Since this register does not exist
+	 * on pre-MTL platforms, reading it there will (correctly) return 0.
+	 */
+	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
+	xe_force_wake_put(gt_to_fw(gt), fw_ref);
 
 	err = xe_gt_idle_init(&gt->gtidle);
 	if (err)
@@ -620,6 +605,7 @@ int xe_gt_init(struct xe_gt *gt)
 
 	xe_force_wake_init_engines(gt, gt_to_fw(gt));
 
+	/* With forcewake initialised on engines, call remainder with all forcewake enabled */
 	err = all_fw_domain_init(gt);
 	if (err)
 		return err;
@@ -631,6 +617,10 @@ int xe_gt_init(struct xe_gt *gt)
 		return err;
 
 	return 0;
+
+err_force_wake:
+	xe_force_wake_put(gt_to_fw(gt), fw_ref);
+	return err;
 }
 
 /**
-- 
2.45.2