From: Maarten Lankhorst <dev@lankhorst.se>
To: intel-xe@lists.freedesktop.org
Cc: Maarten Lankhorst <dev@lankhorst.se>
Subject: [PATCH 7/8] drm/xe/gt: Inline all_fw_domain_init
Date: Mon, 10 Mar 2025 21:06:52 +0100 [thread overview]
Message-ID: <20250310200653.89731-8-dev@lankhorst.se> (raw)
In-Reply-To: <20250310200653.89731-1-dev@lankhorst.se>
Have only a single init function for whole of GT to keep things
readable.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_gt.c | 161 +++++++++++++++++--------------------
1 file changed, 72 insertions(+), 89 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index dfe0def966e71..31aee3301a76c 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -396,93 +396,6 @@ static void dump_pat_on_error(struct xe_gt *gt)
xe_pat_dump(gt, &p);
}
-static int all_fw_domain_init(struct xe_gt *gt)
-{
- unsigned int fw_ref;
- int err;
-
- fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
- err = -ETIMEDOUT;
- goto err_force_wake;
- }
-
- xe_gt_mcr_set_implicit_defaults(gt);
- xe_wa_process_gt(gt);
- xe_tuning_process_gt(gt);
- xe_reg_sr_apply_mmio(>->reg_sr, gt);
-
- err = xe_gt_clock_init(gt);
- if (err)
- goto err_force_wake;
-
- xe_mocs_init(gt);
- err = xe_execlist_init(gt);
- if (err)
- goto err_force_wake;
-
- err = xe_hw_engines_init(gt);
- if (err)
- goto err_force_wake;
-
- err = xe_uc_init_post_hwconfig(>->uc);
- if (err)
- goto err_force_wake;
-
- if (!xe_gt_is_media_type(gt)) {
- /*
- * USM has its only SA pool to non-block behind user operations
- */
- if (gt_to_xe(gt)->info.has_usm) {
- struct xe_device *xe = gt_to_xe(gt);
-
- gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt),
- IS_DGFX(xe) ? SZ_1M : SZ_512K, 16);
- if (IS_ERR(gt->usm.bb_pool)) {
- err = PTR_ERR(gt->usm.bb_pool);
- goto err_force_wake;
- }
- }
- }
-
- if (!xe_gt_is_media_type(gt)) {
- struct xe_tile *tile = gt_to_tile(gt);
-
- tile->migrate = xe_migrate_init(tile);
- if (IS_ERR(tile->migrate)) {
- err = PTR_ERR(tile->migrate);
- goto err_force_wake;
- }
- }
-
- err = xe_uc_init_hw(>->uc);
- if (err)
- goto err_force_wake;
-
- /* Configure default CCS mode of 1 engine with all resources */
- if (xe_gt_ccs_mode_enabled(gt)) {
- gt->ccs_mode = 1;
- xe_gt_apply_ccs_mode(gt);
- }
-
- if (IS_SRIOV_PF(gt_to_xe(gt)) && !xe_gt_is_media_type(gt))
- xe_lmtt_init_hw(>_to_tile(gt)->sriov.pf.lmtt);
-
- if (IS_SRIOV_PF(gt_to_xe(gt))) {
- xe_gt_sriov_pf_init(gt);
- xe_gt_sriov_pf_init_hw(gt);
- }
-
- xe_force_wake_put(gt_to_fw(gt), fw_ref);
-
- return 0;
-
-err_force_wake:
- xe_force_wake_put(gt_to_fw(gt), fw_ref);
-
- return err;
-}
-
/*
* Initialize enough GT to be able to load GuC in order to obtain hwconfig and
* enable CTB communication.
@@ -606,9 +519,79 @@ int xe_gt_init(struct xe_gt *gt)
xe_force_wake_init_engines(gt, gt_to_fw(gt));
/* With forcewake initialised on engines, call remainder with all forcewake enabled */
- err = all_fw_domain_init(gt);
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ err = -ETIMEDOUT;
+ goto err_force_wake;
+ }
+
+ xe_gt_mcr_set_implicit_defaults(gt);
+ xe_wa_process_gt(gt);
+ xe_tuning_process_gt(gt);
+ xe_reg_sr_apply_mmio(>->reg_sr, gt);
+
+ err = xe_gt_clock_init(gt);
if (err)
- return err;
+ goto err_force_wake;
+
+ xe_mocs_init(gt);
+ err = xe_execlist_init(gt);
+ if (err)
+ goto err_force_wake;
+
+ err = xe_hw_engines_init(gt);
+ if (err)
+ goto err_force_wake;
+
+ err = xe_uc_init_post_hwconfig(>->uc);
+ if (err)
+ goto err_force_wake;
+
+ if (!xe_gt_is_media_type(gt)) {
+ /*
+ * USM has its only SA pool to non-block behind user operations
+ */
+ if (gt_to_xe(gt)->info.has_usm) {
+ struct xe_device *xe = gt_to_xe(gt);
+
+ gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt),
+ IS_DGFX(xe) ? SZ_1M : SZ_512K, 16);
+ if (IS_ERR(gt->usm.bb_pool)) {
+ err = PTR_ERR(gt->usm.bb_pool);
+ goto err_force_wake;
+ }
+ }
+ }
+
+ if (!xe_gt_is_media_type(gt)) {
+ struct xe_tile *tile = gt_to_tile(gt);
+
+ tile->migrate = xe_migrate_init(tile);
+ if (IS_ERR(tile->migrate)) {
+ err = PTR_ERR(tile->migrate);
+ goto err_force_wake;
+ }
+ }
+
+ err = xe_uc_init_hw(>->uc);
+ if (err)
+ goto err_force_wake;
+
+ /* Configure default CCS mode of 1 engine with all resources */
+ if (xe_gt_ccs_mode_enabled(gt)) {
+ gt->ccs_mode = 1;
+ xe_gt_apply_ccs_mode(gt);
+ }
+
+ if (IS_SRIOV_PF(gt_to_xe(gt)) && !xe_gt_is_media_type(gt))
+ xe_lmtt_init_hw(>_to_tile(gt)->sriov.pf.lmtt);
+
+ if (IS_SRIOV_PF(gt_to_xe(gt))) {
+ xe_gt_sriov_pf_init(gt);
+ xe_gt_sriov_pf_init_hw(gt);
+ }
+
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_record_user_engines(gt);
--
2.45.2
next prev parent reply other threads:[~2025-03-10 20:07 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 20:06 [PATCH 0/8] drm/xe: GT initialization rework Maarten Lankhorst
2025-03-10 20:06 ` [PATCH 1/8] drm/xe: Defer memirq init until needed Maarten Lankhorst
2025-03-10 20:06 ` [PATCH 2/8] drm/xe/sriov: Move VF bootstrap and query_config to vf_guc_init Maarten Lankhorst
2025-03-10 20:06 ` [PATCH 3/8] drm/xe: Simplify GuC early initialization Maarten Lankhorst
2025-03-11 20:48 ` Lucas De Marchi
2025-03-12 10:43 ` Maarten Lankhorst
2025-04-01 19:02 ` Lucas De Marchi
2025-03-10 20:06 ` [PATCH 4/8] drm/xe: Make it possible to read instance0 MCR registers after xe_gt_mcr_init_early Maarten Lankhorst
2025-03-10 20:06 ` [PATCH 5/8] drm/xe: Only dump PAT when xe_hw_engines_init_early fails Maarten Lankhorst
2025-04-01 19:18 ` Lucas De Marchi
2025-03-10 20:06 ` [PATCH 6/8] drm/xe/gt: Inline gt_fw_domain_init Maarten Lankhorst
2025-04-01 19:21 ` Lucas De Marchi
2025-03-10 20:06 ` Maarten Lankhorst [this message]
2025-04-01 19:21 ` [PATCH 7/8] drm/xe/gt: Inline all_fw_domain_init Lucas De Marchi
2025-03-10 20:06 ` [PATCH 8/8] drm/xe: Split init of xe_gt_init_hwconfig to xe_gt_init and *_early Maarten Lankhorst
2025-03-11 20:55 ` Lucas De Marchi
2025-03-13 9:19 ` Maarten Lankhorst
2025-03-13 14:28 ` Lucas De Marchi
2025-03-13 19:23 ` Maarten Lankhorst
2025-04-01 18:56 ` Lucas De Marchi
2025-04-01 19:23 ` Lucas De Marchi
2025-03-10 22:57 ` ✓ CI.Patch_applied: success for drm/xe: GT initialization rework Patchwork
2025-03-10 22:57 ` ✗ CI.checkpatch: warning " Patchwork
2025-03-10 22:58 ` ✓ CI.KUnit: success " Patchwork
2025-03-10 23:15 ` ✓ CI.Build: " Patchwork
2025-03-10 23:17 ` ✓ CI.Hooks: " Patchwork
2025-03-10 23:18 ` ✓ CI.checksparse: " Patchwork
2025-03-11 5:58 ` ✓ Xe.CI.BAT: " Patchwork
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