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From: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
To: platform-driver-x86@vger.kernel.org,
	intel-xe@lists.freedesktop.org, hdegoede@redhat.com,
	ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com,
	rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com,
	airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com
Cc: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Subject: [PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers
Date: Fri, 27 Jun 2025 16:43:18 -0400	[thread overview]
Message-ID: <20250627204321.521628-10-michael.j.ruhl@intel.com> (raw)
In-Reply-To: <20250627204321.521628-1-michael.j.ruhl@intel.com>

The control register is used in a read/modify/write pattern.
The status register is used in a read/check bit pattern.

Add helpers to eliminate common code.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 60 ++++++++++++-----------
 1 file changed, 31 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 23b3971da40a..adaca7ce1ba5 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -64,20 +64,42 @@ struct pmt_crashlog_priv {
 /*
  * I/O
  */
-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+#define CRASHLOG_SET_BIT	true
+#define CRASHLOG_CLEAR_BIT	false
+
+/* read/modify/write */
+static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
+
+	if (set)
+		reg |= bit;
+	else
+		reg &= bit;
+
+	writel(reg, entry->disc_table + CONTROL_OFFSET);
+}
+
+/* read/check */
+static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
+{
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	return !!(reg & bit);
+}
 
+static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+{
 	/* return current value of the crashlog complete flag */
-	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
 }
 
 static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
 	/* return current value of the crashlog disabled flag */
-	return !!(control & CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -98,37 +120,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
 				     bool disable)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	/* clear trigger bits so we are only modifying disable flag */
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-
-	if (disable)
-		control |= CRASHLOG_FLAG_DISABLE;
-	else
-		control &= ~CRASHLOG_FLAG_DISABLE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
 }
 
 static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
 }
 
 static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
 }
 
 /*
-- 
2.49.0


  parent reply	other threads:[~2025-06-27 20:44 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-27 20:43 [PATCH v5 00/12] Crashlog Type1 Version2 support Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 01/12] platform/x86/intel/pmt: fix a crashlog NULL pointer access Michael J. Ruhl
2025-06-30  9:29   ` Ilpo Järvinen
2025-06-30 15:00     ` Ruhl, Michael J
2025-06-27 20:43 ` [PATCH v5 02/12] drm/xe: Correct BMG VSEC header sizing Michael J. Ruhl
2025-06-30 19:57   ` Rodrigo Vivi
2025-06-30 22:00     ` Ruhl, Michael J
2025-06-27 20:43 ` [PATCH v5 03/12] platform/x86/intel/pmt: white space cleanup Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 04/12] platform/x86/intel/pmt: mutex clean up Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 05/12] platform/x86/intel/pmt: use guard(mutex) Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 06/12] platform/x86/intel/pmt: re-order trigger logic Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 07/12] platform/x86/intel/pmt: correct types Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 08/12] platform/x86/intel/pmt: decouple sysfs and namespace Michael J. Ruhl
2025-06-27 20:43 ` Michael J. Ruhl [this message]
2025-07-02 15:50   ` [PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers Ruhl, Michael J
2025-06-27 20:43 ` [PATCH v5 10/12] platform/x86/intel/pmt: refactor base parameter Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 11/12] platform/x86/intel/pmt: use a version struct Michael J. Ruhl
2025-06-27 20:43 ` [PATCH v5 12/12] platform/x86/intel/pmt: support BMG crashlog Michael J. Ruhl
2025-06-30 20:36 ` ✓ CI.KUnit: success for Crashlog Type1 Version2 support (rev5) Patchwork
2025-06-30 21:42 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-02  3:19 ` ✗ Xe.CI.Full: failure " Patchwork

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