* [PATCH 0/6] Some migration fixes/improvements
@ 2025-10-15 14:19 Matthew Auld
2025-10-15 14:19 ` [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit Matthew Auld
` (8 more replies)
0 siblings, 9 replies; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe
Notably also cutting over to MEM_COPY instruction.
--
2.51.0
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
@ 2025-10-15 14:19 ` Matthew Auld
2025-10-16 0:36 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit Matthew Auld
` (7 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost
We allow the input size to not be aligned to PAGE_SIZE, which leads to
various bugs in build_pt_update_batch_sram() for PAGE_SIZE > 4K systems.
For example if ptes is exactly one gpu_page_size then the chunk size is
rounded down to zero. The simplest fix looks to be forcing PAGE_SIZE
aligned inputs.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 4ca48dd1cfd8..ff8e442bf519 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1798,6 +1798,8 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
u32 ptes;
int i = 0;
+ xe_tile_assert(m->tile, PAGE_ALIGNED(size));
+
ptes = DIV_ROUND_UP(size, gpu_page_size);
while (ptes) {
u32 chunk = min(MAX_PTE_PER_SDI, ptes);
@@ -1811,12 +1813,13 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
ptes -= chunk;
while (chunk--) {
- u64 addr = sram_addr[i].addr & ~(gpu_page_size - 1);
- u64 pte, orig_addr = addr;
+ u64 addr = sram_addr[i].addr;
+ u64 pte;
xe_tile_assert(m->tile, sram_addr[i].proto ==
DRM_INTERCONNECT_SYSTEM);
xe_tile_assert(m->tile, addr);
+ xe_tile_assert(m->tile, PAGE_ALIGNED(addr));
again:
pte = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe,
@@ -1827,7 +1830,7 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
if (gpu_page_size < PAGE_SIZE) {
addr += XE_PAGE_SIZE;
- if (orig_addr + PAGE_SIZE != addr) {
+ if (!PAGE_ALIGNED(addr)) {
chunk--;
goto again;
}
@@ -1918,10 +1921,10 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
if (use_pde)
build_pt_update_batch_sram(m, bb, m->large_page_copy_pdes,
- sram_addr, len + sram_offset, 1);
+ sram_addr, npages << PAGE_SHIFT, 1);
else
build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE,
- sram_addr, len + sram_offset, 0);
+ sram_addr, npages << PAGE_SHIFT, 0);
if (dir == XE_MIGRATE_COPY_TO_VRAM) {
if (use_pde)
--
2.51.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
2025-10-15 14:19 ` [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit Matthew Auld
@ 2025-10-15 14:19 ` Matthew Auld
2025-10-16 0:34 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing Matthew Auld
` (6 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost
On systems with PAGE_SIZE > 4K the chunk will likely be rounded down to
zero, if say we have single 2M page, so one huge pte, since we also try
to align the chunk to PAGE_SIZE / XE_PAGE_SIZE, which will be 16 on 64K
systems. Make the ALIGN_DOWN conditional for 4K PTEs where we can
encounter gpu_page_size < PAGE_SIZE.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index ff8e442bf519..a4861ede6cef 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1804,7 +1804,9 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
while (ptes) {
u32 chunk = min(MAX_PTE_PER_SDI, ptes);
- chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
+ if (!level)
+ chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
+
bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk);
bb->cs[bb->len++] = pt_offset;
bb->cs[bb->len++] = 0;
--
2.51.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
2025-10-15 14:19 ` [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit Matthew Auld
2025-10-15 14:19 ` [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit Matthew Auld
@ 2025-10-15 14:19 ` Matthew Auld
2025-10-16 0:36 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 4/6] drm/xe/migrate: trim " Matthew Auld
` (5 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost
In xe_migrate_vram() the copy can straddle page boundaries, so the len
might look like a single page, but actually accounting for the offset
within the page we will need to emit more than one PTE. Otherwise in
some cases the batch buffer will be undersized leading to warnings
later. We already have npages so use that instead.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index a4861ede6cef..6b6caeb5cdc6 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1894,7 +1894,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
- batch_size += pte_update_cmd_size(len);
+ batch_size += pte_update_cmd_size(npages << PAGE_SHIFT);
batch_size += EMIT_COPY_DW;
bb = xe_bb_new(gt, batch_size, use_usm_batch);
--
2.51.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 4/6] drm/xe/migrate: trim batch buffer sizing
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
` (2 preceding siblings ...)
2025-10-15 14:19 ` [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing Matthew Auld
@ 2025-10-15 14:19 ` Matthew Auld
2025-10-16 0:38 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction Matthew Auld
` (4 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost
We have an extra two dwords, but it looks like we should only need one
for the extra bb_end. Likely this is just leftover from back when the
arb handling was moved into the ring programming.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 6b6caeb5cdc6..3801152b7f8f 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -847,7 +847,7 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
&ccs_it);
while (size) {
- u32 batch_size = 2; /* arb_clear() + MI_BATCH_BUFFER_END */
+ u32 batch_size = 1; /* MI_BATCH_BUFFER_END */
struct xe_sched_job *job;
struct xe_bb *bb;
u32 flush_flags = 0;
@@ -1312,7 +1312,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
/* Calculate final sizes and batch size.. */
pte_flags = clear_vram ? PTE_UPDATE_FLAG_IS_VRAM : 0;
- batch_size = 2 +
+ batch_size = 1 +
pte_update_size(m, pte_flags, src, &src_it,
&clear_L0, &clear_L0_ofs, &clear_L0_pt,
clear_bo_data ? emit_clear_cmd_len(gt) : 0, 0,
@@ -1876,7 +1876,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
struct xe_device *xe = gt_to_xe(gt);
bool use_usm_batch = xe->info.has_usm;
struct dma_fence *fence = NULL;
- u32 batch_size = 2;
+ u32 batch_size = 1;
u64 src_L0_ofs, dst_L0_ofs;
struct xe_sched_job *job;
struct xe_bb *bb;
--
2.51.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
` (3 preceding siblings ...)
2025-10-15 14:19 ` [PATCH 4/6] drm/xe/migrate: trim " Matthew Auld
@ 2025-10-15 14:19 ` Matthew Auld
2025-10-16 0:58 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2 Matthew Auld
` (3 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost
Make this the default on xe2+ when doing a copy. This has a few
advantages over the exiting copy instruction:
1) It has a special PAGE_COPY mode that claims to be optimised for
page-in/page-out, which is the vast majority of current users.
2) It also has a simple BYTE_COPY mode that supports byte granularity
copying without any restrictions.
With 2) we can now easily skip the bounce buffer flow when copying
buffers with strange sizing/alignment, like for memory_access. But that
is left for the next patch.
BSpec: 57561
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
.../gpu/drm/xe/instructions/xe_gpu_commands.h | 6 ++
drivers/gpu/drm/xe/xe_migrate.c | 64 ++++++++++++++++---
2 files changed, 61 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
index 8cfcd3360896..5d41ca297447 100644
--- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
@@ -31,6 +31,12 @@
#define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
#define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK GENMASK(23, 20)
+#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
+#define MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
+#define MEM_COPY_MATRIX_COPY REG_BIT(17)
+#define MEM_COPY_SRC_MOCS_INDEX_MASK GENMASK(31, 28)
+#define MEM_COPY_DST_MOCS_INDEX_MASK GENMASK(6, 3)
+
#define PVC_MEM_SET_CMD (2 << 29 | 0x5b << 22)
#define PVC_MEM_SET_CMD_LEN_DW 7
#define PVC_MEM_SET_MATRIX REG_BIT(17)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 3801152b7f8f..da1fefb96070 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -699,37 +699,83 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
}
#define EMIT_COPY_DW 10
-static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
- u64 src_ofs, u64 dst_ofs, unsigned int size,
- unsigned int pitch)
+static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
+ u64 dst_ofs, unsigned int size,
+ unsigned int pitch)
{
struct xe_device *xe = gt_to_xe(gt);
- u32 mocs = 0;
u32 tile_y = 0;
+ xe_gt_assert(gt, GRAPHICS_VER(xe) < 20);
xe_gt_assert(gt, !(pitch & 3));
xe_gt_assert(gt, size / pitch <= S16_MAX);
xe_gt_assert(gt, pitch / 4 <= S16_MAX);
xe_gt_assert(gt, pitch <= U16_MAX);
- if (GRAPHICS_VER(xe) >= 20)
- mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);
-
if (GRAPHICS_VERx100(xe) >= 1250)
tile_y = XY_FAST_COPY_BLT_D1_SRC_TILE4 | XY_FAST_COPY_BLT_D1_DST_TILE4;
bb->cs[bb->len++] = XY_FAST_COPY_BLT_CMD | (10 - 2);
- bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y | mocs;
+ bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y;
bb->cs[bb->len++] = 0;
bb->cs[bb->len++] = (size / pitch) << 16 | pitch / 4;
bb->cs[bb->len++] = lower_32_bits(dst_ofs);
bb->cs[bb->len++] = upper_32_bits(dst_ofs);
bb->cs[bb->len++] = 0;
- bb->cs[bb->len++] = pitch | mocs;
+ bb->cs[bb->len++] = pitch;
bb->cs[bb->len++] = lower_32_bits(src_ofs);
bb->cs[bb->len++] = upper_32_bits(src_ofs);
}
+static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
+ u64 dst_ofs, unsigned int size, unsigned int pitch)
+{
+ u32 mode, copy_type, width;
+
+ xe_gt_assert(gt, IS_ALIGNED(size, pitch));
+ xe_gt_assert(gt, pitch <= U16_MAX);
+ xe_gt_assert(gt, size);
+
+ if (IS_ALIGNED(size, 256) &&
+ IS_ALIGNED(lower_32_bits(src_ofs), 256) &&
+ IS_ALIGNED(lower_32_bits(dst_ofs), 256)) {
+ mode = MEM_COPY_PAGE_COPY_MODE;
+ copy_type = 0; /* linear copy */
+ width = size / 256;
+ } else {
+ xe_gt_assert(gt, size / pitch <= U16_MAX);
+ mode = 0; /* BYTE_COPY */
+ copy_type = MEM_COPY_MATRIX_COPY;
+ width = pitch;
+ }
+
+ xe_gt_assert(gt, width <= U16_MAX);
+
+ bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
+ bb->cs[bb->len++] = width - 1;
+ bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
+ bb->cs[bb->len++] = pitch - 1;
+ bb->cs[bb->len++] = pitch - 1;
+ bb->cs[bb->len++] = lower_32_bits(src_ofs);
+ bb->cs[bb->len++] = upper_32_bits(src_ofs);
+ bb->cs[bb->len++] = lower_32_bits(dst_ofs);
+ bb->cs[bb->len++] = upper_32_bits(dst_ofs);
+ bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
+ FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
+}
+
+static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
+ u64 src_ofs, u64 dst_ofs, unsigned int size,
+ unsigned int pitch)
+{
+ struct xe_device *xe = gt_to_xe(gt);
+
+ if (GRAPHICS_VER(xe) >= 20)
+ emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
+ else
+ emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
+}
+
static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
{
return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
--
2.51.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
` (4 preceding siblings ...)
2025-10-15 14:19 ` [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction Matthew Auld
@ 2025-10-15 14:19 ` Matthew Auld
2025-10-16 21:28 ` Matthew Brost
2025-10-15 22:58 ` ✓ CI.KUnit: success for Some migration fixes/improvements Patchwork
` (2 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-15 14:19 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost
Now that we support MEM_COPY we should be able to use the PAGE_COPY
mode, otherwise falling back to BYTE_COPY mode when we have odd
sizing/alignment.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index da1fefb96070..8bd8e8179313 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1933,9 +1933,11 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
int err;
unsigned long i, j;
bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
+ bool has_byte_copy = GRAPHICS_VER(xe) >= 20;
- if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
- (sram_offset | vram_addr) & XE_CACHELINE_MASK))
+ if (!has_byte_copy &&
+ drm_WARN_ON(&xe->drm,
+ (len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
return ERR_PTR(-EOPNOTSUPP);
xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
@@ -2149,13 +2151,14 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
struct drm_pagemap_addr *pagemap_addr;
unsigned long page_offset = (unsigned long)buf & ~PAGE_MASK;
int bytes_left = len, current_page = 0;
+ bool has_byte_copy = GRAPHICS_VER(xe) >= 20;
void *orig_buf = buf;
xe_bo_assert_held(bo);
/* Use bounce buffer for small access and unaligned access */
- if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
- !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
+ if (!has_byte_copy && (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
+ !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
int buf_offset = 0;
void *bounce;
int err;
--
2.51.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* ✓ CI.KUnit: success for Some migration fixes/improvements
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
` (5 preceding siblings ...)
2025-10-15 14:19 ` [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2 Matthew Auld
@ 2025-10-15 22:58 ` Patchwork
2025-10-15 23:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-16 16:08 ` ✓ Xe.CI.Full: " Patchwork
8 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-10-15 22:58 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
== Series Details ==
Series: Some migration fixes/improvements
URL : https://patchwork.freedesktop.org/series/155997/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:56:47] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:56:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:57:22] Starting KUnit Kernel (1/1)...
[22:57:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:57:22] ================== guc_buf (11 subtests) ===================
[22:57:22] [PASSED] test_smallest
[22:57:22] [PASSED] test_largest
[22:57:22] [PASSED] test_granular
[22:57:22] [PASSED] test_unique
[22:57:22] [PASSED] test_overlap
[22:57:22] [PASSED] test_reusable
[22:57:22] [PASSED] test_too_big
[22:57:22] [PASSED] test_flush
[22:57:22] [PASSED] test_lookup
[22:57:22] [PASSED] test_data
[22:57:22] [PASSED] test_class
[22:57:22] ===================== [PASSED] guc_buf =====================
[22:57:22] =================== guc_dbm (7 subtests) ===================
[22:57:22] [PASSED] test_empty
[22:57:22] [PASSED] test_default
[22:57:22] ======================== test_size ========================
[22:57:22] [PASSED] 4
[22:57:22] [PASSED] 8
[22:57:22] [PASSED] 32
[22:57:22] [PASSED] 256
[22:57:22] ==================== [PASSED] test_size ====================
[22:57:22] ======================= test_reuse ========================
[22:57:22] [PASSED] 4
[22:57:22] [PASSED] 8
[22:57:22] [PASSED] 32
[22:57:22] [PASSED] 256
[22:57:22] =================== [PASSED] test_reuse ====================
[22:57:22] =================== test_range_overlap ====================
[22:57:22] [PASSED] 4
[22:57:22] [PASSED] 8
[22:57:22] [PASSED] 32
[22:57:22] [PASSED] 256
[22:57:22] =============== [PASSED] test_range_overlap ================
[22:57:22] =================== test_range_compact ====================
[22:57:22] [PASSED] 4
[22:57:22] [PASSED] 8
[22:57:22] [PASSED] 32
[22:57:22] [PASSED] 256
[22:57:22] =============== [PASSED] test_range_compact ================
[22:57:22] ==================== test_range_spare =====================
[22:57:22] [PASSED] 4
[22:57:22] [PASSED] 8
[22:57:22] [PASSED] 32
[22:57:22] [PASSED] 256
[22:57:22] ================ [PASSED] test_range_spare =================
[22:57:22] ===================== [PASSED] guc_dbm =====================
[22:57:22] =================== guc_idm (6 subtests) ===================
[22:57:22] [PASSED] bad_init
[22:57:22] [PASSED] no_init
[22:57:22] [PASSED] init_fini
[22:57:22] [PASSED] check_used
[22:57:22] [PASSED] check_quota
[22:57:22] [PASSED] check_all
[22:57:22] ===================== [PASSED] guc_idm =====================
[22:57:22] ================== no_relay (3 subtests) ===================
[22:57:22] [PASSED] xe_drops_guc2pf_if_not_ready
[22:57:22] [PASSED] xe_drops_guc2vf_if_not_ready
[22:57:22] [PASSED] xe_rejects_send_if_not_ready
[22:57:22] ==================== [PASSED] no_relay =====================
[22:57:22] ================== pf_relay (14 subtests) ==================
[22:57:22] [PASSED] pf_rejects_guc2pf_too_short
[22:57:22] [PASSED] pf_rejects_guc2pf_too_long
[22:57:22] [PASSED] pf_rejects_guc2pf_no_payload
[22:57:22] [PASSED] pf_fails_no_payload
[22:57:22] [PASSED] pf_fails_bad_origin
[22:57:22] [PASSED] pf_fails_bad_type
[22:57:22] [PASSED] pf_txn_reports_error
[22:57:22] [PASSED] pf_txn_sends_pf2guc
[22:57:22] [PASSED] pf_sends_pf2guc
[22:57:22] [SKIPPED] pf_loopback_nop
[22:57:22] [SKIPPED] pf_loopback_echo
[22:57:22] [SKIPPED] pf_loopback_fail
[22:57:22] [SKIPPED] pf_loopback_busy
[22:57:22] [SKIPPED] pf_loopback_retry
[22:57:22] ==================== [PASSED] pf_relay =====================
[22:57:22] ================== vf_relay (3 subtests) ===================
[22:57:22] [PASSED] vf_rejects_guc2vf_too_short
[22:57:22] [PASSED] vf_rejects_guc2vf_too_long
[22:57:22] [PASSED] vf_rejects_guc2vf_no_payload
[22:57:22] ==================== [PASSED] vf_relay =====================
[22:57:22] ===================== lmtt (1 subtest) =====================
[22:57:22] ======================== test_ops =========================
[22:57:22] [PASSED] 2-level
[22:57:22] [PASSED] multi-level
[22:57:22] ==================== [PASSED] test_ops =====================
[22:57:22] ====================== [PASSED] lmtt =======================
[22:57:22] ================= pf_service (11 subtests) =================
[22:57:22] [PASSED] pf_negotiate_any
[22:57:22] [PASSED] pf_negotiate_base_match
[22:57:22] [PASSED] pf_negotiate_base_newer
[22:57:22] [PASSED] pf_negotiate_base_next
[22:57:22] [SKIPPED] pf_negotiate_base_older
[22:57:22] [PASSED] pf_negotiate_base_prev
[22:57:22] [PASSED] pf_negotiate_latest_match
[22:57:22] [PASSED] pf_negotiate_latest_newer
[22:57:22] [PASSED] pf_negotiate_latest_next
[22:57:22] [SKIPPED] pf_negotiate_latest_older
[22:57:22] [SKIPPED] pf_negotiate_latest_prev
[22:57:22] =================== [PASSED] pf_service ====================
[22:57:22] ================= xe_guc_g2g (2 subtests) ==================
[22:57:22] ============== xe_live_guc_g2g_kunit_default ==============
[22:57:22] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:57:22] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:57:22] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:57:22] =================== [SKIPPED] xe_guc_g2g ===================
[22:57:22] =================== xe_mocs (2 subtests) ===================
[22:57:22] ================ xe_live_mocs_kernel_kunit ================
[22:57:22] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:57:22] ================ xe_live_mocs_reset_kunit =================
[22:57:22] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:57:22] ==================== [SKIPPED] xe_mocs =====================
[22:57:22] ================= xe_migrate (2 subtests) ==================
[22:57:22] ================= xe_migrate_sanity_kunit =================
[22:57:22] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:57:22] ================== xe_validate_ccs_kunit ==================
[22:57:22] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:57:22] =================== [SKIPPED] xe_migrate ===================
[22:57:22] ================== xe_dma_buf (1 subtest) ==================
[22:57:22] ==================== xe_dma_buf_kunit =====================
[22:57:22] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:57:22] =================== [SKIPPED] xe_dma_buf ===================
[22:57:22] ================= xe_bo_shrink (1 subtest) =================
[22:57:22] =================== xe_bo_shrink_kunit ====================
[22:57:22] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:57:22] ================== [SKIPPED] xe_bo_shrink ==================
[22:57:22] ==================== xe_bo (2 subtests) ====================
[22:57:22] ================== xe_ccs_migrate_kunit ===================
[22:57:22] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:57:22] ==================== xe_bo_evict_kunit ====================
[22:57:22] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:57:22] ===================== [SKIPPED] xe_bo ======================
[22:57:22] ==================== args (11 subtests) ====================
[22:57:22] [PASSED] count_args_test
[22:57:22] [PASSED] call_args_example
[22:57:22] [PASSED] call_args_test
[22:57:22] [PASSED] drop_first_arg_example
[22:57:22] [PASSED] drop_first_arg_test
[22:57:22] [PASSED] first_arg_example
[22:57:22] [PASSED] first_arg_test
[22:57:22] [PASSED] last_arg_example
[22:57:22] [PASSED] last_arg_test
[22:57:22] [PASSED] pick_arg_example
[22:57:22] [PASSED] sep_comma_example
[22:57:22] ====================== [PASSED] args =======================
[22:57:22] =================== xe_pci (3 subtests) ====================
[22:57:22] ==================== check_graphics_ip ====================
[22:57:22] [PASSED] 12.00 Xe_LP
[22:57:22] [PASSED] 12.10 Xe_LP+
[22:57:22] [PASSED] 12.55 Xe_HPG
[22:57:22] [PASSED] 12.60 Xe_HPC
[22:57:22] [PASSED] 12.70 Xe_LPG
[22:57:22] [PASSED] 12.71 Xe_LPG
[22:57:22] [PASSED] 12.74 Xe_LPG+
[22:57:22] [PASSED] 20.01 Xe2_HPG
[22:57:22] [PASSED] 20.02 Xe2_HPG
[22:57:22] [PASSED] 20.04 Xe2_LPG
[22:57:22] [PASSED] 30.00 Xe3_LPG
[22:57:22] [PASSED] 30.01 Xe3_LPG
[22:57:22] [PASSED] 30.03 Xe3_LPG
[22:57:22] ================ [PASSED] check_graphics_ip ================
[22:57:22] ===================== check_media_ip ======================
[22:57:22] [PASSED] 12.00 Xe_M
[22:57:22] [PASSED] 12.55 Xe_HPM
[22:57:22] [PASSED] 13.00 Xe_LPM+
[22:57:22] [PASSED] 13.01 Xe2_HPM
[22:57:22] [PASSED] 20.00 Xe2_LPM
[22:57:22] [PASSED] 30.00 Xe3_LPM
[22:57:22] [PASSED] 30.02 Xe3_LPM
[22:57:22] ================= [PASSED] check_media_ip ==================
[22:57:22] ================= check_platform_gt_count =================
[22:57:22] [PASSED] 0x9A60 (TIGERLAKE)
[22:57:22] [PASSED] 0x9A68 (TIGERLAKE)
[22:57:22] [PASSED] 0x9A70 (TIGERLAKE)
[22:57:22] [PASSED] 0x9A40 (TIGERLAKE)
[22:57:22] [PASSED] 0x9A49 (TIGERLAKE)
[22:57:22] [PASSED] 0x9A59 (TIGERLAKE)
[22:57:22] [PASSED] 0x9A78 (TIGERLAKE)
[22:57:22] [PASSED] 0x9AC0 (TIGERLAKE)
[22:57:22] [PASSED] 0x9AC9 (TIGERLAKE)
[22:57:22] [PASSED] 0x9AD9 (TIGERLAKE)
[22:57:22] [PASSED] 0x9AF8 (TIGERLAKE)
[22:57:22] [PASSED] 0x4C80 (ROCKETLAKE)
[22:57:22] [PASSED] 0x4C8A (ROCKETLAKE)
[22:57:22] [PASSED] 0x4C8B (ROCKETLAKE)
[22:57:22] [PASSED] 0x4C8C (ROCKETLAKE)
[22:57:22] [PASSED] 0x4C90 (ROCKETLAKE)
[22:57:22] [PASSED] 0x4C9A (ROCKETLAKE)
[22:57:22] [PASSED] 0x4680 (ALDERLAKE_S)
[22:57:22] [PASSED] 0x4682 (ALDERLAKE_S)
[22:57:22] [PASSED] 0x4688 (ALDERLAKE_S)
[22:57:22] [PASSED] 0x468A (ALDERLAKE_S)
[22:57:22] [PASSED] 0x468B (ALDERLAKE_S)
[22:57:22] [PASSED] 0x4690 (ALDERLAKE_S)
[22:57:22] [PASSED] 0x4692 (ALDERLAKE_S)
[22:57:22] [PASSED] 0x4693 (ALDERLAKE_S)
[22:57:22] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46AA (ALDERLAKE_P)
[22:57:22] [PASSED] 0x462A (ALDERLAKE_P)
[22:57:22] [PASSED] 0x4626 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x4628 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:57:22] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:57:22] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:57:22] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:57:22] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:57:22] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:57:22] [PASSED] 0xA721 (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA720 (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:57:22] [PASSED] 0xA780 (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA781 (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA782 (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA783 (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA788 (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA789 (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA78A (ALDERLAKE_S)
[22:57:22] [PASSED] 0xA78B (ALDERLAKE_S)
[22:57:22] [PASSED] 0x4905 (DG1)
[22:57:22] [PASSED] 0x4906 (DG1)
[22:57:22] [PASSED] 0x4907 (DG1)
[22:57:22] [PASSED] 0x4908 (DG1)
[22:57:22] [PASSED] 0x4909 (DG1)
[22:57:22] [PASSED] 0x56C0 (DG2)
[22:57:22] [PASSED] 0x56C2 (DG2)
[22:57:22] [PASSED] 0x56C1 (DG2)
[22:57:22] [PASSED] 0x7D51 (METEORLAKE)
[22:57:22] [PASSED] 0x7DD1 (METEORLAKE)
[22:57:22] [PASSED] 0x7D41 (METEORLAKE)
[22:57:22] [PASSED] 0x7D67 (METEORLAKE)
[22:57:22] [PASSED] 0xB640 (METEORLAKE)
[22:57:22] [PASSED] 0x56A0 (DG2)
[22:57:22] [PASSED] 0x56A1 (DG2)
[22:57:22] [PASSED] 0x56A2 (DG2)
[22:57:22] [PASSED] 0x56BE (DG2)
[22:57:22] [PASSED] 0x56BF (DG2)
[22:57:22] [PASSED] 0x5690 (DG2)
[22:57:22] [PASSED] 0x5691 (DG2)
[22:57:22] [PASSED] 0x5692 (DG2)
[22:57:22] [PASSED] 0x56A5 (DG2)
[22:57:22] [PASSED] 0x56A6 (DG2)
[22:57:22] [PASSED] 0x56B0 (DG2)
[22:57:22] [PASSED] 0x56B1 (DG2)
[22:57:22] [PASSED] 0x56BA (DG2)
[22:57:22] [PASSED] 0x56BB (DG2)
[22:57:22] [PASSED] 0x56BC (DG2)
[22:57:22] [PASSED] 0x56BD (DG2)
[22:57:22] [PASSED] 0x5693 (DG2)
[22:57:22] [PASSED] 0x5694 (DG2)
[22:57:22] [PASSED] 0x5695 (DG2)
[22:57:22] [PASSED] 0x56A3 (DG2)
[22:57:22] [PASSED] 0x56A4 (DG2)
[22:57:22] [PASSED] 0x56B2 (DG2)
[22:57:22] [PASSED] 0x56B3 (DG2)
[22:57:22] [PASSED] 0x5696 (DG2)
[22:57:22] [PASSED] 0x5697 (DG2)
[22:57:22] [PASSED] 0xB69 (PVC)
[22:57:22] [PASSED] 0xB6E (PVC)
[22:57:22] [PASSED] 0xBD4 (PVC)
[22:57:22] [PASSED] 0xBD5 (PVC)
[22:57:22] [PASSED] 0xBD6 (PVC)
[22:57:22] [PASSED] 0xBD7 (PVC)
[22:57:22] [PASSED] 0xBD8 (PVC)
[22:57:22] [PASSED] 0xBD9 (PVC)
[22:57:22] [PASSED] 0xBDA (PVC)
[22:57:22] [PASSED] 0xBDB (PVC)
[22:57:22] [PASSED] 0xBE0 (PVC)
[22:57:22] [PASSED] 0xBE1 (PVC)
[22:57:22] [PASSED] 0xBE5 (PVC)
[22:57:22] [PASSED] 0x7D40 (METEORLAKE)
[22:57:22] [PASSED] 0x7D45 (METEORLAKE)
[22:57:22] [PASSED] 0x7D55 (METEORLAKE)
[22:57:22] [PASSED] 0x7D60 (METEORLAKE)
[22:57:22] [PASSED] 0x7DD5 (METEORLAKE)
[22:57:22] [PASSED] 0x6420 (LUNARLAKE)
[22:57:22] [PASSED] 0x64A0 (LUNARLAKE)
[22:57:22] [PASSED] 0x64B0 (LUNARLAKE)
[22:57:22] [PASSED] 0xE202 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE209 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE20B (BATTLEMAGE)
[22:57:22] [PASSED] 0xE20C (BATTLEMAGE)
[22:57:22] [PASSED] 0xE20D (BATTLEMAGE)
[22:57:22] [PASSED] 0xE210 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE211 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE212 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE216 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE220 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE221 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE222 (BATTLEMAGE)
[22:57:22] [PASSED] 0xE223 (BATTLEMAGE)
[22:57:22] [PASSED] 0xB080 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB081 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB082 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB083 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB084 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB085 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB086 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB087 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB08F (PANTHERLAKE)
[22:57:22] [PASSED] 0xB090 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:57:22] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:57:22] [PASSED] 0xFD80 (PANTHERLAKE)
[22:57:22] [PASSED] 0xFD81 (PANTHERLAKE)
[22:57:22] ============= [PASSED] check_platform_gt_count =============
[22:57:22] ===================== [PASSED] xe_pci ======================
[22:57:22] =================== xe_rtp (2 subtests) ====================
[22:57:22] =============== xe_rtp_process_to_sr_tests ================
[22:57:22] [PASSED] coalesce-same-reg
[22:57:22] [PASSED] no-match-no-add
[22:57:22] [PASSED] match-or
[22:57:22] [PASSED] match-or-xfail
[22:57:22] [PASSED] no-match-no-add-multiple-rules
[22:57:22] [PASSED] two-regs-two-entries
[22:57:22] [PASSED] clr-one-set-other
[22:57:22] [PASSED] set-field
[22:57:22] [PASSED] conflict-duplicate
[22:57:22] [PASSED] conflict-not-disjoint
[22:57:22] [PASSED] conflict-reg-type
[22:57:22] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:57:22] ================== xe_rtp_process_tests ===================
[22:57:22] [PASSED] active1
[22:57:22] [PASSED] active2
[22:57:22] [PASSED] active-inactive
[22:57:22] [PASSED] inactive-active
[22:57:22] [PASSED] inactive-1st_or_active-inactive
[22:57:22] [PASSED] inactive-2nd_or_active-inactive
[22:57:22] [PASSED] inactive-last_or_active-inactive
[22:57:22] [PASSED] inactive-no_or_active-inactive
[22:57:22] ============== [PASSED] xe_rtp_process_tests ===============
[22:57:22] ===================== [PASSED] xe_rtp ======================
[22:57:22] ==================== xe_wa (1 subtest) =====================
[22:57:22] ======================== xe_wa_gt =========================
[22:57:22] [PASSED] TIGERLAKE B0
[22:57:22] [PASSED] DG1 A0
[22:57:22] [PASSED] DG1 B0
[22:57:22] [PASSED] ALDERLAKE_S A0
[22:57:22] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[22:57:22] [PASSED] ALDERLAKE_S C0
[22:57:22] [PASSED] ALDERLAKE_S D0
[22:57:22] [PASSED] ALDERLAKE_P A0
[22:57:22] [PASSED] ALDERLAKE_P B0
[22:57:22] [PASSED] ALDERLAKE_P C0
[22:57:22] [PASSED] ALDERLAKE_S RPLS D0
[22:57:22] [PASSED] ALDERLAKE_P RPLU E0
[22:57:22] [PASSED] DG2 G10 C0
[22:57:22] [PASSED] DG2 G11 B1
[22:57:22] [PASSED] DG2 G12 A1
[22:57:22] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:57:22] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:57:22] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:57:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:57:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:57:22] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:57:22] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:57:22] ==================== [PASSED] xe_wa_gt =====================
[22:57:22] ====================== [PASSED] xe_wa ======================
[22:57:22] ============================================================
[22:57:22] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[22:57:22] Elapsed time: 34.920s total, 4.265s configuring, 30.289s building, 0.341s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:57:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:57:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:57:48] Starting KUnit Kernel (1/1)...
[22:57:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:57:49] ============ drm_test_pick_cmdline (2 subtests) ============
[22:57:49] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:57:49] =============== drm_test_pick_cmdline_named ===============
[22:57:49] [PASSED] NTSC
[22:57:49] [PASSED] NTSC-J
[22:57:49] [PASSED] PAL
[22:57:49] [PASSED] PAL-M
[22:57:49] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:57:49] ============== [PASSED] drm_test_pick_cmdline ==============
[22:57:49] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:57:49] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:57:49] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:57:49] =========== drm_validate_clone_mode (2 subtests) ===========
[22:57:49] ============== drm_test_check_in_clone_mode ===============
[22:57:49] [PASSED] in_clone_mode
[22:57:49] [PASSED] not_in_clone_mode
[22:57:49] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:57:49] =============== drm_test_check_valid_clones ===============
[22:57:49] [PASSED] not_in_clone_mode
[22:57:49] [PASSED] valid_clone
[22:57:49] [PASSED] invalid_clone
[22:57:49] =========== [PASSED] drm_test_check_valid_clones ===========
[22:57:49] ============= [PASSED] drm_validate_clone_mode =============
[22:57:49] ============= drm_validate_modeset (1 subtest) =============
[22:57:49] [PASSED] drm_test_check_connector_changed_modeset
[22:57:49] ============== [PASSED] drm_validate_modeset ===============
[22:57:49] ====== drm_test_bridge_get_current_state (2 subtests) ======
[22:57:49] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:57:49] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[22:57:49] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:57:49] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:57:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:57:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:57:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[22:57:49] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:57:49] ============== drm_bridge_alloc (2 subtests) ===============
[22:57:49] [PASSED] drm_test_drm_bridge_alloc_basic
[22:57:49] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:57:49] ================ [PASSED] drm_bridge_alloc =================
[22:57:49] ================== drm_buddy (8 subtests) ==================
[22:57:49] [PASSED] drm_test_buddy_alloc_limit
[22:57:49] [PASSED] drm_test_buddy_alloc_optimistic
[22:57:49] [PASSED] drm_test_buddy_alloc_pessimistic
[22:57:49] [PASSED] drm_test_buddy_alloc_pathological
[22:57:49] [PASSED] drm_test_buddy_alloc_contiguous
[22:57:49] [PASSED] drm_test_buddy_alloc_clear
[22:57:49] [PASSED] drm_test_buddy_alloc_range_bias
[22:57:49] [PASSED] drm_test_buddy_fragmentation_performance
[22:57:49] ==================== [PASSED] drm_buddy ====================
[22:57:49] ============= drm_cmdline_parser (40 subtests) =============
[22:57:49] [PASSED] drm_test_cmdline_force_d_only
[22:57:49] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:57:49] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:57:49] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:57:49] [PASSED] drm_test_cmdline_force_e_only
[22:57:49] [PASSED] drm_test_cmdline_res
[22:57:49] [PASSED] drm_test_cmdline_res_vesa
[22:57:49] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:57:49] [PASSED] drm_test_cmdline_res_rblank
[22:57:49] [PASSED] drm_test_cmdline_res_bpp
[22:57:49] [PASSED] drm_test_cmdline_res_refresh
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:57:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:57:49] [PASSED] drm_test_cmdline_res_margins_force_on
[22:57:49] [PASSED] drm_test_cmdline_res_vesa_margins
[22:57:49] [PASSED] drm_test_cmdline_name
[22:57:49] [PASSED] drm_test_cmdline_name_bpp
[22:57:49] [PASSED] drm_test_cmdline_name_option
[22:57:49] [PASSED] drm_test_cmdline_name_bpp_option
[22:57:49] [PASSED] drm_test_cmdline_rotate_0
[22:57:49] [PASSED] drm_test_cmdline_rotate_90
[22:57:49] [PASSED] drm_test_cmdline_rotate_180
[22:57:49] [PASSED] drm_test_cmdline_rotate_270
[22:57:49] [PASSED] drm_test_cmdline_hmirror
[22:57:49] [PASSED] drm_test_cmdline_vmirror
[22:57:49] [PASSED] drm_test_cmdline_margin_options
[22:57:49] [PASSED] drm_test_cmdline_multiple_options
[22:57:49] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:57:49] [PASSED] drm_test_cmdline_extra_and_option
[22:57:49] [PASSED] drm_test_cmdline_freestanding_options
[22:57:49] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:57:49] [PASSED] drm_test_cmdline_panel_orientation
[22:57:49] ================ drm_test_cmdline_invalid =================
[22:57:49] [PASSED] margin_only
[22:57:49] [PASSED] interlace_only
[22:57:49] [PASSED] res_missing_x
[22:57:49] [PASSED] res_missing_y
[22:57:49] [PASSED] res_bad_y
[22:57:49] [PASSED] res_missing_y_bpp
[22:57:49] [PASSED] res_bad_bpp
[22:57:49] [PASSED] res_bad_refresh
[22:57:49] [PASSED] res_bpp_refresh_force_on_off
[22:57:49] [PASSED] res_invalid_mode
[22:57:49] [PASSED] res_bpp_wrong_place_mode
[22:57:49] [PASSED] name_bpp_refresh
[22:57:49] [PASSED] name_refresh
[22:57:49] [PASSED] name_refresh_wrong_mode
[22:57:49] [PASSED] name_refresh_invalid_mode
[22:57:49] [PASSED] rotate_multiple
[22:57:49] [PASSED] rotate_invalid_val
[22:57:49] [PASSED] rotate_truncated
[22:57:49] [PASSED] invalid_option
[22:57:49] [PASSED] invalid_tv_option
[22:57:49] [PASSED] truncated_tv_option
[22:57:49] ============ [PASSED] drm_test_cmdline_invalid =============
[22:57:49] =============== drm_test_cmdline_tv_options ===============
[22:57:49] [PASSED] NTSC
[22:57:49] [PASSED] NTSC_443
[22:57:49] [PASSED] NTSC_J
[22:57:49] [PASSED] PAL
[22:57:49] [PASSED] PAL_M
[22:57:49] [PASSED] PAL_N
[22:57:49] [PASSED] SECAM
[22:57:49] [PASSED] MONO_525
[22:57:49] [PASSED] MONO_625
[22:57:49] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:57:49] =============== [PASSED] drm_cmdline_parser ================
[22:57:49] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:57:49] [PASSED] drm_test_connector_hdmi_init_valid
[22:57:49] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:57:49] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:57:49] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:57:49] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:57:49] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:57:49] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:57:49] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:57:49] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:57:49] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:57:49] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:57:49] [PASSED] supported_formats=0x3 yuv420_allowed=1
[22:57:49] [PASSED] supported_formats=0x3 yuv420_allowed=0
[22:57:49] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:57:49] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:57:49] [PASSED] drm_test_connector_hdmi_init_null_product
[22:57:49] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:57:49] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:57:49] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:57:49] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:57:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:57:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:57:49] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:57:49] ========= drm_test_connector_hdmi_init_type_valid =========
[22:57:49] [PASSED] HDMI-A
[22:57:49] [PASSED] HDMI-B
[22:57:49] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:57:49] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:57:49] [PASSED] Unknown
[22:57:49] [PASSED] VGA
[22:57:49] [PASSED] DVI-I
[22:57:49] [PASSED] DVI-D
[22:57:49] [PASSED] DVI-A
[22:57:49] [PASSED] Composite
[22:57:49] [PASSED] SVIDEO
[22:57:49] [PASSED] LVDS
[22:57:49] [PASSED] Component
[22:57:49] [PASSED] DIN
[22:57:49] [PASSED] DP
[22:57:49] [PASSED] TV
[22:57:49] [PASSED] eDP
[22:57:49] [PASSED] Virtual
[22:57:49] [PASSED] DSI
[22:57:49] [PASSED] DPI
[22:57:49] [PASSED] Writeback
[22:57:49] [PASSED] SPI
[22:57:49] [PASSED] USB
[22:57:49] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:57:49] ============ [PASSED] drmm_connector_hdmi_init =============
[22:57:49] ============= drmm_connector_init (3 subtests) =============
[22:57:49] [PASSED] drm_test_drmm_connector_init
[22:57:49] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:57:49] ========= drm_test_drmm_connector_init_type_valid =========
[22:57:49] [PASSED] Unknown
[22:57:49] [PASSED] VGA
[22:57:49] [PASSED] DVI-I
[22:57:49] [PASSED] DVI-D
[22:57:49] [PASSED] DVI-A
[22:57:49] [PASSED] Composite
[22:57:49] [PASSED] SVIDEO
[22:57:49] [PASSED] LVDS
[22:57:49] [PASSED] Component
[22:57:49] [PASSED] DIN
[22:57:49] [PASSED] DP
[22:57:49] [PASSED] HDMI-A
[22:57:49] [PASSED] HDMI-B
[22:57:49] [PASSED] TV
[22:57:49] [PASSED] eDP
[22:57:49] [PASSED] Virtual
[22:57:49] [PASSED] DSI
[22:57:49] [PASSED] DPI
[22:57:49] [PASSED] Writeback
[22:57:49] [PASSED] SPI
[22:57:49] [PASSED] USB
[22:57:49] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:57:49] =============== [PASSED] drmm_connector_init ===============
[22:57:49] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_init
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:57:49] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:57:49] [PASSED] Unknown
[22:57:49] [PASSED] VGA
[22:57:49] [PASSED] DVI-I
[22:57:49] [PASSED] DVI-D
[22:57:49] [PASSED] DVI-A
[22:57:49] [PASSED] Composite
[22:57:49] [PASSED] SVIDEO
[22:57:49] [PASSED] LVDS
[22:57:49] [PASSED] Component
[22:57:49] [PASSED] DIN
[22:57:49] [PASSED] DP
[22:57:49] [PASSED] HDMI-A
[22:57:49] [PASSED] HDMI-B
[22:57:49] [PASSED] TV
[22:57:49] [PASSED] eDP
[22:57:49] [PASSED] Virtual
[22:57:49] [PASSED] DSI
[22:57:49] [PASSED] DPI
[22:57:49] [PASSED] Writeback
[22:57:49] [PASSED] SPI
[22:57:49] [PASSED] USB
[22:57:49] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:57:49] ======== drm_test_drm_connector_dynamic_init_name =========
[22:57:49] [PASSED] Unknown
[22:57:49] [PASSED] VGA
[22:57:49] [PASSED] DVI-I
[22:57:49] [PASSED] DVI-D
[22:57:49] [PASSED] DVI-A
[22:57:49] [PASSED] Composite
[22:57:49] [PASSED] SVIDEO
[22:57:49] [PASSED] LVDS
[22:57:49] [PASSED] Component
[22:57:49] [PASSED] DIN
[22:57:49] [PASSED] DP
[22:57:49] [PASSED] HDMI-A
[22:57:49] [PASSED] HDMI-B
[22:57:49] [PASSED] TV
[22:57:49] [PASSED] eDP
[22:57:49] [PASSED] Virtual
[22:57:49] [PASSED] DSI
[22:57:49] [PASSED] DPI
[22:57:49] [PASSED] Writeback
[22:57:49] [PASSED] SPI
[22:57:49] [PASSED] USB
[22:57:49] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:57:49] =========== [PASSED] drm_connector_dynamic_init ============
[22:57:49] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:57:49] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:57:49] ======= drm_connector_dynamic_register (7 subtests) ========
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:57:49] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:57:49] ========= [PASSED] drm_connector_dynamic_register ==========
[22:57:49] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:57:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:57:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:57:49] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:57:49] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:57:49] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:57:49] [PASSED] NTSC
[22:57:49] [PASSED] NTSC-443
[22:57:49] [PASSED] NTSC-J
[22:57:49] [PASSED] PAL
[22:57:49] [PASSED] PAL-M
[22:57:49] [PASSED] PAL-N
[22:57:49] [PASSED] SECAM
[22:57:49] [PASSED] Mono
[22:57:49] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:57:49] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:57:49] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:57:49] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:57:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:57:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:57:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:57:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:57:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:57:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:57:49] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:57:49] [PASSED] VIC 96
[22:57:49] [PASSED] VIC 97
[22:57:49] [PASSED] VIC 101
[22:57:49] [PASSED] VIC 102
[22:57:49] [PASSED] VIC 106
[22:57:49] [PASSED] VIC 107
[22:57:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:57:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:57:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:57:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:57:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:57:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:57:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:57:49] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:57:49] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:57:49] [PASSED] Automatic
[22:57:49] [PASSED] Full
[22:57:49] [PASSED] Limited 16:235
[22:57:49] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:57:49] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:57:49] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:57:49] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:57:49] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:57:49] [PASSED] RGB
[22:57:49] [PASSED] YUV 4:2:0
[22:57:49] [PASSED] YUV 4:2:2
[22:57:49] [PASSED] YUV 4:4:4
[22:57:49] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:57:49] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:57:49] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:57:49] ============= drm_damage_helper (21 subtests) ==============
[22:57:49] [PASSED] drm_test_damage_iter_no_damage
[22:57:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:57:49] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:57:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:57:49] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:57:49] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:57:49] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:57:49] [PASSED] drm_test_damage_iter_simple_damage
[22:57:49] [PASSED] drm_test_damage_iter_single_damage
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:57:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:57:49] [PASSED] drm_test_damage_iter_damage
[22:57:49] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:57:49] [PASSED] drm_test_damage_iter_damage_one_outside
[22:57:49] [PASSED] drm_test_damage_iter_damage_src_moved
[22:57:49] [PASSED] drm_test_damage_iter_damage_not_visible
[22:57:49] ================ [PASSED] drm_damage_helper ================
[22:57:49] ============== drm_dp_mst_helper (3 subtests) ==============
[22:57:49] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:57:49] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:57:49] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:57:49] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:57:49] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:57:49] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:57:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:57:49] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:57:49] [PASSED] Link rate 2000000 lane count 4
[22:57:49] [PASSED] Link rate 2000000 lane count 2
[22:57:49] [PASSED] Link rate 2000000 lane count 1
[22:57:49] [PASSED] Link rate 1350000 lane count 4
[22:57:49] [PASSED] Link rate 1350000 lane count 2
[22:57:49] [PASSED] Link rate 1350000 lane count 1
[22:57:49] [PASSED] Link rate 1000000 lane count 4
[22:57:49] [PASSED] Link rate 1000000 lane count 2
[22:57:49] [PASSED] Link rate 1000000 lane count 1
[22:57:49] [PASSED] Link rate 810000 lane count 4
[22:57:49] [PASSED] Link rate 810000 lane count 2
[22:57:49] [PASSED] Link rate 810000 lane count 1
[22:57:49] [PASSED] Link rate 540000 lane count 4
[22:57:49] [PASSED] Link rate 540000 lane count 2
[22:57:49] [PASSED] Link rate 540000 lane count 1
[22:57:49] [PASSED] Link rate 270000 lane count 4
[22:57:49] [PASSED] Link rate 270000 lane count 2
[22:57:49] [PASSED] Link rate 270000 lane count 1
[22:57:49] [PASSED] Link rate 162000 lane count 4
[22:57:49] [PASSED] Link rate 162000 lane count 2
[22:57:49] [PASSED] Link rate 162000 lane count 1
[22:57:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:57:49] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:57:49] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:57:49] [PASSED] DP_POWER_UP_PHY with port number
[22:57:49] [PASSED] DP_POWER_DOWN_PHY with port number
[22:57:49] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:57:49] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:57:49] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:57:49] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:57:49] [PASSED] DP_QUERY_PAYLOAD with port number
[22:57:49] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:57:49] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:57:49] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:57:49] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:57:49] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:57:49] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:57:49] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:57:49] [PASSED] DP_REMOTE_I2C_READ with port number
[22:57:49] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:57:49] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:57:49] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:57:49] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:57:49] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:57:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:57:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:57:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:57:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:57:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:57:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:57:49] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:57:49] ================ [PASSED] drm_dp_mst_helper ================
[22:57:49] ================== drm_exec (7 subtests) ===================
[22:57:49] [PASSED] sanitycheck
[22:57:49] [PASSED] test_lock
[22:57:49] [PASSED] test_lock_unlock
[22:57:49] [PASSED] test_duplicates
[22:57:49] [PASSED] test_prepare
[22:57:49] [PASSED] test_prepare_array
[22:57:49] [PASSED] test_multiple_loops
[22:57:49] ==================== [PASSED] drm_exec =====================
[22:57:49] =========== drm_format_helper_test (17 subtests) ===========
[22:57:49] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:57:49] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:57:49] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:57:49] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:57:49] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:57:49] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:57:49] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:57:49] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:57:49] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:57:49] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:57:49] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:57:49] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:57:49] ==================== drm_test_fb_swab =====================
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ================ [PASSED] drm_test_fb_swab =================
[22:57:49] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:57:49] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:57:49] [PASSED] single_pixel_source_buffer
[22:57:49] [PASSED] single_pixel_clip_rectangle
[22:57:49] [PASSED] well_known_colors
[22:57:49] [PASSED] destination_pitch
[22:57:49] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:57:49] ================= drm_test_fb_clip_offset =================
[22:57:49] [PASSED] pass through
[22:57:49] [PASSED] horizontal offset
[22:57:49] [PASSED] vertical offset
[22:57:49] [PASSED] horizontal and vertical offset
[22:57:49] [PASSED] horizontal offset (custom pitch)
[22:57:49] [PASSED] vertical offset (custom pitch)
[22:57:49] [PASSED] horizontal and vertical offset (custom pitch)
[22:57:49] ============= [PASSED] drm_test_fb_clip_offset =============
[22:57:49] =================== drm_test_fb_memcpy ====================
[22:57:49] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:57:49] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:57:49] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:57:49] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:57:49] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:57:49] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:57:49] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:57:49] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:57:49] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:57:49] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:57:49] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:57:49] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:57:49] =============== [PASSED] drm_test_fb_memcpy ================
[22:57:49] ============= [PASSED] drm_format_helper_test ==============
[22:57:49] ================= drm_format (18 subtests) =================
[22:57:49] [PASSED] drm_test_format_block_width_invalid
[22:57:49] [PASSED] drm_test_format_block_width_one_plane
[22:57:49] [PASSED] drm_test_format_block_width_two_plane
[22:57:49] [PASSED] drm_test_format_block_width_three_plane
[22:57:49] [PASSED] drm_test_format_block_width_tiled
[22:57:49] [PASSED] drm_test_format_block_height_invalid
[22:57:49] [PASSED] drm_test_format_block_height_one_plane
[22:57:49] [PASSED] drm_test_format_block_height_two_plane
[22:57:49] [PASSED] drm_test_format_block_height_three_plane
[22:57:49] [PASSED] drm_test_format_block_height_tiled
[22:57:49] [PASSED] drm_test_format_min_pitch_invalid
[22:57:49] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:57:49] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:57:49] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:57:49] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:57:49] [PASSED] drm_test_format_min_pitch_two_plane
[22:57:49] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:57:49] [PASSED] drm_test_format_min_pitch_tiled
[22:57:49] =================== [PASSED] drm_format ====================
[22:57:49] ============== drm_framebuffer (10 subtests) ===============
[22:57:49] ========== drm_test_framebuffer_check_src_coords ==========
[22:57:49] [PASSED] Success: source fits into fb
[22:57:49] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:57:49] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:57:49] [PASSED] Fail: overflowing fb with source width
[22:57:49] [PASSED] Fail: overflowing fb with source height
[22:57:49] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:57:49] [PASSED] drm_test_framebuffer_cleanup
[22:57:49] =============== drm_test_framebuffer_create ===============
[22:57:49] [PASSED] ABGR8888 normal sizes
[22:57:49] [PASSED] ABGR8888 max sizes
[22:57:49] [PASSED] ABGR8888 pitch greater than min required
[22:57:49] [PASSED] ABGR8888 pitch less than min required
[22:57:49] [PASSED] ABGR8888 Invalid width
[22:57:49] [PASSED] ABGR8888 Invalid buffer handle
[22:57:49] [PASSED] No pixel format
[22:57:49] [PASSED] ABGR8888 Width 0
[22:57:49] [PASSED] ABGR8888 Height 0
[22:57:49] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:57:49] [PASSED] ABGR8888 Large buffer offset
[22:57:49] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:57:49] [PASSED] ABGR8888 Invalid flag
[22:57:49] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:57:49] [PASSED] ABGR8888 Valid buffer modifier
[22:57:49] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:57:49] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] NV12 Normal sizes
[22:57:49] [PASSED] NV12 Max sizes
[22:57:49] [PASSED] NV12 Invalid pitch
[22:57:49] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:57:49] [PASSED] NV12 different modifier per-plane
[22:57:49] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:57:49] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] NV12 Modifier for inexistent plane
[22:57:49] [PASSED] NV12 Handle for inexistent plane
[22:57:49] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:57:49] [PASSED] YVU420 Normal sizes
[22:57:49] [PASSED] YVU420 Max sizes
[22:57:49] [PASSED] YVU420 Invalid pitch
[22:57:49] [PASSED] YVU420 Different pitches
[22:57:49] [PASSED] YVU420 Different buffer offsets/pitches
[22:57:49] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:57:49] [PASSED] YVU420 Valid modifier
[22:57:49] [PASSED] YVU420 Different modifiers per plane
[22:57:49] [PASSED] YVU420 Modifier for inexistent plane
[22:57:49] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:57:49] [PASSED] X0L2 Normal sizes
[22:57:49] [PASSED] X0L2 Max sizes
[22:57:49] [PASSED] X0L2 Invalid pitch
[22:57:49] [PASSED] X0L2 Pitch greater than minimum required
[22:57:49] [PASSED] X0L2 Handle for inexistent plane
[22:57:49] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:57:49] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:57:49] [PASSED] X0L2 Valid modifier
[22:57:49] [PASSED] X0L2 Modifier for inexistent plane
[22:57:49] =========== [PASSED] drm_test_framebuffer_create ===========
[22:57:49] [PASSED] drm_test_framebuffer_free
[22:57:49] [PASSED] drm_test_framebuffer_init
[22:57:49] [PASSED] drm_test_framebuffer_init_bad_format
[22:57:49] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:57:49] [PASSED] drm_test_framebuffer_lookup
[22:57:49] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:57:49] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:57:49] ================= [PASSED] drm_framebuffer =================
[22:57:49] ================ drm_gem_shmem (8 subtests) ================
[22:57:49] [PASSED] drm_gem_shmem_test_obj_create
[22:57:49] [PASSED] drm_gem_shmem_test_obj_create_private
[22:57:49] [PASSED] drm_gem_shmem_test_pin_pages
[22:57:49] [PASSED] drm_gem_shmem_test_vmap
[22:57:49] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:57:49] [PASSED] drm_gem_shmem_test_get_sg_table
[22:57:49] [PASSED] drm_gem_shmem_test_madvise
[22:57:49] [PASSED] drm_gem_shmem_test_purge
[22:57:49] ================== [PASSED] drm_gem_shmem ==================
[22:57:49] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:57:49] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:57:49] [PASSED] Automatic
[22:57:49] [PASSED] Full
[22:57:49] [PASSED] Limited 16:235
[22:57:49] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:57:49] [PASSED] drm_test_check_disable_connector
[22:57:49] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:57:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:57:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:57:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:57:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:57:49] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:57:49] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:57:49] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:57:49] [PASSED] drm_test_check_output_bpc_dvi
[22:57:49] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:57:49] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:57:49] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:57:49] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:57:49] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:57:49] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:57:49] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:57:49] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:57:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:57:49] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:57:49] [PASSED] drm_test_check_broadcast_rgb_value
[22:57:49] [PASSED] drm_test_check_bpc_8_value
[22:57:49] [PASSED] drm_test_check_bpc_10_value
[22:57:49] [PASSED] drm_test_check_bpc_12_value
[22:57:49] [PASSED] drm_test_check_format_value
[22:57:49] [PASSED] drm_test_check_tmds_char_value
[22:57:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:57:49] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[22:57:49] [PASSED] drm_test_check_mode_valid
[22:57:49] [PASSED] drm_test_check_mode_valid_reject
[22:57:49] [PASSED] drm_test_check_mode_valid_reject_rate
[22:57:49] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:57:49] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:57:49] ================= drm_managed (2 subtests) =================
[22:57:49] [PASSED] drm_test_managed_release_action
[22:57:49] [PASSED] drm_test_managed_run_action
[22:57:49] =================== [PASSED] drm_managed ===================
[22:57:49] =================== drm_mm (6 subtests) ====================
[22:57:49] [PASSED] drm_test_mm_init
[22:57:49] [PASSED] drm_test_mm_debug
[22:57:49] [PASSED] drm_test_mm_align32
[22:57:49] [PASSED] drm_test_mm_align64
[22:57:49] [PASSED] drm_test_mm_lowest
[22:57:49] [PASSED] drm_test_mm_highest
[22:57:49] ===================== [PASSED] drm_mm ======================
[22:57:49] ============= drm_modes_analog_tv (5 subtests) =============
[22:57:49] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:57:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:57:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:57:49] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:57:49] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:57:49] =============== [PASSED] drm_modes_analog_tv ===============
[22:57:49] ============== drm_plane_helper (2 subtests) ===============
[22:57:49] =============== drm_test_check_plane_state ================
[22:57:49] [PASSED] clipping_simple
[22:57:49] [PASSED] clipping_rotate_reflect
[22:57:49] [PASSED] positioning_simple
[22:57:49] [PASSED] upscaling
[22:57:49] [PASSED] downscaling
[22:57:49] [PASSED] rounding1
[22:57:49] [PASSED] rounding2
[22:57:49] [PASSED] rounding3
[22:57:49] [PASSED] rounding4
[22:57:49] =========== [PASSED] drm_test_check_plane_state ============
[22:57:49] =========== drm_test_check_invalid_plane_state ============
[22:57:49] [PASSED] positioning_invalid
[22:57:49] [PASSED] upscaling_invalid
[22:57:49] [PASSED] downscaling_invalid
[22:57:49] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:57:49] ================ [PASSED] drm_plane_helper =================
[22:57:49] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:57:49] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:57:49] [PASSED] None
[22:57:49] [PASSED] PAL
[22:57:49] [PASSED] NTSC
[22:57:49] [PASSED] Both, NTSC Default
[22:57:49] [PASSED] Both, PAL Default
[22:57:49] [PASSED] Both, NTSC Default, with PAL on command-line
[22:57:49] [PASSED] Both, PAL Default, with NTSC on command-line
[22:57:49] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:57:49] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:57:49] ================== drm_rect (9 subtests) ===================
[22:57:49] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:57:49] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:57:49] [PASSED] drm_test_rect_clip_scaled_clipped
[22:57:49] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:57:49] ================= drm_test_rect_intersect =================
[22:57:49] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:57:49] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:57:49] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:57:49] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:57:49] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:57:49] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:57:49] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:57:49] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:57:49] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:57:49] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:57:49] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:57:49] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:57:49] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:57:49] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:57:49] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:57:49] ============= [PASSED] drm_test_rect_intersect =============
[22:57:49] ================ drm_test_rect_calc_hscale ================
[22:57:49] [PASSED] normal use
[22:57:49] [PASSED] out of max range
[22:57:49] [PASSED] out of min range
[22:57:49] [PASSED] zero dst
[22:57:49] [PASSED] negative src
[22:57:49] [PASSED] negative dst
[22:57:49] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:57:49] ================ drm_test_rect_calc_vscale ================
[22:57:49] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[22:57:49] [PASSED] out of max range
[22:57:49] [PASSED] out of min range
[22:57:49] [PASSED] zero dst
[22:57:49] [PASSED] negative src
[22:57:49] [PASSED] negative dst
[22:57:49] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:57:49] ================== drm_test_rect_rotate ===================
[22:57:49] [PASSED] reflect-x
[22:57:49] [PASSED] reflect-y
[22:57:49] [PASSED] rotate-0
[22:57:49] [PASSED] rotate-90
[22:57:49] [PASSED] rotate-180
[22:57:49] [PASSED] rotate-270
[22:57:49] ============== [PASSED] drm_test_rect_rotate ===============
[22:57:49] ================ drm_test_rect_rotate_inv =================
[22:57:49] [PASSED] reflect-x
[22:57:49] [PASSED] reflect-y
[22:57:49] [PASSED] rotate-0
[22:57:49] [PASSED] rotate-90
[22:57:49] [PASSED] rotate-180
[22:57:49] [PASSED] rotate-270
[22:57:49] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:57:49] ==================== [PASSED] drm_rect =====================
[22:57:49] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:57:49] ============ drm_test_sysfb_build_fourcc_list =============
[22:57:49] [PASSED] no native formats
[22:57:49] [PASSED] XRGB8888 as native format
[22:57:49] [PASSED] remove duplicates
[22:57:49] [PASSED] convert alpha formats
[22:57:49] [PASSED] random formats
[22:57:49] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:57:49] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:57:49] ============================================================
[22:57:49] Testing complete. Ran 622 tests: passed: 622
[22:57:49] Elapsed time: 26.861s total, 1.708s configuring, 24.682s building, 0.434s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:57:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:57:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:58:00] Starting KUnit Kernel (1/1)...
[22:58:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:58:00] ================= ttm_device (5 subtests) ==================
[22:58:00] [PASSED] ttm_device_init_basic
[22:58:00] [PASSED] ttm_device_init_multiple
[22:58:00] [PASSED] ttm_device_fini_basic
[22:58:00] [PASSED] ttm_device_init_no_vma_man
[22:58:00] ================== ttm_device_init_pools ==================
[22:58:00] [PASSED] No DMA allocations, no DMA32 required
[22:58:00] [PASSED] DMA allocations, DMA32 required
[22:58:00] [PASSED] No DMA allocations, DMA32 required
[22:58:00] [PASSED] DMA allocations, no DMA32 required
[22:58:00] ============== [PASSED] ttm_device_init_pools ==============
[22:58:00] =================== [PASSED] ttm_device ====================
[22:58:00] ================== ttm_pool (8 subtests) ===================
[22:58:00] ================== ttm_pool_alloc_basic ===================
[22:58:00] [PASSED] One page
[22:58:00] [PASSED] More than one page
[22:58:00] [PASSED] Above the allocation limit
[22:58:00] [PASSED] One page, with coherent DMA mappings enabled
[22:58:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:58:00] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:58:00] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:58:00] [PASSED] One page
[22:58:00] [PASSED] More than one page
[22:58:00] [PASSED] Above the allocation limit
[22:58:00] [PASSED] One page, with coherent DMA mappings enabled
[22:58:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:58:00] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:58:00] [PASSED] ttm_pool_alloc_order_caching_match
[22:58:00] [PASSED] ttm_pool_alloc_caching_mismatch
[22:58:00] [PASSED] ttm_pool_alloc_order_mismatch
[22:58:00] [PASSED] ttm_pool_free_dma_alloc
[22:58:00] [PASSED] ttm_pool_free_no_dma_alloc
[22:58:00] [PASSED] ttm_pool_fini_basic
[22:58:00] ==================== [PASSED] ttm_pool =====================
[22:58:00] ================ ttm_resource (8 subtests) =================
[22:58:00] ================= ttm_resource_init_basic =================
[22:58:00] [PASSED] Init resource in TTM_PL_SYSTEM
[22:58:00] [PASSED] Init resource in TTM_PL_VRAM
[22:58:00] [PASSED] Init resource in a private placement
[22:58:00] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:58:00] ============= [PASSED] ttm_resource_init_basic =============
[22:58:00] [PASSED] ttm_resource_init_pinned
[22:58:00] [PASSED] ttm_resource_fini_basic
[22:58:00] [PASSED] ttm_resource_manager_init_basic
[22:58:00] [PASSED] ttm_resource_manager_usage_basic
[22:58:00] [PASSED] ttm_resource_manager_set_used_basic
[22:58:00] [PASSED] ttm_sys_man_alloc_basic
[22:58:00] [PASSED] ttm_sys_man_free_basic
[22:58:00] ================== [PASSED] ttm_resource ===================
[22:58:00] =================== ttm_tt (15 subtests) ===================
[22:58:00] ==================== ttm_tt_init_basic ====================
[22:58:00] [PASSED] Page-aligned size
[22:58:00] [PASSED] Extra pages requested
[22:58:00] ================ [PASSED] ttm_tt_init_basic ================
[22:58:00] [PASSED] ttm_tt_init_misaligned
[22:58:00] [PASSED] ttm_tt_fini_basic
[22:58:00] [PASSED] ttm_tt_fini_sg
[22:58:00] [PASSED] ttm_tt_fini_shmem
[22:58:00] [PASSED] ttm_tt_create_basic
[22:58:00] [PASSED] ttm_tt_create_invalid_bo_type
[22:58:00] [PASSED] ttm_tt_create_ttm_exists
[22:58:00] [PASSED] ttm_tt_create_failed
[22:58:00] [PASSED] ttm_tt_destroy_basic
[22:58:00] [PASSED] ttm_tt_populate_null_ttm
[22:58:00] [PASSED] ttm_tt_populate_populated_ttm
[22:58:00] [PASSED] ttm_tt_unpopulate_basic
[22:58:00] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:58:00] [PASSED] ttm_tt_swapin_basic
[22:58:00] ===================== [PASSED] ttm_tt ======================
[22:58:00] =================== ttm_bo (14 subtests) ===================
[22:58:00] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:58:00] [PASSED] Cannot be interrupted and sleeps
[22:58:00] [PASSED] Cannot be interrupted, locks straight away
[22:58:00] [PASSED] Can be interrupted, sleeps
[22:58:00] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:58:00] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:58:00] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:58:00] [PASSED] ttm_bo_reserve_double_resv
[22:58:00] [PASSED] ttm_bo_reserve_interrupted
[22:58:00] [PASSED] ttm_bo_reserve_deadlock
[22:58:00] [PASSED] ttm_bo_unreserve_basic
[22:58:00] [PASSED] ttm_bo_unreserve_pinned
[22:58:00] [PASSED] ttm_bo_unreserve_bulk
[22:58:00] [PASSED] ttm_bo_fini_basic
[22:58:00] [PASSED] ttm_bo_fini_shared_resv
[22:58:00] [PASSED] ttm_bo_pin_basic
[22:58:00] [PASSED] ttm_bo_pin_unpin_resource
[22:58:00] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:58:00] ===================== [PASSED] ttm_bo ======================
[22:58:00] ============== ttm_bo_validate (21 subtests) ===============
[22:58:00] ============== ttm_bo_init_reserved_sys_man ===============
[22:58:00] [PASSED] Buffer object for userspace
[22:58:00] [PASSED] Kernel buffer object
[22:58:00] [PASSED] Shared buffer object
[22:58:00] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:58:00] ============== ttm_bo_init_reserved_mock_man ==============
[22:58:00] [PASSED] Buffer object for userspace
[22:58:00] [PASSED] Kernel buffer object
[22:58:00] [PASSED] Shared buffer object
[22:58:00] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:58:00] [PASSED] ttm_bo_init_reserved_resv
[22:58:00] ================== ttm_bo_validate_basic ==================
[22:58:00] [PASSED] Buffer object for userspace
[22:58:00] [PASSED] Kernel buffer object
[22:58:00] [PASSED] Shared buffer object
[22:58:00] ============== [PASSED] ttm_bo_validate_basic ==============
[22:58:00] [PASSED] ttm_bo_validate_invalid_placement
[22:58:00] ============= ttm_bo_validate_same_placement ==============
[22:58:00] [PASSED] System manager
[22:58:00] [PASSED] VRAM manager
[22:58:00] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:58:00] [PASSED] ttm_bo_validate_failed_alloc
[22:58:00] [PASSED] ttm_bo_validate_pinned
[22:58:00] [PASSED] ttm_bo_validate_busy_placement
[22:58:00] ================ ttm_bo_validate_multihop =================
[22:58:00] [PASSED] Buffer object for userspace
[22:58:00] [PASSED] Kernel buffer object
[22:58:00] [PASSED] Shared buffer object
[22:58:00] ============ [PASSED] ttm_bo_validate_multihop =============
[22:58:00] ========== ttm_bo_validate_no_placement_signaled ==========
[22:58:00] [PASSED] Buffer object in system domain, no page vector
[22:58:00] [PASSED] Buffer object in system domain with an existing page vector
[22:58:00] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:58:00] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:58:00] [PASSED] Buffer object for userspace
[22:58:00] [PASSED] Kernel buffer object
[22:58:00] [PASSED] Shared buffer object
[22:58:00] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:58:00] [PASSED] ttm_bo_validate_move_fence_signaled
[22:58:00] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:58:00] [PASSED] Waits for GPU
[22:58:00] [PASSED] Tries to lock straight away
[22:58:00] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:58:00] [PASSED] ttm_bo_validate_happy_evict
[22:58:00] [PASSED] ttm_bo_validate_all_pinned_evict
[22:58:00] [PASSED] ttm_bo_validate_allowed_only_evict
[22:58:00] [PASSED] ttm_bo_validate_deleted_evict
[22:58:00] [PASSED] ttm_bo_validate_busy_domain_evict
[22:58:00] [PASSED] ttm_bo_validate_evict_gutting
[22:58:00] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[22:58:00] ================= [PASSED] ttm_bo_validate =================
[22:58:00] ============================================================
[22:58:00] Testing complete. Ran 101 tests: passed: 101
[22:58:00] Elapsed time: 11.323s total, 1.689s configuring, 9.367s building, 0.217s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Xe.CI.BAT: success for Some migration fixes/improvements
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
` (6 preceding siblings ...)
2025-10-15 22:58 ` ✓ CI.KUnit: success for Some migration fixes/improvements Patchwork
@ 2025-10-15 23:52 ` Patchwork
2025-10-16 16:08 ` ✓ Xe.CI.Full: " Patchwork
8 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-10-15 23:52 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 856 bytes --]
== Series Details ==
Series: Some migration fixes/improvements
URL : https://patchwork.freedesktop.org/series/155997/
State : success
== Summary ==
CI Bug Log - changes from xe-3928-f019aaad58112f89234f7b68557c831846437008_BAT -> xe-pw-155997v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3928-f019aaad58112f89234f7b68557c831846437008 -> xe-pw-155997v1
IGT_8587: 8587
xe-3928-f019aaad58112f89234f7b68557c831846437008: f019aaad58112f89234f7b68557c831846437008
xe-pw-155997v1: 155997v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/index.html
[-- Attachment #2: Type: text/html, Size: 1404 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit
2025-10-15 14:19 ` [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit Matthew Auld
@ 2025-10-16 0:34 ` Matthew Brost
0 siblings, 0 replies; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 0:34 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Wed, Oct 15, 2025 at 03:19:32PM +0100, Matthew Auld wrote:
> On systems with PAGE_SIZE > 4K the chunk will likely be rounded down to
> zero, if say we have single 2M page, so one huge pte, since we also try
> to align the chunk to PAGE_SIZE / XE_PAGE_SIZE, which will be 16 on 64K
> systems. Make the ALIGN_DOWN conditional for 4K PTEs where we can
> encounter gpu_page_size < PAGE_SIZE.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Good catch.
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index ff8e442bf519..a4861ede6cef 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1804,7 +1804,9 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
> while (ptes) {
> u32 chunk = min(MAX_PTE_PER_SDI, ptes);
>
> - chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
> + if (!level)
> + chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
> +
> bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk);
> bb->cs[bb->len++] = pt_offset;
> bb->cs[bb->len++] = 0;
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit
2025-10-15 14:19 ` [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit Matthew Auld
@ 2025-10-16 0:36 ` Matthew Brost
0 siblings, 0 replies; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 0:36 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Wed, Oct 15, 2025 at 03:19:31PM +0100, Matthew Auld wrote:
> We allow the input size to not be aligned to PAGE_SIZE, which leads to
> various bugs in build_pt_update_batch_sram() for PAGE_SIZE > 4K systems.
> For example if ptes is exactly one gpu_page_size then the chunk size is
> rounded down to zero. The simplest fix looks to be forcing PAGE_SIZE
> aligned inputs.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 4ca48dd1cfd8..ff8e442bf519 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1798,6 +1798,8 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
> u32 ptes;
> int i = 0;
>
> + xe_tile_assert(m->tile, PAGE_ALIGNED(size));
> +
> ptes = DIV_ROUND_UP(size, gpu_page_size);
> while (ptes) {
> u32 chunk = min(MAX_PTE_PER_SDI, ptes);
> @@ -1811,12 +1813,13 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
> ptes -= chunk;
>
> while (chunk--) {
> - u64 addr = sram_addr[i].addr & ~(gpu_page_size - 1);
> - u64 pte, orig_addr = addr;
> + u64 addr = sram_addr[i].addr;
> + u64 pte;
>
> xe_tile_assert(m->tile, sram_addr[i].proto ==
> DRM_INTERCONNECT_SYSTEM);
> xe_tile_assert(m->tile, addr);
> + xe_tile_assert(m->tile, PAGE_ALIGNED(addr));
>
> again:
> pte = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe,
> @@ -1827,7 +1830,7 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
>
> if (gpu_page_size < PAGE_SIZE) {
> addr += XE_PAGE_SIZE;
> - if (orig_addr + PAGE_SIZE != addr) {
> + if (!PAGE_ALIGNED(addr)) {
> chunk--;
> goto again;
> }
> @@ -1918,10 +1921,10 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
>
> if (use_pde)
> build_pt_update_batch_sram(m, bb, m->large_page_copy_pdes,
> - sram_addr, len + sram_offset, 1);
> + sram_addr, npages << PAGE_SHIFT, 1);
> else
> build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE,
> - sram_addr, len + sram_offset, 0);
> + sram_addr, npages << PAGE_SHIFT, 0);
>
> if (dir == XE_MIGRATE_COPY_TO_VRAM) {
> if (use_pde)
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing
2025-10-15 14:19 ` [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing Matthew Auld
@ 2025-10-16 0:36 ` Matthew Brost
0 siblings, 0 replies; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 0:36 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Wed, Oct 15, 2025 at 03:19:33PM +0100, Matthew Auld wrote:
> In xe_migrate_vram() the copy can straddle page boundaries, so the len
> might look like a single page, but actually accounting for the offset
> within the page we will need to emit more than one PTE. Otherwise in
> some cases the batch buffer will be undersized leading to warnings
> later. We already have npages so use that instead.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index a4861ede6cef..6b6caeb5cdc6 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1894,7 +1894,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
>
> xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
>
> - batch_size += pte_update_cmd_size(len);
> + batch_size += pte_update_cmd_size(npages << PAGE_SHIFT);
> batch_size += EMIT_COPY_DW;
>
> bb = xe_bb_new(gt, batch_size, use_usm_batch);
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/6] drm/xe/migrate: trim batch buffer sizing
2025-10-15 14:19 ` [PATCH 4/6] drm/xe/migrate: trim " Matthew Auld
@ 2025-10-16 0:38 ` Matthew Brost
0 siblings, 0 replies; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 0:38 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Wed, Oct 15, 2025 at 03:19:34PM +0100, Matthew Auld wrote:
> We have an extra two dwords, but it looks like we should only need one
> for the extra bb_end. Likely this is just leftover from back when the
> arb handling was moved into the ring programming.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 6b6caeb5cdc6..3801152b7f8f 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -847,7 +847,7 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
> &ccs_it);
>
> while (size) {
> - u32 batch_size = 2; /* arb_clear() + MI_BATCH_BUFFER_END */
> + u32 batch_size = 1; /* MI_BATCH_BUFFER_END */
> struct xe_sched_job *job;
> struct xe_bb *bb;
> u32 flush_flags = 0;
> @@ -1312,7 +1312,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
>
> /* Calculate final sizes and batch size.. */
> pte_flags = clear_vram ? PTE_UPDATE_FLAG_IS_VRAM : 0;
> - batch_size = 2 +
> + batch_size = 1 +
> pte_update_size(m, pte_flags, src, &src_it,
> &clear_L0, &clear_L0_ofs, &clear_L0_pt,
> clear_bo_data ? emit_clear_cmd_len(gt) : 0, 0,
> @@ -1876,7 +1876,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
> struct xe_device *xe = gt_to_xe(gt);
> bool use_usm_batch = xe->info.has_usm;
> struct dma_fence *fence = NULL;
> - u32 batch_size = 2;
> + u32 batch_size = 1;
> u64 src_L0_ofs, dst_L0_ofs;
> struct xe_sched_job *job;
> struct xe_bb *bb;
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction
2025-10-15 14:19 ` [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction Matthew Auld
@ 2025-10-16 0:58 ` Matthew Brost
2025-10-16 9:41 ` Matthew Auld
0 siblings, 1 reply; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 0:58 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Wed, Oct 15, 2025 at 03:19:35PM +0100, Matthew Auld wrote:
> Make this the default on xe2+ when doing a copy. This has a few
> advantages over the exiting copy instruction:
>
> 1) It has a special PAGE_COPY mode that claims to be optimised for
> page-in/page-out, which is the vast majority of current users.
>
> 2) It also has a simple BYTE_COPY mode that supports byte granularity
> copying without any restrictions.
>
> With 2) we can now easily skip the bounce buffer flow when copying
> buffers with strange sizing/alignment, like for memory_access. But that
> is left for the next patch.
>
How you tested if this series has an affect on bandwidth of copies?
We have some SVM tests which can measure this bandwidth rather
effectively. I can give these tests a try a but it may take a few days.
With that, feel free to breakout the first 4 patches into an individual
series while we explore the affects on bandwidth for th last two
patches.
Matt
> BSpec: 57561
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
> .../gpu/drm/xe/instructions/xe_gpu_commands.h | 6 ++
> drivers/gpu/drm/xe/xe_migrate.c | 64 ++++++++++++++++---
> 2 files changed, 61 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> index 8cfcd3360896..5d41ca297447 100644
> --- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> +++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> @@ -31,6 +31,12 @@
> #define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
> #define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK GENMASK(23, 20)
>
> +#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
> +#define MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
> +#define MEM_COPY_MATRIX_COPY REG_BIT(17)
> +#define MEM_COPY_SRC_MOCS_INDEX_MASK GENMASK(31, 28)
> +#define MEM_COPY_DST_MOCS_INDEX_MASK GENMASK(6, 3)
> +
> #define PVC_MEM_SET_CMD (2 << 29 | 0x5b << 22)
> #define PVC_MEM_SET_CMD_LEN_DW 7
> #define PVC_MEM_SET_MATRIX REG_BIT(17)
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 3801152b7f8f..da1fefb96070 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -699,37 +699,83 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
> }
>
> #define EMIT_COPY_DW 10
> -static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> - u64 src_ofs, u64 dst_ofs, unsigned int size,
> - unsigned int pitch)
> +static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> + u64 dst_ofs, unsigned int size,
> + unsigned int pitch)
> {
> struct xe_device *xe = gt_to_xe(gt);
> - u32 mocs = 0;
> u32 tile_y = 0;
>
> + xe_gt_assert(gt, GRAPHICS_VER(xe) < 20);
> xe_gt_assert(gt, !(pitch & 3));
> xe_gt_assert(gt, size / pitch <= S16_MAX);
> xe_gt_assert(gt, pitch / 4 <= S16_MAX);
> xe_gt_assert(gt, pitch <= U16_MAX);
>
> - if (GRAPHICS_VER(xe) >= 20)
> - mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);
> -
> if (GRAPHICS_VERx100(xe) >= 1250)
> tile_y = XY_FAST_COPY_BLT_D1_SRC_TILE4 | XY_FAST_COPY_BLT_D1_DST_TILE4;
>
> bb->cs[bb->len++] = XY_FAST_COPY_BLT_CMD | (10 - 2);
> - bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y | mocs;
> + bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y;
> bb->cs[bb->len++] = 0;
> bb->cs[bb->len++] = (size / pitch) << 16 | pitch / 4;
> bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> bb->cs[bb->len++] = 0;
> - bb->cs[bb->len++] = pitch | mocs;
> + bb->cs[bb->len++] = pitch;
> bb->cs[bb->len++] = lower_32_bits(src_ofs);
> bb->cs[bb->len++] = upper_32_bits(src_ofs);
> }
>
> +static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> + u64 dst_ofs, unsigned int size, unsigned int pitch)
> +{
> + u32 mode, copy_type, width;
> +
> + xe_gt_assert(gt, IS_ALIGNED(size, pitch));
> + xe_gt_assert(gt, pitch <= U16_MAX);
> + xe_gt_assert(gt, size);
> +
> + if (IS_ALIGNED(size, 256) &&
> + IS_ALIGNED(lower_32_bits(src_ofs), 256) &&
> + IS_ALIGNED(lower_32_bits(dst_ofs), 256)) {
> + mode = MEM_COPY_PAGE_COPY_MODE;
> + copy_type = 0; /* linear copy */
> + width = size / 256;
> + } else {
> + xe_gt_assert(gt, size / pitch <= U16_MAX);
> + mode = 0; /* BYTE_COPY */
> + copy_type = MEM_COPY_MATRIX_COPY;
> + width = pitch;
> + }
> +
> + xe_gt_assert(gt, width <= U16_MAX);
> +
> + bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
> + bb->cs[bb->len++] = width - 1;
> + bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
> + bb->cs[bb->len++] = pitch - 1;
> + bb->cs[bb->len++] = pitch - 1;
> + bb->cs[bb->len++] = lower_32_bits(src_ofs);
> + bb->cs[bb->len++] = upper_32_bits(src_ofs);
> + bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> + bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> + bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
> + FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
> +}
> +
> +static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> + u64 src_ofs, u64 dst_ofs, unsigned int size,
> + unsigned int pitch)
> +{
> + struct xe_device *xe = gt_to_xe(gt);
> +
> + if (GRAPHICS_VER(xe) >= 20)
> + emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> + else
> + emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> +}
> +
> static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
> {
> return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction
2025-10-16 0:58 ` Matthew Brost
@ 2025-10-16 9:41 ` Matthew Auld
2025-10-16 18:46 ` Matthew Brost
0 siblings, 1 reply; 20+ messages in thread
From: Matthew Auld @ 2025-10-16 9:41 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 16/10/2025 01:58, Matthew Brost wrote:
> On Wed, Oct 15, 2025 at 03:19:35PM +0100, Matthew Auld wrote:
>> Make this the default on xe2+ when doing a copy. This has a few
>> advantages over the exiting copy instruction:
>>
>> 1) It has a special PAGE_COPY mode that claims to be optimised for
>> page-in/page-out, which is the vast majority of current users.
>>
>> 2) It also has a simple BYTE_COPY mode that supports byte granularity
>> copying without any restrictions.
>>
>> With 2) we can now easily skip the bounce buffer flow when copying
>> buffers with strange sizing/alignment, like for memory_access. But that
>> is left for the next patch.
>>
>
> How you tested if this series has an affect on bandwidth of copies?
I only tested it from functionaly pov. Main interest for this series was
with 2) atm.
>
> We have some SVM tests which can measure this bandwidth rather
> effectively. I can give these tests a try a but it may take a few days.
>
> With that, feel free to breakout the first 4 patches into an individual
> series while we explore the affects on bandwidth for th last two
> patches.
Sounds good. Can you point me to those SVM tests? I see some fault and
pre-fetch benchmarks in IGT, is it those? I can try them.
>
> Matt
>
>> BSpec: 57561
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>> .../gpu/drm/xe/instructions/xe_gpu_commands.h | 6 ++
>> drivers/gpu/drm/xe/xe_migrate.c | 64 ++++++++++++++++---
>> 2 files changed, 61 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
>> index 8cfcd3360896..5d41ca297447 100644
>> --- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
>> +++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
>> @@ -31,6 +31,12 @@
>> #define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
>> #define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK GENMASK(23, 20)
>>
>> +#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
>> +#define MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
>> +#define MEM_COPY_MATRIX_COPY REG_BIT(17)
>> +#define MEM_COPY_SRC_MOCS_INDEX_MASK GENMASK(31, 28)
>> +#define MEM_COPY_DST_MOCS_INDEX_MASK GENMASK(6, 3)
>> +
>> #define PVC_MEM_SET_CMD (2 << 29 | 0x5b << 22)
>> #define PVC_MEM_SET_CMD_LEN_DW 7
>> #define PVC_MEM_SET_MATRIX REG_BIT(17)
>> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
>> index 3801152b7f8f..da1fefb96070 100644
>> --- a/drivers/gpu/drm/xe/xe_migrate.c
>> +++ b/drivers/gpu/drm/xe/xe_migrate.c
>> @@ -699,37 +699,83 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
>> }
>>
>> #define EMIT_COPY_DW 10
>> -static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
>> - u64 src_ofs, u64 dst_ofs, unsigned int size,
>> - unsigned int pitch)
>> +static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
>> + u64 dst_ofs, unsigned int size,
>> + unsigned int pitch)
>> {
>> struct xe_device *xe = gt_to_xe(gt);
>> - u32 mocs = 0;
>> u32 tile_y = 0;
>>
>> + xe_gt_assert(gt, GRAPHICS_VER(xe) < 20);
>> xe_gt_assert(gt, !(pitch & 3));
>> xe_gt_assert(gt, size / pitch <= S16_MAX);
>> xe_gt_assert(gt, pitch / 4 <= S16_MAX);
>> xe_gt_assert(gt, pitch <= U16_MAX);
>>
>> - if (GRAPHICS_VER(xe) >= 20)
>> - mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);
>> -
>> if (GRAPHICS_VERx100(xe) >= 1250)
>> tile_y = XY_FAST_COPY_BLT_D1_SRC_TILE4 | XY_FAST_COPY_BLT_D1_DST_TILE4;
>>
>> bb->cs[bb->len++] = XY_FAST_COPY_BLT_CMD | (10 - 2);
>> - bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y | mocs;
>> + bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y;
>> bb->cs[bb->len++] = 0;
>> bb->cs[bb->len++] = (size / pitch) << 16 | pitch / 4;
>> bb->cs[bb->len++] = lower_32_bits(dst_ofs);
>> bb->cs[bb->len++] = upper_32_bits(dst_ofs);
>> bb->cs[bb->len++] = 0;
>> - bb->cs[bb->len++] = pitch | mocs;
>> + bb->cs[bb->len++] = pitch;
>> bb->cs[bb->len++] = lower_32_bits(src_ofs);
>> bb->cs[bb->len++] = upper_32_bits(src_ofs);
>> }
>>
>> +static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
>> + u64 dst_ofs, unsigned int size, unsigned int pitch)
>> +{
>> + u32 mode, copy_type, width;
>> +
>> + xe_gt_assert(gt, IS_ALIGNED(size, pitch));
>> + xe_gt_assert(gt, pitch <= U16_MAX);
>> + xe_gt_assert(gt, size);
>> +
>> + if (IS_ALIGNED(size, 256) &&
>> + IS_ALIGNED(lower_32_bits(src_ofs), 256) &&
>> + IS_ALIGNED(lower_32_bits(dst_ofs), 256)) {
>> + mode = MEM_COPY_PAGE_COPY_MODE;
>> + copy_type = 0; /* linear copy */
>> + width = size / 256;
>> + } else {
>> + xe_gt_assert(gt, size / pitch <= U16_MAX);
>> + mode = 0; /* BYTE_COPY */
>> + copy_type = MEM_COPY_MATRIX_COPY;
>> + width = pitch;
>> + }
>> +
>> + xe_gt_assert(gt, width <= U16_MAX);
>> +
>> + bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
>> + bb->cs[bb->len++] = width - 1;
>> + bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
>> + bb->cs[bb->len++] = pitch - 1;
>> + bb->cs[bb->len++] = pitch - 1;
>> + bb->cs[bb->len++] = lower_32_bits(src_ofs);
>> + bb->cs[bb->len++] = upper_32_bits(src_ofs);
>> + bb->cs[bb->len++] = lower_32_bits(dst_ofs);
>> + bb->cs[bb->len++] = upper_32_bits(dst_ofs);
>> + bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
>> + FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
>> +}
>> +
>> +static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
>> + u64 src_ofs, u64 dst_ofs, unsigned int size,
>> + unsigned int pitch)
>> +{
>> + struct xe_device *xe = gt_to_xe(gt);
>> +
>> + if (GRAPHICS_VER(xe) >= 20)
>> + emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
>> + else
>> + emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
>> +}
>> +
>> static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
>> {
>> return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
>> --
>> 2.51.0
>>
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Xe.CI.Full: success for Some migration fixes/improvements
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
` (7 preceding siblings ...)
2025-10-15 23:52 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-10-16 16:08 ` Patchwork
8 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-10-16 16:08 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 67547 bytes --]
== Series Details ==
Series: Some migration fixes/improvements
URL : https://patchwork.freedesktop.org/series/155997/
State : success
== Summary ==
CI Bug Log - changes from xe-3928-f019aaad58112f89234f7b68557c831846437008_FULL -> xe-pw-155997v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-155997v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][1] ([Intel XE#316])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-adlp: NOTRUN -> [SKIP][2] ([Intel XE#619])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2327]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][4] ([Intel XE#316]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-180:
- shard-adlp: NOTRUN -> [DMESG-FAIL][5] ([Intel XE#4543]) +7 other tests dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
- shard-adlp: NOTRUN -> [FAIL][6] ([Intel XE#1874])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#1124]) +4 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-adlp: NOTRUN -> [SKIP][9] ([Intel XE#610])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-adlp: NOTRUN -> [SKIP][10] ([Intel XE#1124]) +13 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-bmg: [PASS][11] -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][13] ([Intel XE#2191]) +3 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#367]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-adlp: NOTRUN -> [SKIP][15] ([Intel XE#367]) +2 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#367])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#455] / [Intel XE#787]) +13 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][18] ([Intel XE#787]) +71 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2887]) +4 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#3442])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][21] ([Intel XE#2907]) +4 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#787]) +48 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-adlp: NOTRUN -> [SKIP][23] ([Intel XE#455] / [Intel XE#787]) +47 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-adlp: NOTRUN -> [SKIP][24] ([Intel XE#373]) +14 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2325])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color@degamma:
- shard-adlp: NOTRUN -> [SKIP][26] ([Intel XE#306]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@vga-edid-read:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#373]) +3 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_chamelium_edid@vga-edid-read.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2252]) +4 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-adlp: NOTRUN -> [SKIP][29] ([Intel XE#307])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2320]) +2 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#308])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-adlp: NOTRUN -> [SKIP][32] ([Intel XE#308])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][33] ([Intel XE#309]) +3 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2291])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-bmg: [PASS][35] -> [SKIP][36] ([Intel XE#2291]) +3 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_cursor_legacy@forked-bo:
- shard-bmg: [PASS][37] -> [DMESG-WARN][38] ([Intel XE#5354]) +1 other test dmesg-warn
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@kms_cursor_legacy@forked-bo.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-8/igt@kms_cursor_legacy@forked-bo.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][39] ([Intel XE#323])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#5428])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [PASS][41] -> [SKIP][42] ([Intel XE#4302])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@kms_display_modes@extended-mode-basic.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#1340])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#4354])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-adlp: NOTRUN -> [SKIP][45] ([Intel XE#4354])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-adlp: NOTRUN -> [SKIP][46] ([Intel XE#4356])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#4331]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-adlp: NOTRUN -> [SKIP][48] ([Intel XE#4422])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_feature_discovery@chamelium:
- shard-adlp: NOTRUN -> [SKIP][49] ([Intel XE#701])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2-set2: NOTRUN -> [SKIP][50] ([Intel XE#703])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2375])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@2x-blocking-wf_vblank@ab-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][52] -> [FAIL][53] ([Intel XE#5408]) +1 other test fail
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-dg2-434/igt@kms_flip@2x-blocking-wf_vblank@ab-hdmi-a6-dp4.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-432/igt@kms_flip@2x-blocking-wf_vblank@ab-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-bmg: [PASS][54] -> [SKIP][55] ([Intel XE#2316]) +4 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-adlp: NOTRUN -> [SKIP][56] ([Intel XE#310]) +9 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-dp2-hdmi-a3:
- shard-bmg: [PASS][57] -> [INCOMPLETE][58] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-2/igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-dp2-hdmi-a3.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-panning-interruptible:
- shard-adlp: NOTRUN -> [DMESG-WARN][59] ([Intel XE#4543] / [Intel XE#5208])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_flip@flip-vs-panning-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: NOTRUN -> [DMESG-WARN][60] ([Intel XE#4543]) +16 other tests dmesg-warn
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-adlp: [PASS][61] -> [DMESG-WARN][62] ([Intel XE#2953] / [Intel XE#4173]) +2 other tests dmesg-warn
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-6/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1:
- shard-adlp: [PASS][63] -> [DMESG-WARN][64] ([Intel XE#4543]) +2 other tests dmesg-warn
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-2/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2293] / [Intel XE#2380])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2293])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#2312]) +3 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#5390]) +2 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][69] ([Intel XE#1151])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2311]) +7 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-onoff:
- shard-adlp: NOTRUN -> [SKIP][71] ([Intel XE#651]) +13 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4:
- shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#651]) +11 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#2313]) +7 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
- shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#653]) +19 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][75] ([Intel XE#656]) +57 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#653]) +8 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_hdr@static-toggle-dpms:
- shard-bmg: [PASS][77] -> [SKIP][78] ([Intel XE#1503])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@kms_hdr@static-toggle-dpms.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [PASS][79] -> [SKIP][80] ([Intel XE#3012])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@kms_joiner@basic-force-big-joiner.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][81] ([Intel XE#3012])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- shard-adlp: NOTRUN -> [DMESG-WARN][82] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][83] ([Intel XE#4596])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-bmg: [PASS][84] -> [SKIP][85] ([Intel XE#4596])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-none.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-adlp: NOTRUN -> [SKIP][86] ([Intel XE#455]) +29 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2763]) +4 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-adlp: NOTRUN -> [SKIP][88] ([Intel XE#2938])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-adlp: NOTRUN -> [SKIP][89] ([Intel XE#870]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-adlp: NOTRUN -> [SKIP][90] ([Intel XE#836])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-adlp: NOTRUN -> [SKIP][91] ([Intel XE#1406] / [Intel XE#1489]) +12 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#1406] / [Intel XE#1489]) +3 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#1406] / [Intel XE#1489])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-adlp: NOTRUN -> [SKIP][94] ([Intel XE#1122] / [Intel XE#1406] / [Intel XE#5580]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-adlp: NOTRUN -> [SKIP][95] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +17 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_psr@fbc-psr2-sprite-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][96] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +5 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
* igt@kms_psr@psr2-sprite-blt:
- shard-bmg: NOTRUN -> [SKIP][97] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_psr@psr2-sprite-blt.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-adlp: NOTRUN -> [SKIP][98] ([Intel XE#1406] / [Intel XE#2939] / [Intel XE#5585]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-adlp: NOTRUN -> [SKIP][99] ([Intel XE#3414]) +3 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-adlp: NOTRUN -> [SKIP][101] ([Intel XE#362])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@cmrr:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2168])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@kms_vrr@cmrr.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [PASS][103] -> [FAIL][104] ([Intel XE#4459]) +1 other test fail
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@kms_vrr@lobf:
- shard-adlp: NOTRUN -> [SKIP][105] ([Intel XE#2168])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@kms_vrr@lobf.html
* igt@xe_ccs@suspend-resume:
- shard-adlp: NOTRUN -> [SKIP][106] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607]) +3 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@xe_ccs@suspend-resume.html
* igt@xe_compute@ccs-mode-basic:
- shard-adlp: NOTRUN -> [SKIP][107] ([Intel XE#1447] / [Intel XE#5617])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_compute@ccs-mode-basic.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-bmg: NOTRUN -> [FAIL][108] ([Intel XE#5963])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_compute_preempt@compute-preempt-many-all-ram:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#6360])
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@xe_compute_preempt@compute-preempt-many-all-ram.html
* igt@xe_configfs@survivability-mode:
- shard-adlp: NOTRUN -> [SKIP][110] ([Intel XE#6010])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_configfs@survivability-mode.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-adlp: NOTRUN -> [SKIP][111] ([Intel XE#1123])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_copy_basic@mem-set-linear-0xfffe:
- shard-adlp: NOTRUN -> [SKIP][112] ([Intel XE#1126])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_copy_basic@mem-set-linear-0xfffe.html
* igt@xe_create@create-big-vram:
- shard-adlp: NOTRUN -> [SKIP][113] ([Intel XE#1062])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_create@create-big-vram.html
* igt@xe_eu_stall@non-blocking-re-enable:
- shard-adlp: NOTRUN -> [SKIP][114] ([Intel XE#5626]) +2 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_eu_stall@non-blocking-re-enable.html
* igt@xe_eudebug_online@reset-with-attention:
- shard-adlp: NOTRUN -> [SKIP][115] ([Intel XE#4837] / [Intel XE#5565]) +16 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_eudebug_online@reset-with-attention.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
- shard-dg2-set2: NOTRUN -> [SKIP][116] ([Intel XE#4837]) +5 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#4837]) +6 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram.html
* igt@xe_evict@evict-small-external:
- shard-adlp: NOTRUN -> [SKIP][118] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_evict@evict-small-external.html
* igt@xe_evict@evict-small-multi-vm-cm:
- shard-adlp: NOTRUN -> [SKIP][119] ([Intel XE#261] / [Intel XE#688])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_evict@evict-small-multi-vm-cm.html
* igt@xe_evict@evict-threads-large:
- shard-adlp: NOTRUN -> [SKIP][120] ([Intel XE#261]) +8 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@xe_evict@evict-threads-large.html
* igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen:
- shard-adlp: NOTRUN -> [SKIP][121] ([Intel XE#688]) +4 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue:
- shard-bmg: NOTRUN -> [SKIP][122] ([Intel XE#2322]) +4 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind:
- shard-adlp: NOTRUN -> [SKIP][123] ([Intel XE#1392] / [Intel XE#5575]) +11 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html
* igt@xe_exec_fault_mode@many-bindexecqueue-userptr-imm:
- shard-adlp: NOTRUN -> [SKIP][124] ([Intel XE#288] / [Intel XE#5561]) +36 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-imm.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][125] ([Intel XE#288]) +9 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
- shard-adlp: NOTRUN -> [SKIP][126] ([Intel XE#2360])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#2360])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html
* igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#4943]) +11 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html
* igt@xe_exec_system_allocator@process-many-execqueues-free:
- shard-adlp: NOTRUN -> [SKIP][129] ([Intel XE#4915]) +359 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_exec_system_allocator@process-many-execqueues-free.html
* igt@xe_exec_system_allocator@twice-mmap-new-huge:
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#4915]) +101 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@xe_exec_system_allocator@twice-mmap-new-huge.html
* igt@xe_live_ktest@xe_dma_buf:
- shard-dg2-set2: NOTRUN -> [FAIL][131] ([Intel XE#3099]) +1 other test fail
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@xe_live_ktest@xe_dma_buf.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-adlp: NOTRUN -> [SKIP][132] ([Intel XE#2229] / [Intel XE#5488])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_mmap@pci-membarrier:
- shard-adlp: NOTRUN -> [SKIP][133] ([Intel XE#5100])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_mmap@pci-membarrier.html
* igt@xe_module_load@load:
- shard-adlp: ([PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146]) -> ([PASS][147], [PASS][148], [PASS][149], [PASS][150], [SKIP][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162]) ([Intel XE#378] / [Intel XE#5612])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-2/igt@xe_module_load@load.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-6/igt@xe_module_load@load.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-1/igt@xe_module_load@load.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-6/igt@xe_module_load@load.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-8/igt@xe_module_load@load.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-6/igt@xe_module_load@load.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-1/igt@xe_module_load@load.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-8/igt@xe_module_load@load.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-2/igt@xe_module_load@load.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-2/igt@xe_module_load@load.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-9/igt@xe_module_load@load.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-9/igt@xe_module_load@load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-9/igt@xe_module_load@load.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@xe_module_load@load.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_module_load@load.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@xe_module_load@load.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_module_load@load.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_module_load@load.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_module_load@load.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_module_load@load.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-9/igt@xe_module_load@load.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_module_load@load.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@xe_module_load@load.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-9/igt@xe_module_load@load.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-9/igt@xe_module_load@load.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-1/igt@xe_module_load@load.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_module_load@load.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_module_load@load.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_module_load@load.html
* igt@xe_oa@buffer-fill:
- shard-adlp: NOTRUN -> [SKIP][163] ([Intel XE#3573]) +10 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_oa@buffer-fill.html
* igt@xe_oa@mmio-triggered-reports:
- shard-dg2-set2: NOTRUN -> [SKIP][164] ([Intel XE#3573]) +3 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-434/igt@xe_oa@mmio-triggered-reports.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-bmg: NOTRUN -> [SKIP][165] ([Intel XE#2248])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_pat@pat-index-xe2:
- shard-adlp: NOTRUN -> [SKIP][166] ([Intel XE#977])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- shard-adlp: NOTRUN -> [SKIP][167] ([Intel XE#2838] / [Intel XE#979])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelpg:
- shard-adlp: NOTRUN -> [SKIP][168] ([Intel XE#979])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_peer2peer@write:
- shard-adlp: NOTRUN -> [SKIP][169] ([Intel XE#1061] / [Intel XE#5568])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: NOTRUN -> [SKIP][170] ([Intel XE#2284])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-adlp: NOTRUN -> [SKIP][171] ([Intel XE#2284] / [Intel XE#366]) +2 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pm@s4-d3hot-basic-exec:
- shard-dg2-set2: NOTRUN -> [FAIL][172] ([Intel XE#6339])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@xe_pm@s4-d3hot-basic-exec.html
* igt@xe_pm@s4-mocs:
- shard-adlp: NOTRUN -> [FAIL][173] ([Intel XE#6339])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_pm@s4-mocs.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-adlp: NOTRUN -> [SKIP][174] ([Intel XE#5611] / [Intel XE#579])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0:
- shard-adlp: NOTRUN -> [TIMEOUT][175] ([Intel XE#5213]) +1 other test timeout
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-adlp: NOTRUN -> [SKIP][176] ([Intel XE#4733] / [Intel XE#5594]) +4 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_pxp@pxp-termination-key-update-post-rpm:
- shard-dg2-set2: NOTRUN -> [SKIP][177] ([Intel XE#4733]) +2 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][178] ([Intel XE#944])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-adlp: NOTRUN -> [SKIP][179] ([Intel XE#944]) +3 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-adlp: NOTRUN -> [SKIP][180] ([Intel XE#4814] / [Intel XE#5614])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-8/igt@xe_render_copy@render-stress-4-copies.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-adlp: NOTRUN -> [SKIP][181] ([Intel XE#4821])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-6/igt@xe_spin_batch@spin-mem-copy.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: NOTRUN -> [SKIP][182] ([Intel XE#3342])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-dg2-433/igt@xe_sriov_flr@flr-each-isolation.html
#### Possible fixes ####
* igt@kms_plane_alpha_blend@constant-alpha-mid:
- shard-bmg: [SKIP][183] ([Intel XE#4848]) -> [PASS][184]
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@kms_plane_alpha_blend@constant-alpha-mid.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_plane_alpha_blend@constant-alpha-mid.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-adlp: [DMESG-WARN][185] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][186] +1 other test pass
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-9/igt@kms_vblank@ts-continuation-dpms-suspend.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][187] ([Intel XE#6321]) -> [PASS][188]
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_system_allocator@many-stride-mmap-mlock:
- shard-bmg: [DMESG-WARN][189] -> [PASS][190]
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@xe_exec_system_allocator@many-stride-mmap-mlock.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-mmap-mlock.html
#### Warnings ####
* igt@kms_content_protection@atomic:
- shard-bmg: [FAIL][191] ([Intel XE#1178]) -> [SKIP][192] ([Intel XE#2341])
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@kms_content_protection@atomic.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@uevent:
- shard-bmg: [FAIL][193] ([Intel XE#1188]) -> [SKIP][194] ([Intel XE#2341])
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@kms_content_protection@uevent.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
- shard-bmg: [DMESG-WARN][195] ([Intel XE#3428]) -> [SKIP][196] ([Intel XE#2291])
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
* igt@kms_flip@2x-absolute-wf_vblank-interruptible:
- shard-bmg: [FAIL][197] ([Intel XE#5352]) -> [SKIP][198] ([Intel XE#2316])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1:
- shard-adlp: [DMESG-WARN][199] ([Intel XE#4543]) -> [TIMEOUT][200] ([Intel XE#4543]) +1 other test timeout
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-adlp-9/igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-adlp-2/igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][201] ([Intel XE#2311]) -> [SKIP][202] ([Intel XE#2312]) +6 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][203] ([Intel XE#5390]) -> [SKIP][204] ([Intel XE#2312]) +3 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][205] ([Intel XE#2313]) -> [SKIP][206] ([Intel XE#2312]) +7 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][207] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][208] ([Intel XE#3544])
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [SKIP][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [DMESG-WARN][233], [PASS][234]) ([Intel XE#2457] / [Intel XE#3428]) -> ([PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [SKIP][249], [PASS][250], [PASS][251], [PASS][252], [PASS][253], [PASS][254], [PASS][255], [PASS][256], [PASS][257], [PASS][258], [PASS][259]) ([Intel XE#2457])
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-5/igt@xe_module_load@load.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@xe_module_load@load.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-7/igt@xe_module_load@load.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-7/igt@xe_module_load@load.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-2/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-4/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-4/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-8/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-2/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-5/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-5/igt@xe_module_load@load.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-5/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-4/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-2/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-1/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-8/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-8/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-8/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-7/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-3/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@xe_module_load@load.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3928-f019aaad58112f89234f7b68557c831846437008/shard-bmg-6/igt@xe_module_load@load.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-7/igt@xe_module_load@load.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-2/igt@xe_module_load@load.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_module_load@load.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_module_load@load.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-2/igt@xe_module_load@load.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-2/igt@xe_module_load@load.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-4/igt@xe_module_load@load.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_module_load@load.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-4/igt@xe_module_load@load.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-4/igt@xe_module_load@load.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-8/igt@xe_module_load@load.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-8/igt@xe_module_load@load.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@xe_module_load@load.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-5/igt@xe_module_load@load.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-2/igt@xe_module_load@load.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-7/igt@xe_module_load@load.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-5/igt@xe_module_load@load.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-1/igt@xe_module_load@load.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-1/igt@xe_module_load@load.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-1/igt@xe_module_load@load.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-3/igt@xe_module_load@load.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-5/igt@xe_module_load@load.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-6/igt@xe_module_load@load.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-8/igt@xe_module_load@load.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/shard-bmg-7/igt@xe_module_load@load.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3099]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3099
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3428
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4848
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5352
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
[Intel XE#5428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5428
[Intel XE#5488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5488
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5568
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5580]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5580
[Intel XE#5585]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5585
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5611]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5611
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5614]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5614
[Intel XE#5617]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5617
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#5963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5963
[Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6318]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6318
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6339
[Intel XE#6360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6360
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-3928-f019aaad58112f89234f7b68557c831846437008 -> xe-pw-155997v1
IGT_8587: 8587
xe-3928-f019aaad58112f89234f7b68557c831846437008: f019aaad58112f89234f7b68557c831846437008
xe-pw-155997v1: 155997v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155997v1/index.html
[-- Attachment #2: Type: text/html, Size: 76776 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction
2025-10-16 9:41 ` Matthew Auld
@ 2025-10-16 18:46 ` Matthew Brost
2025-10-16 21:26 ` Matthew Brost
0 siblings, 1 reply; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 18:46 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Thu, Oct 16, 2025 at 10:41:33AM +0100, Matthew Auld wrote:
> On 16/10/2025 01:58, Matthew Brost wrote:
> > On Wed, Oct 15, 2025 at 03:19:35PM +0100, Matthew Auld wrote:
> > > Make this the default on xe2+ when doing a copy. This has a few
> > > advantages over the exiting copy instruction:
> > >
> > > 1) It has a special PAGE_COPY mode that claims to be optimised for
> > > page-in/page-out, which is the vast majority of current users.
> > >
> > > 2) It also has a simple BYTE_COPY mode that supports byte granularity
> > > copying without any restrictions.
> > >
> > > With 2) we can now easily skip the bounce buffer flow when copying
> > > buffers with strange sizing/alignment, like for memory_access. But that
> > > is left for the next patch.
> > >
> >
> > How you tested if this series has an affect on bandwidth of copies?
>
> I only tested it from functionaly pov. Main interest for this series was
> with 2) atm.
>
> >
> > We have some SVM tests which can measure this bandwidth rather
> > effectively. I can give these tests a try a but it may take a few days.
> >
> > With that, feel free to breakout the first 4 patches into an individual
> > series while we explore the affects on bandwidth for th last two
> > patches.
>
> Sounds good. Can you point me to those SVM tests? I see some fault and
> pre-fetch benchmarks in IGT, is it those? I can try them.
>
Yes, the prefetch benchmark test is a good one but it is software
limited atm so might not give the best view.
Running 'xe_exec_system_allocator --r many-large-malloc' and then
looking at the GT stats the copy bandwidth can be derived. I have
scripts that do this, I believe Francios uploaded these somewhere
internally but here is a public link to a script which parses these [1].
I can try to find time to see the bandwidth before / after this series
today and report back.
Matt
[1] https://pastebin.com/rZZN5sgh
> >
> > Matt
> >
> > > BSpec: 57561
> > > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > > Cc: Matthew Brost <matthew.brost@intel.com>
> > > ---
> > > .../gpu/drm/xe/instructions/xe_gpu_commands.h | 6 ++
> > > drivers/gpu/drm/xe/xe_migrate.c | 64 ++++++++++++++++---
> > > 2 files changed, 61 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> > > index 8cfcd3360896..5d41ca297447 100644
> > > --- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> > > +++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> > > @@ -31,6 +31,12 @@
> > > #define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
> > > #define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK GENMASK(23, 20)
> > > +#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
> > > +#define MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
> > > +#define MEM_COPY_MATRIX_COPY REG_BIT(17)
> > > +#define MEM_COPY_SRC_MOCS_INDEX_MASK GENMASK(31, 28)
> > > +#define MEM_COPY_DST_MOCS_INDEX_MASK GENMASK(6, 3)
> > > +
> > > #define PVC_MEM_SET_CMD (2 << 29 | 0x5b << 22)
> > > #define PVC_MEM_SET_CMD_LEN_DW 7
> > > #define PVC_MEM_SET_MATRIX REG_BIT(17)
> > > diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> > > index 3801152b7f8f..da1fefb96070 100644
> > > --- a/drivers/gpu/drm/xe/xe_migrate.c
> > > +++ b/drivers/gpu/drm/xe/xe_migrate.c
> > > @@ -699,37 +699,83 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
> > > }
> > > #define EMIT_COPY_DW 10
> > > -static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> > > - u64 src_ofs, u64 dst_ofs, unsigned int size,
> > > - unsigned int pitch)
> > > +static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> > > + u64 dst_ofs, unsigned int size,
> > > + unsigned int pitch)
> > > {
> > > struct xe_device *xe = gt_to_xe(gt);
> > > - u32 mocs = 0;
> > > u32 tile_y = 0;
> > > + xe_gt_assert(gt, GRAPHICS_VER(xe) < 20);
> > > xe_gt_assert(gt, !(pitch & 3));
> > > xe_gt_assert(gt, size / pitch <= S16_MAX);
> > > xe_gt_assert(gt, pitch / 4 <= S16_MAX);
> > > xe_gt_assert(gt, pitch <= U16_MAX);
> > > - if (GRAPHICS_VER(xe) >= 20)
> > > - mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);
> > > -
> > > if (GRAPHICS_VERx100(xe) >= 1250)
> > > tile_y = XY_FAST_COPY_BLT_D1_SRC_TILE4 | XY_FAST_COPY_BLT_D1_DST_TILE4;
> > > bb->cs[bb->len++] = XY_FAST_COPY_BLT_CMD | (10 - 2);
> > > - bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y | mocs;
> > > + bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y;
> > > bb->cs[bb->len++] = 0;
> > > bb->cs[bb->len++] = (size / pitch) << 16 | pitch / 4;
> > > bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> > > bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> > > bb->cs[bb->len++] = 0;
> > > - bb->cs[bb->len++] = pitch | mocs;
> > > + bb->cs[bb->len++] = pitch;
> > > bb->cs[bb->len++] = lower_32_bits(src_ofs);
> > > bb->cs[bb->len++] = upper_32_bits(src_ofs);
> > > }
> > > +static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> > > + u64 dst_ofs, unsigned int size, unsigned int pitch)
> > > +{
> > > + u32 mode, copy_type, width;
> > > +
> > > + xe_gt_assert(gt, IS_ALIGNED(size, pitch));
> > > + xe_gt_assert(gt, pitch <= U16_MAX);
> > > + xe_gt_assert(gt, size);
> > > +
> > > + if (IS_ALIGNED(size, 256) &&
> > > + IS_ALIGNED(lower_32_bits(src_ofs), 256) &&
> > > + IS_ALIGNED(lower_32_bits(dst_ofs), 256)) {
> > > + mode = MEM_COPY_PAGE_COPY_MODE;
> > > + copy_type = 0; /* linear copy */
> > > + width = size / 256;
> > > + } else {
> > > + xe_gt_assert(gt, size / pitch <= U16_MAX);
> > > + mode = 0; /* BYTE_COPY */
> > > + copy_type = MEM_COPY_MATRIX_COPY;
> > > + width = pitch;
> > > + }
> > > +
> > > + xe_gt_assert(gt, width <= U16_MAX);
> > > +
> > > + bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
> > > + bb->cs[bb->len++] = width - 1;
> > > + bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
> > > + bb->cs[bb->len++] = pitch - 1;
> > > + bb->cs[bb->len++] = pitch - 1;
> > > + bb->cs[bb->len++] = lower_32_bits(src_ofs);
> > > + bb->cs[bb->len++] = upper_32_bits(src_ofs);
> > > + bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> > > + bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> > > + bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
> > > + FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
> > > +}
> > > +
> > > +static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> > > + u64 src_ofs, u64 dst_ofs, unsigned int size,
> > > + unsigned int pitch)
> > > +{
> > > + struct xe_device *xe = gt_to_xe(gt);
> > > +
> > > + if (GRAPHICS_VER(xe) >= 20)
> > > + emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> > > + else
> > > + emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> > > +}
> > > +
> > > static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
> > > {
> > > return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
> > > --
> > > 2.51.0
> > >
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction
2025-10-16 18:46 ` Matthew Brost
@ 2025-10-16 21:26 ` Matthew Brost
2025-10-17 11:23 ` Matthew Auld
0 siblings, 1 reply; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 21:26 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Thu, Oct 16, 2025 at 11:46:37AM -0700, Matthew Brost wrote:
> On Thu, Oct 16, 2025 at 10:41:33AM +0100, Matthew Auld wrote:
> > On 16/10/2025 01:58, Matthew Brost wrote:
> > > On Wed, Oct 15, 2025 at 03:19:35PM +0100, Matthew Auld wrote:
> > > > Make this the default on xe2+ when doing a copy. This has a few
> > > > advantages over the exiting copy instruction:
> > > >
> > > > 1) It has a special PAGE_COPY mode that claims to be optimised for
> > > > page-in/page-out, which is the vast majority of current users.
> > > >
> > > > 2) It also has a simple BYTE_COPY mode that supports byte granularity
> > > > copying without any restrictions.
> > > >
> > > > With 2) we can now easily skip the bounce buffer flow when copying
> > > > buffers with strange sizing/alignment, like for memory_access. But that
> > > > is left for the next patch.
> > > >
> > >
> > > How you tested if this series has an affect on bandwidth of copies?
> >
> > I only tested it from functionaly pov. Main interest for this series was
> > with 2) atm.
> >
> > >
> > > We have some SVM tests which can measure this bandwidth rather
> > > effectively. I can give these tests a try a but it may take a few days.
> > >
> > > With that, feel free to breakout the first 4 patches into an individual
> > > series while we explore the affects on bandwidth for th last two
> > > patches.
> >
> > Sounds good. Can you point me to those SVM tests? I see some fault and
> > pre-fetch benchmarks in IGT, is it those? I can try them.
> >
>
> Yes, the prefetch benchmark test is a good one but it is software
> limited atm so might not give the best view.
>
> Running 'xe_exec_system_allocator --r many-large-malloc' and then
> looking at the GT stats the copy bandwidth can be derived. I have
> scripts that do this, I believe Francios uploaded these somewhere
> internally but here is a public link to a script which parses these [1].
>
> I can try to find time to see the bandwidth before / after this series
> today and report back.
>
I didn’t observe a noticeable performance drop when using MEM_COPY_CMD
in the SVM tests. However, for various reasons, this path is still
software-limited in the KMD. Once we land additional software
optimizations to accelerate the copies, switching between commands will
be straightforward. So, there’s no performance concern with these
changes.
> Matt
>
> [1] https://pastebin.com/rZZN5sgh
>
> > >
> > > Matt
> > >
> > > > BSpec: 57561
> > > > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > > > Cc: Matthew Brost <matthew.brost@intel.com>
> > > > ---
> > > > .../gpu/drm/xe/instructions/xe_gpu_commands.h | 6 ++
> > > > drivers/gpu/drm/xe/xe_migrate.c | 64 ++++++++++++++++---
> > > > 2 files changed, 61 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> > > > index 8cfcd3360896..5d41ca297447 100644
> > > > --- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> > > > +++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> > > > @@ -31,6 +31,12 @@
> > > > #define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
> > > > #define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK GENMASK(23, 20)
> > > > +#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
> > > > +#define MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
> > > > +#define MEM_COPY_MATRIX_COPY REG_BIT(17)
> > > > +#define MEM_COPY_SRC_MOCS_INDEX_MASK GENMASK(31, 28)
> > > > +#define MEM_COPY_DST_MOCS_INDEX_MASK GENMASK(6, 3)
> > > > +
> > > > #define PVC_MEM_SET_CMD (2 << 29 | 0x5b << 22)
> > > > #define PVC_MEM_SET_CMD_LEN_DW 7
> > > > #define PVC_MEM_SET_MATRIX REG_BIT(17)
> > > > diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> > > > index 3801152b7f8f..da1fefb96070 100644
> > > > --- a/drivers/gpu/drm/xe/xe_migrate.c
> > > > +++ b/drivers/gpu/drm/xe/xe_migrate.c
> > > > @@ -699,37 +699,83 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
> > > > }
> > > > #define EMIT_COPY_DW 10
> > > > -static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> > > > - u64 src_ofs, u64 dst_ofs, unsigned int size,
> > > > - unsigned int pitch)
> > > > +static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> > > > + u64 dst_ofs, unsigned int size,
> > > > + unsigned int pitch)
> > > > {
> > > > struct xe_device *xe = gt_to_xe(gt);
> > > > - u32 mocs = 0;
> > > > u32 tile_y = 0;
> > > > + xe_gt_assert(gt, GRAPHICS_VER(xe) < 20);
> > > > xe_gt_assert(gt, !(pitch & 3));
> > > > xe_gt_assert(gt, size / pitch <= S16_MAX);
> > > > xe_gt_assert(gt, pitch / 4 <= S16_MAX);
> > > > xe_gt_assert(gt, pitch <= U16_MAX);
> > > > - if (GRAPHICS_VER(xe) >= 20)
> > > > - mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);
> > > > -
Can we keep this part in case we want to experiment with switching
between commands on Xe2+? It isn't a huge amount of code to carry in
emit_xy_fast_copy to support Xe2+.
> > > > if (GRAPHICS_VERx100(xe) >= 1250)
> > > > tile_y = XY_FAST_COPY_BLT_D1_SRC_TILE4 | XY_FAST_COPY_BLT_D1_DST_TILE4;
> > > > bb->cs[bb->len++] = XY_FAST_COPY_BLT_CMD | (10 - 2);
> > > > - bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y | mocs;
> > > > + bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y;
> > > > bb->cs[bb->len++] = 0;
> > > > bb->cs[bb->len++] = (size / pitch) << 16 | pitch / 4;
> > > > bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> > > > bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> > > > bb->cs[bb->len++] = 0;
> > > > - bb->cs[bb->len++] = pitch | mocs;
> > > > + bb->cs[bb->len++] = pitch;
> > > > bb->cs[bb->len++] = lower_32_bits(src_ofs);
> > > > bb->cs[bb->len++] = upper_32_bits(src_ofs);
> > > > }
> > > > +static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> > > > + u64 dst_ofs, unsigned int size, unsigned int pitch)
> > > > +{
> > > > + u32 mode, copy_type, width;
> > > > +
> > > > + xe_gt_assert(gt, IS_ALIGNED(size, pitch));
> > > > + xe_gt_assert(gt, pitch <= U16_MAX);
> > > > + xe_gt_assert(gt, size);
> > > > +
> > > > + if (IS_ALIGNED(size, 256) &&
> > > > + IS_ALIGNED(lower_32_bits(src_ofs), 256) &&
> > > > + IS_ALIGNED(lower_32_bits(dst_ofs), 256)) {
s/256/SZ_256 or perhaps a define for page copy mode alignment
requirements?
Nits aside, everything LGTM.
Matt
> > > > + mode = MEM_COPY_PAGE_COPY_MODE;
> > > > + copy_type = 0; /* linear copy */
> > > > + width = size / 256;
> > > > + } else {
> > > > + xe_gt_assert(gt, size / pitch <= U16_MAX);
> > > > + mode = 0; /* BYTE_COPY */
> > > > + copy_type = MEM_COPY_MATRIX_COPY;
> > > > + width = pitch;
> > > > + }
> > > > +
> > > > + xe_gt_assert(gt, width <= U16_MAX);
> > > > +
> > > > + bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
> > > > + bb->cs[bb->len++] = width - 1;
> > > > + bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
> > > > + bb->cs[bb->len++] = pitch - 1;
> > > > + bb->cs[bb->len++] = pitch - 1;
> > > > + bb->cs[bb->len++] = lower_32_bits(src_ofs);
> > > > + bb->cs[bb->len++] = upper_32_bits(src_ofs);
> > > > + bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> > > > + bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> > > > + bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
> > > > + FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
> > > > +}
> > > > +
> > > > +static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> > > > + u64 src_ofs, u64 dst_ofs, unsigned int size,
> > > > + unsigned int pitch)
> > > > +{
> > > > + struct xe_device *xe = gt_to_xe(gt);
> > > > +
> > > > + if (GRAPHICS_VER(xe) >= 20)
Would it be better to stick this in xe_pci.c / xe_device.info rather
than inline IP version check?
Nits aside, patch looks correct.
Matt
> > > > + emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> > > > + else
> > > > + emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> > > > +}
> > > > +
> > > > static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
> > > > {
> > > > return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
> > > > --
> > > > 2.51.0
> > > >
> >
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2
2025-10-15 14:19 ` [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2 Matthew Auld
@ 2025-10-16 21:28 ` Matthew Brost
0 siblings, 0 replies; 20+ messages in thread
From: Matthew Brost @ 2025-10-16 21:28 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
On Wed, Oct 15, 2025 at 03:19:36PM +0100, Matthew Auld wrote:
> Now that we support MEM_COPY we should be able to use the PAGE_COPY
> mode, otherwise falling back to BYTE_COPY mode when we have odd
> sizing/alignment.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index da1fefb96070..8bd8e8179313 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1933,9 +1933,11 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
> int err;
> unsigned long i, j;
> bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
> + bool has_byte_copy = GRAPHICS_VER(xe) >= 20;
See my comment in previous patch about maybe storing this in xe_device.info.
Whatever we land on there, absorb into this patch.
With that:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
>
> - if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
> - (sram_offset | vram_addr) & XE_CACHELINE_MASK))
> + if (!has_byte_copy &&
> + drm_WARN_ON(&xe->drm,
> + (len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
> return ERR_PTR(-EOPNOTSUPP);
>
> xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
> @@ -2149,13 +2151,14 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
> struct drm_pagemap_addr *pagemap_addr;
> unsigned long page_offset = (unsigned long)buf & ~PAGE_MASK;
> int bytes_left = len, current_page = 0;
> + bool has_byte_copy = GRAPHICS_VER(xe) >= 20;
> void *orig_buf = buf;
>
> xe_bo_assert_held(bo);
>
> /* Use bounce buffer for small access and unaligned access */
> - if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
> - !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
> + if (!has_byte_copy && (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
> + !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
> int buf_offset = 0;
> void *bounce;
> int err;
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction
2025-10-16 21:26 ` Matthew Brost
@ 2025-10-17 11:23 ` Matthew Auld
0 siblings, 0 replies; 20+ messages in thread
From: Matthew Auld @ 2025-10-17 11:23 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 16/10/2025 22:26, Matthew Brost wrote:
> On Thu, Oct 16, 2025 at 11:46:37AM -0700, Matthew Brost wrote:
>> On Thu, Oct 16, 2025 at 10:41:33AM +0100, Matthew Auld wrote:
>>> On 16/10/2025 01:58, Matthew Brost wrote:
>>>> On Wed, Oct 15, 2025 at 03:19:35PM +0100, Matthew Auld wrote:
>>>>> Make this the default on xe2+ when doing a copy. This has a few
>>>>> advantages over the exiting copy instruction:
>>>>>
>>>>> 1) It has a special PAGE_COPY mode that claims to be optimised for
>>>>> page-in/page-out, which is the vast majority of current users.
>>>>>
>>>>> 2) It also has a simple BYTE_COPY mode that supports byte granularity
>>>>> copying without any restrictions.
>>>>>
>>>>> With 2) we can now easily skip the bounce buffer flow when copying
>>>>> buffers with strange sizing/alignment, like for memory_access. But that
>>>>> is left for the next patch.
>>>>>
>>>>
>>>> How you tested if this series has an affect on bandwidth of copies?
>>>
>>> I only tested it from functionaly pov. Main interest for this series was
>>> with 2) atm.
>>>
>>>>
>>>> We have some SVM tests which can measure this bandwidth rather
>>>> effectively. I can give these tests a try a but it may take a few days.
>>>>
>>>> With that, feel free to breakout the first 4 patches into an individual
>>>> series while we explore the affects on bandwidth for th last two
>>>> patches.
>>>
>>> Sounds good. Can you point me to those SVM tests? I see some fault and
>>> pre-fetch benchmarks in IGT, is it those? I can try them.
>>>
>>
>> Yes, the prefetch benchmark test is a good one but it is software
>> limited atm so might not give the best view.
>>
>> Running 'xe_exec_system_allocator --r many-large-malloc' and then
>> looking at the GT stats the copy bandwidth can be derived. I have
>> scripts that do this, I believe Francios uploaded these somewhere
>> internally but here is a public link to a script which parses these [1].
>>
>> I can try to find time to see the bandwidth before / after this series
>> today and report back.
>>
>
> I didn’t observe a noticeable performance drop when using MEM_COPY_CMD
> in the SVM tests. However, for various reasons, this path is still
> software-limited in the KMD. Once we land additional software
> optimizations to accelerate the copies, switching between commands will
> be straightforward. So, there’s no performance concern with these
> changes.
Many thanks for checking this.
>
>> Matt
>>
>> [1] https://pastebin.com/rZZN5sgh
>>
>>>>
>>>> Matt
>>>>
>>>>> BSpec: 57561
>>>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>>>> ---
>>>>> .../gpu/drm/xe/instructions/xe_gpu_commands.h | 6 ++
>>>>> drivers/gpu/drm/xe/xe_migrate.c | 64 ++++++++++++++++---
>>>>> 2 files changed, 61 insertions(+), 9 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
>>>>> index 8cfcd3360896..5d41ca297447 100644
>>>>> --- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
>>>>> +++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
>>>>> @@ -31,6 +31,12 @@
>>>>> #define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
>>>>> #define XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK GENMASK(23, 20)
>>>>> +#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
>>>>> +#define MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
>>>>> +#define MEM_COPY_MATRIX_COPY REG_BIT(17)
>>>>> +#define MEM_COPY_SRC_MOCS_INDEX_MASK GENMASK(31, 28)
>>>>> +#define MEM_COPY_DST_MOCS_INDEX_MASK GENMASK(6, 3)
>>>>> +
>>>>> #define PVC_MEM_SET_CMD (2 << 29 | 0x5b << 22)
>>>>> #define PVC_MEM_SET_CMD_LEN_DW 7
>>>>> #define PVC_MEM_SET_MATRIX REG_BIT(17)
>>>>> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
>>>>> index 3801152b7f8f..da1fefb96070 100644
>>>>> --- a/drivers/gpu/drm/xe/xe_migrate.c
>>>>> +++ b/drivers/gpu/drm/xe/xe_migrate.c
>>>>> @@ -699,37 +699,83 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
>>>>> }
>>>>> #define EMIT_COPY_DW 10
>>>>> -static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
>>>>> - u64 src_ofs, u64 dst_ofs, unsigned int size,
>>>>> - unsigned int pitch)
>>>>> +static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
>>>>> + u64 dst_ofs, unsigned int size,
>>>>> + unsigned int pitch)
>>>>> {
>>>>> struct xe_device *xe = gt_to_xe(gt);
>>>>> - u32 mocs = 0;
>>>>> u32 tile_y = 0;
>>>>> + xe_gt_assert(gt, GRAPHICS_VER(xe) < 20);
>>>>> xe_gt_assert(gt, !(pitch & 3));
>>>>> xe_gt_assert(gt, size / pitch <= S16_MAX);
>>>>> xe_gt_assert(gt, pitch / 4 <= S16_MAX);
>>>>> xe_gt_assert(gt, pitch <= U16_MAX);
>>>>> - if (GRAPHICS_VER(xe) >= 20)
>>>>> - mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);
>>>>> -
>
> Can we keep this part in case we want to experiment with switching
> between commands on Xe2+? It isn't a huge amount of code to carry in
> emit_xy_fast_copy to support Xe2+.
>
>>>>> if (GRAPHICS_VERx100(xe) >= 1250)
>>>>> tile_y = XY_FAST_COPY_BLT_D1_SRC_TILE4 | XY_FAST_COPY_BLT_D1_DST_TILE4;
>>>>> bb->cs[bb->len++] = XY_FAST_COPY_BLT_CMD | (10 - 2);
>>>>> - bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y | mocs;
>>>>> + bb->cs[bb->len++] = XY_FAST_COPY_BLT_DEPTH_32 | pitch | tile_y;
>>>>> bb->cs[bb->len++] = 0;
>>>>> bb->cs[bb->len++] = (size / pitch) << 16 | pitch / 4;
>>>>> bb->cs[bb->len++] = lower_32_bits(dst_ofs);
>>>>> bb->cs[bb->len++] = upper_32_bits(dst_ofs);
>>>>> bb->cs[bb->len++] = 0;
>>>>> - bb->cs[bb->len++] = pitch | mocs;
>>>>> + bb->cs[bb->len++] = pitch;
>>>>> bb->cs[bb->len++] = lower_32_bits(src_ofs);
>>>>> bb->cs[bb->len++] = upper_32_bits(src_ofs);
>>>>> }
>>>>> +static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
>>>>> + u64 dst_ofs, unsigned int size, unsigned int pitch)
>>>>> +{
>>>>> + u32 mode, copy_type, width;
>>>>> +
>>>>> + xe_gt_assert(gt, IS_ALIGNED(size, pitch));
>>>>> + xe_gt_assert(gt, pitch <= U16_MAX);
>>>>> + xe_gt_assert(gt, size);
>>>>> +
>>>>> + if (IS_ALIGNED(size, 256) &&
>>>>> + IS_ALIGNED(lower_32_bits(src_ofs), 256) &&
>>>>> + IS_ALIGNED(lower_32_bits(dst_ofs), 256)) {
>
> s/256/SZ_256 or perhaps a define for page copy mode alignment
> requirements?
>
> Nits aside, everything LGTM.
> Matt
>
>>>>> + mode = MEM_COPY_PAGE_COPY_MODE;
>>>>> + copy_type = 0; /* linear copy */
>>>>> + width = size / 256;
>>>>> + } else {
>>>>> + xe_gt_assert(gt, size / pitch <= U16_MAX);
>>>>> + mode = 0; /* BYTE_COPY */
>>>>> + copy_type = MEM_COPY_MATRIX_COPY;
>>>>> + width = pitch;
>>>>> + }
>>>>> +
>>>>> + xe_gt_assert(gt, width <= U16_MAX);
>>>>> +
>>>>> + bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
>>>>> + bb->cs[bb->len++] = width - 1;
>>>>> + bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
>>>>> + bb->cs[bb->len++] = pitch - 1;
>>>>> + bb->cs[bb->len++] = pitch - 1;
>>>>> + bb->cs[bb->len++] = lower_32_bits(src_ofs);
>>>>> + bb->cs[bb->len++] = upper_32_bits(src_ofs);
>>>>> + bb->cs[bb->len++] = lower_32_bits(dst_ofs);
>>>>> + bb->cs[bb->len++] = upper_32_bits(dst_ofs);
>>>>> + bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
>>>>> + FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
>>>>> +}
>>>>> +
>>>>> +static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
>>>>> + u64 src_ofs, u64 dst_ofs, unsigned int size,
>>>>> + unsigned int pitch)
>>>>> +{
>>>>> + struct xe_device *xe = gt_to_xe(gt);
>>>>> +
>>>>> + if (GRAPHICS_VER(xe) >= 20)
>
> Would it be better to stick this in xe_pci.c / xe_device.info rather
> than inline IP version check?
>
> Nits aside, patch looks correct.
>
> Matt
>
>>>>> + emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
>>>>> + else
>>>>> + emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
>>>>> +}
>>>>> +
>>>>> static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
>>>>> {
>>>>> return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
>>>>> --
>>>>> 2.51.0
>>>>>
>>>
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2025-10-17 11:23 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
2025-10-15 14:19 ` [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit Matthew Auld
2025-10-16 0:36 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit Matthew Auld
2025-10-16 0:34 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing Matthew Auld
2025-10-16 0:36 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 4/6] drm/xe/migrate: trim " Matthew Auld
2025-10-16 0:38 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction Matthew Auld
2025-10-16 0:58 ` Matthew Brost
2025-10-16 9:41 ` Matthew Auld
2025-10-16 18:46 ` Matthew Brost
2025-10-16 21:26 ` Matthew Brost
2025-10-17 11:23 ` Matthew Auld
2025-10-15 14:19 ` [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2 Matthew Auld
2025-10-16 21:28 ` Matthew Brost
2025-10-15 22:58 ` ✓ CI.KUnit: success for Some migration fixes/improvements Patchwork
2025-10-15 23:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-16 16:08 ` ✓ Xe.CI.Full: " Patchwork
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