From: Arun R Murthy <arun.r.murthy@intel.com>
To: "Imre Deak" <imre.deak@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Jani Nikula" <jani.nikula@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
Arun R Murthy <arun.r.murthy@intel.com>
Subject: [PATCH RFC 3/4] drm/i915/dp: On HPD read LTTPR caps followed by DPRX caps
Date: Thu, 05 Mar 2026 13:48:13 +0530 [thread overview]
Message-ID: <20260305-dp_aux-v1-3-54ee0b5f5158@intel.com> (raw)
In-Reply-To: <20260305-dp_aux-v1-0-54ee0b5f5158@intel.com>
On HPD for DP read LTTPR caps and then read the DPRX caps. Dont directly
read the DPRX caps at first as per Spec DP2.1 Sec 3.6.8.1
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +--
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_link_training.h | 1 -
drivers/gpu/drm/i915/display/intel_dp_tunnel.c | 3 +--
4 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0c03b6fb6fd82b0b010fe5f7591ce5e0d8d2d04c..956099e90b32aae5ae21d472ab5dc9dd7d110f60 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6811,7 +6811,6 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
{
struct intel_display *display = to_intel_display(dig_port);
struct intel_dp *intel_dp = &dig_port->dp;
- u8 dpcd[DP_RECEIVER_CAP_SIZE];
if (dig_port->base.type == INTEL_OUTPUT_EDP &&
(long_hpd ||
@@ -6847,7 +6846,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
if (long_hpd) {
intel_dp_dpcd_set_probe(intel_dp, true);
- intel_dp_read_dprx_caps(intel_dp, dpcd);
+ intel_dp_init_lttpr_and_dprx_caps(intel_dp);
intel_dp->reset_link_params = true;
intel_dp_invalidate_source_oui(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 68ab938f18f3b6f3c889f408cd1901041834fe82..76a5bfb507c34733db09cd7c2ba9895afcbf6b10 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -205,7 +205,7 @@ static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, int lttpr_count)
return 0;
}
-int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_SIZE])
+static int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_SIZE])
{
struct intel_display *display = to_intel_display(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
index 1ba22ed6db087b73d2ec479c6f31104e97243061..d5f35637b7f375bdc7bdd01c25137fb9f0de37dc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
@@ -13,7 +13,6 @@ struct intel_connector;
struct intel_crtc_state;
struct intel_dp;
-int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_SIZE]);
int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp *intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
index 1fd1ac8d556d84bd794b965ba6f513ee4550f060..6fe9ff757f264a1064ca3e77e4a2bb8c1228214a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
@@ -337,7 +337,6 @@ void intel_dp_tunnel_resume(struct intel_dp *intel_dp,
struct intel_display *display = to_intel_display(intel_dp);
struct intel_connector *connector = intel_dp->attached_connector;
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- u8 dpcd[DP_RECEIVER_CAP_SIZE];
u8 pipe_mask;
int err = 0;
@@ -360,7 +359,7 @@ void intel_dp_tunnel_resume(struct intel_dp *intel_dp,
* capabilities were updated already during resume.
*/
if (!dpcd_updated) {
- err = intel_dp_read_dprx_caps(intel_dp, dpcd);
+ err = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
if (err) {
drm_dp_tunnel_set_io_error(intel_dp->tunnel);
--
2.25.1
next prev parent reply other threads:[~2026-03-05 8:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-05 8:18 [PATCH RFC 0/4] DP: Read LTTPR caps followed by DPRX caps Arun R Murthy
2026-03-05 8:18 ` [PATCH RFC 1/4] drm/display/dp: Read LTTPR caps without " Arun R Murthy
2026-03-05 9:18 ` Jani Nikula
2026-03-06 4:08 ` Murthy, Arun R
2026-03-05 16:29 ` Imre Deak
2026-03-06 4:10 ` Murthy, Arun R
2026-03-05 8:18 ` [PATCH RFC 2/4] drm/i915/dp: Read LTTPR caps followed by " Arun R Murthy
2026-03-05 8:18 ` Arun R Murthy [this message]
2026-03-05 8:18 ` [PATCH RFC 4/4] drm/i915/dp: DPRX/LTTPR caps for DP should be read once Arun R Murthy
2026-03-05 16:11 ` [PATCH RFC 0/4] DP: Read LTTPR caps followed by DPRX caps Imre Deak
2026-03-06 4:29 ` Murthy, Arun R
2026-03-06 9:46 ` Imre Deak
2026-03-10 8:58 ` Murthy, Arun R
2026-03-06 4:29 ` Murthy, Arun R
2026-03-06 3:42 ` ✗ CI.checkpatch: warning for " Patchwork
2026-03-06 3:44 ` ✓ CI.KUnit: success " Patchwork
2026-03-06 4:33 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-03-07 1:55 ` ✗ Xe.CI.FULL: " Patchwork
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